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[PowerPC] Expand v2i64 shifts

These operations need to be expanded during legalization so that isel does not
crash. In theory, we might be able to custom lower some of these. That,
however, would need to be follow-up work.

llvm-svn: 204963
This commit is contained in:
Hal Finkel 2014-03-27 21:26:33 +00:00
parent 0080eb8e78
commit fa7f1597ca
2 changed files with 46 additions and 0 deletions

View File

@ -581,6 +581,10 @@ PPCTargetLowering::PPCTargetLowering(PPCTargetMachine &TM)
setOperationAction(ISD::ADD, MVT::v2i64, Expand); setOperationAction(ISD::ADD, MVT::v2i64, Expand);
setOperationAction(ISD::SUB, MVT::v2i64, Expand); setOperationAction(ISD::SUB, MVT::v2i64, Expand);
setOperationAction(ISD::SHL, MVT::v2i64, Expand);
setOperationAction(ISD::SRA, MVT::v2i64, Expand);
setOperationAction(ISD::SRL, MVT::v2i64, Expand);
setOperationAction(ISD::LOAD, MVT::v2i64, Promote); setOperationAction(ISD::LOAD, MVT::v2i64, Promote);
AddPromotedToType (ISD::LOAD, MVT::v2i64, MVT::v2f64); AddPromotedToType (ISD::LOAD, MVT::v2i64, MVT::v2f64);
setOperationAction(ISD::STORE, MVT::v2i64, Promote); setOperationAction(ISD::STORE, MVT::v2i64, Promote);

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@ -487,3 +487,45 @@ define <2 x i64> @test56(<2 x i64> %a, <2 x i64> %b) {
; CHECK: blr ; CHECK: blr
} }
define <2 x i64> @test60(<2 x i64> %a, <2 x i64> %b) {
%v = shl <2 x i64> %a, %b
ret <2 x i64> %v
; CHECK-LABEL: @test60
; This should scalarize, and the current code quality is not good.
; CHECK: stxvd2x
; CHECK: stxvd2x
; CHECK: sld
; CHECK: sld
; CHECK: lxvd2x
; CHECK: blr
}
define <2 x i64> @test61(<2 x i64> %a, <2 x i64> %b) {
%v = lshr <2 x i64> %a, %b
ret <2 x i64> %v
; CHECK-LABEL: @test61
; This should scalarize, and the current code quality is not good.
; CHECK: stxvd2x
; CHECK: stxvd2x
; CHECK: srd
; CHECK: srd
; CHECK: lxvd2x
; CHECK: blr
}
define <2 x i64> @test62(<2 x i64> %a, <2 x i64> %b) {
%v = ashr <2 x i64> %a, %b
ret <2 x i64> %v
; CHECK-LABEL: @test62
; This should scalarize, and the current code quality is not good.
; CHECK: stxvd2x
; CHECK: stxvd2x
; CHECK: srad
; CHECK: srad
; CHECK: lxvd2x
; CHECK: blr
}