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add tests for missing DeMorgan's Law folds

llvm-svn: 275192
This commit is contained in:
Sanjay Patel 2016-07-12 17:05:04 +00:00
parent e9e05cf405
commit faa5f9cab4

View File

@ -33,3 +33,58 @@ define i32 @demorgan_and(i1 %X, i1 %Y) {
ret i32 %and
}
; FIXME: Vectors should get the same transform.
define <2 x i32> @demorgan_or_vec(<2 x i1> %X, <2 x i1> %Y) {
; CHECK-LABEL: @demorgan_or_vec(
; CHECK-NEXT: [[ZEXTX:%.*]] = zext <2 x i1> %X to <2 x i32>
; CHECK-NEXT: [[ZEXTY:%.*]] = zext <2 x i1> %Y to <2 x i32>
; CHECK-NEXT: [[NOTX:%.*]] = xor <2 x i32> [[ZEXTX]], <i32 1, i32 1>
; CHECK-NEXT: [[NOTY:%.*]] = xor <2 x i32> [[ZEXTY]], <i32 1, i32 1>
; CHECK-NEXT: [[OR:%.*]] = or <2 x i32> [[NOTX]], [[NOTY]]
; CHECK-NEXT: ret <2 x i32> [[OR]]
;
%zextX = zext <2 x i1> %X to <2 x i32>
%zextY = zext <2 x i1> %Y to <2 x i32>
%notX = xor <2 x i32> %zextX, <i32 1, i32 1>
%notY = xor <2 x i32> %zextY, <i32 1, i32 1>
%or = or <2 x i32> %notX, %notY
ret <2 x i32> %or
}
define <2 x i32> @demorgan_and_vec(<2 x i1> %X, <2 x i1> %Y) {
; CHECK-LABEL: @demorgan_and_vec(
; CHECK-NEXT: [[ZEXTX:%.*]] = zext <2 x i1> %X to <2 x i32>
; CHECK-NEXT: [[ZEXTY:%.*]] = zext <2 x i1> %Y to <2 x i32>
; CHECK-NEXT: [[NOTX:%.*]] = xor <2 x i32> [[ZEXTX]], <i32 1, i32 1>
; CHECK-NEXT: [[NOTY:%.*]] = xor <2 x i32> [[ZEXTY]], <i32 1, i32 1>
; CHECK-NEXT: [[AND:%.*]] = and <2 x i32> [[NOTX]], [[NOTY]]
; CHECK-NEXT: ret <2 x i32> [[AND]]
;
%zextX = zext <2 x i1> %X to <2 x i32>
%zextY = zext <2 x i1> %Y to <2 x i32>
%notX = xor <2 x i32> %zextX, <i32 1, i32 1>
%notY = xor <2 x i32> %zextY, <i32 1, i32 1>
%and = and <2 x i32> %notX, %notY
ret <2 x i32> %and
}
; FIXME: If the xor was canonicalized to a 'not', then this would simplify.
define i32 @PR28476(i32 %x, i32 %y) {
; CHECK-LABEL: @PR28476(
; CHECK-NEXT: [[CMP0:%.*]] = icmp ne i32 %x, 0
; CHECK-NEXT: [[CMP1:%.*]] = icmp ne i32 %y, 0
; CHECK-NEXT: [[AND:%.*]] = and i1 [[CMP0]], [[CMP1]]
; CHECK-NEXT: [[ZEXT:%.*]] = zext i1 [[AND]] to i32
; CHECK-NEXT: [[COND:%.*]] = xor i32 [[ZEXT]], 1
; CHECK-NEXT: ret i32 [[COND]]
;
%cmp0 = icmp ne i32 %x, 0
%cmp1 = icmp ne i32 %y, 0
%and = and i1 %cmp0, %cmp1
%zext = zext i1 %and to i32
%cond = xor i32 %zext, 1
ret i32 %cond
}