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Follow up of rG5f1cad4d296a, slightly reduced test case. NFC.
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@ -1,7 +1,7 @@
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -mtriple=armv7-none-linux-eabi < %s | FileCheck %s
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define void @vld1x2([8 x i32] %0) {
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define void @vld1x2(i8* %v4, i32 %v2) {
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; CHECK-LABEL: vld1x2:
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; CHECK: @ %bb.0:
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; CHECK-NEXT: mov r0, #0
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@ -13,26 +13,21 @@ define void @vld1x2([8 x i32] %0) {
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; CHECK-NEXT: @ in Loop: Header=BB0_1 Depth=1
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; CHECK-NEXT: vst3.8 {d16, d17, d18}, [r0]
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; CHECK-NEXT: b .LBB0_1
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%2 = extractvalue [8 x i32] %0, 5
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br label %3
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3: ; preds = %.loopexit, %1
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%4 = getelementptr inbounds i8, i8* undef, i32 undef
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br label %.preheader
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.preheader: ; preds = %.preheader, %3
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%5 = icmp eq i8* %4, undef
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br i1 %5, label %.loopexit, label %.preheader
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%v5 = icmp eq i8* %v4, undef
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br i1 %v5, label %.loopexit, label %.preheader
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.loopexit: ; preds = %.preheader
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%6 = tail call { <8 x i8>, <8 x i8> } @llvm.arm.neon.vld1x2.v8i8.p0i8(i8* %4)
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%7 = getelementptr inbounds i8, i8* %4, i32 %2
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%8 = tail call { <8 x i8>, <8 x i8> } @llvm.arm.neon.vld1x2.v8i8.p0i8(i8* %7)
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%v6 = tail call { <8 x i8>, <8 x i8> } @llvm.arm.neon.vld1x2.v8i8.p0i8(i8* %v4)
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%v7 = getelementptr inbounds i8, i8* %v4, i32 %v2
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%v8 = tail call { <8 x i8>, <8 x i8> } @llvm.arm.neon.vld1x2.v8i8.p0i8(i8* %v7)
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tail call void @llvm.arm.neon.vst3.p0i8.v8i8(i8* undef, <8 x i8> undef, <8 x i8> undef, <8 x i8> undef, i32 1)
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br label %3
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br label %.preheader
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}
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define void @vld1x3([8 x i32] %0) {
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define void @vld1x3(i8* %v4, i32 %v2) {
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; CHECK-LABEL: vld1x3:
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; CHECK: @ %bb.0:
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; CHECK-NEXT: mov r0, #0
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@ -44,26 +39,21 @@ define void @vld1x3([8 x i32] %0) {
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; CHECK-NEXT: @ in Loop: Header=BB1_1 Depth=1
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; CHECK-NEXT: vst3.8 {d16, d17, d18}, [r0]
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; CHECK-NEXT: b .LBB1_1
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%2 = extractvalue [8 x i32] %0, 5
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br label %3
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3: ; preds = %.loopexit, %1
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%4 = getelementptr inbounds i8, i8* undef, i32 undef
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br label %.preheader
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.preheader: ; preds = %.preheader, %3
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%5 = icmp eq i8* %4, undef
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br i1 %5, label %.loopexit, label %.preheader
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%v5 = icmp eq i8* %v4, undef
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br i1 %v5, label %.loopexit, label %.preheader
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.loopexit: ; preds = %.preheader
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%6 = tail call { <8 x i8>, <8 x i8>, <8 x i8> } @llvm.arm.neon.vld1x3.v8i8.p0i8(i8* %4)
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%7 = getelementptr inbounds i8, i8* %4, i32 %2
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%8 = tail call { <8 x i8>, <8 x i8>, <8 x i8> } @llvm.arm.neon.vld1x3.v8i8.p0i8(i8* %7)
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%v6 = tail call { <8 x i8>, <8 x i8>, <8 x i8> } @llvm.arm.neon.vld1x3.v8i8.p0i8(i8* %v4)
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%v7 = getelementptr inbounds i8, i8* %v4, i32 %v2
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%v8 = tail call { <8 x i8>, <8 x i8>, <8 x i8> } @llvm.arm.neon.vld1x3.v8i8.p0i8(i8* %v7)
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tail call void @llvm.arm.neon.vst3.p0i8.v8i8(i8* undef, <8 x i8> undef, <8 x i8> undef, <8 x i8> undef, i32 1)
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br label %3
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br label %.preheader
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}
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define void @vld1x4([8 x i32] %0) {
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define void @vld1x4(i8* %v4, i32 %v2) {
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; CHECK-LABEL: vld1x4:
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; CHECK: @ %bb.0:
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; CHECK-NEXT: mov r0, #0
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@ -75,23 +65,18 @@ define void @vld1x4([8 x i32] %0) {
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; CHECK-NEXT: @ in Loop: Header=BB2_1 Depth=1
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; CHECK-NEXT: vst3.8 {d16, d17, d18}, [r0]
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; CHECK-NEXT: b .LBB2_1
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%2 = extractvalue [8 x i32] %0, 5
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br label %3
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3: ; preds = %.loopexit, %1
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%4 = getelementptr inbounds i8, i8* undef, i32 undef
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br label %.preheader
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.preheader: ; preds = %.preheader, %3
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%5 = icmp eq i8* %4, undef
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br i1 %5, label %.loopexit, label %.preheader
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%v5 = icmp eq i8* %v4, undef
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br i1 %v5, label %.loopexit, label %.preheader
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.loopexit: ; preds = %.preheader
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%6 = tail call { <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8> } @llvm.arm.neon.vld1x4.v8i8.p0i8(i8* %4)
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%7 = getelementptr inbounds i8, i8* %4, i32 %2
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%8 = tail call { <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8> } @llvm.arm.neon.vld1x4.v8i8.p0i8(i8* %7)
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%v6 = tail call { <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8> } @llvm.arm.neon.vld1x4.v8i8.p0i8(i8* %v4)
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%v7 = getelementptr inbounds i8, i8* %v4, i32 %v2
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%v8 = tail call { <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8> } @llvm.arm.neon.vld1x4.v8i8.p0i8(i8* %v7)
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tail call void @llvm.arm.neon.vst3.p0i8.v8i8(i8* undef, <8 x i8> undef, <8 x i8> undef, <8 x i8> undef, i32 1)
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br label %3
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br label %.preheader
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}
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declare void @llvm.arm.neon.vst3.p0i8.v8i8(i8*, <8 x i8>, <8 x i8>, <8 x i8>, i32)
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