RPCS3/llvm-mirror
1
0
Fork 0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-11-25 04:02:41 +01:00
Code Issues Projects Releases Wiki Activity

[NFCI][TLI] prepare[US]REMEqFold(): don't add nonsensical 'exact' flag to rotates created

Browse Source 
As pointed out by Craig Topper.
This commit is contained in:
Roman Lebedev 2021-07-22 22:59:22 +03:00
parent fa28271fe9
commit fb2a58c6ab
1 changed files with 2 additions and 6 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

8
lib/CodeGen/SelectionDAG/TargetLowering.cpp
View File

@ -5630,10 +5630,8 @@ TargetLowering::prepareUREMEqFold(EVT SETCCVT, SDValue REMNode,
// We need ROTR to do this.
if (!DCI.isBeforeLegalizeOps() && !isOperationLegalOrCustom(ISD::ROTR, VT))
return SDValue();
SDNodeFlags Flags;
Flags.setExact(true);
// UREM: (rotr (mul N, P), K)
Op0 = DAG.getNode(ISD::ROTR, DL, VT, Op0, KVal, Flags);
Op0 = DAG.getNode(ISD::ROTR, DL, VT, Op0, KVal);
Created.push_back(Op0.getNode());
}
@ -5897,10 +5895,8 @@ TargetLowering::prepareSREMEqFold(EVT SETCCVT, SDValue REMNode,
// We need ROTR to do this.
if (!DCI.isBeforeLegalizeOps() && !isOperationLegalOrCustom(ISD::ROTR, VT))
return SDValue();
SDNodeFlags Flags;
Flags.setExact(true);
// SREM: (rotr (add (mul N, P), A), K)
Op0 = DAG.getNode(ISD::ROTR, DL, VT, Op0, KVal, Flags);
Op0 = DAG.getNode(ISD::ROTR, DL, VT, Op0, KVal);
Created.push_back(Op0.getNode());
}