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CMake: Make most target symbols hidden by default

Summary:
For builds with LLVM_BUILD_LLVM_DYLIB=ON and BUILD_SHARED_LIBS=OFF
this change makes all symbols in the target specific libraries hidden
by default.

A new macro called LLVM_EXTERNAL_VISIBILITY has been added to mark symbols in these
libraries public, which is mainly needed for the definitions of the
LLVMInitialize* functions.

This patch reduces the number of public symbols in libLLVM.so by about
25%.  This should improve load times for the dynamic library and also
make abi checker tools, like abidiff require less memory when analyzing
libLLVM.so

One side-effect of this change is that for builds with
LLVM_BUILD_LLVM_DYLIB=ON and LLVM_LINK_LLVM_DYLIB=ON some unittests that
access symbols that are no longer public will need to be statically linked.

Before and after public symbol counts (using gcc 8.2.1, ld.bfd 2.31.1):
nm before/libLLVM-9svn.so | grep ' [A-Zuvw] ' | wc -l
36221
nm after/libLLVM-9svn.so | grep ' [A-Zuvw] ' | wc -l
26278

Reviewers: chandlerc, beanz, mgorny, rnk, hans

Reviewed By: rnk, hans

Subscribers: merge_guards_bot, luismarques, smeenai, ldionne, lenary, s.egerton, pzheng, sameer.abuasal, MaskRay, wuzish, echristo, Jim, hiraditya, michaelplatings, chapuni, jholewinski, arsenm, dschuff, jyknight, dylanmckay, sdardis, nemanjai, jvesely, javed.absar, sbc100, jgravelle-google, aheejin, kbarton, fedor.sergeev, asb, rbar, johnrusso, simoncook, apazos, sabuasal, niosHD, jrtc27, zzheng, edward-jones, mgrang, atanasyan, rogfer01, MartinMosbeck, brucehoult, the_o, PkmX, jocewei, kristina, jsji, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D54439
This commit is contained in:
Tom Stellard 2020-01-14 19:15:07 -08:00
parent b77ca50922
commit fb33bc86b6
116 changed files with 154 additions and 113 deletions

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@ -117,11 +117,17 @@
/// not accessible from outside it. Can also be used to mark variables and /// not accessible from outside it. Can also be used to mark variables and
/// functions, making them private to any shared library they are linked into. /// functions, making them private to any shared library they are linked into.
/// On PE/COFF targets, library visibility is the default, so this isn't needed. /// On PE/COFF targets, library visibility is the default, so this isn't needed.
///
/// LLVM_EXTERNAL_VISIBILITY - classes, functions, and variables marked with
/// this attribute will be made public and visible outside of any shared library
/// they are linked in to.
#if (__has_attribute(visibility) || LLVM_GNUC_PREREQ(4, 0, 0)) && \ #if (__has_attribute(visibility) || LLVM_GNUC_PREREQ(4, 0, 0)) && \
!defined(__MINGW32__) && !defined(__CYGWIN__) && !defined(_WIN32) !defined(__MINGW32__) && !defined(__CYGWIN__) && !defined(_WIN32)
#define LLVM_LIBRARY_VISIBILITY __attribute__ ((visibility("hidden"))) #define LLVM_LIBRARY_VISIBILITY __attribute__ ((visibility("hidden")))
#define LLVM_EXTERNAL_VISIBILITY __attribute__ ((visibility("default")))
#else #else
#define LLVM_LIBRARY_VISIBILITY #define LLVM_LIBRARY_VISIBILITY
#define LLVM_EXTERNAL_VISIBILITY
#endif #endif
#if defined(__GNUC__) #if defined(__GNUC__)

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@ -1298,7 +1298,7 @@ void AArch64AsmPrinter::EmitInstruction(const MachineInstr *MI) {
} }
// Force static initialization. // Force static initialization.
extern "C" void LLVMInitializeAArch64AsmPrinter() { extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeAArch64AsmPrinter() {
RegisterAsmPrinter<AArch64AsmPrinter> X(getTheAArch64leTarget()); RegisterAsmPrinter<AArch64AsmPrinter> X(getTheAArch64leTarget());
RegisterAsmPrinter<AArch64AsmPrinter> Y(getTheAArch64beTarget()); RegisterAsmPrinter<AArch64AsmPrinter> Y(getTheAArch64beTarget());
RegisterAsmPrinter<AArch64AsmPrinter> Z(getTheARM64Target()); RegisterAsmPrinter<AArch64AsmPrinter> Z(getTheARM64Target());

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@ -154,7 +154,7 @@ static cl::opt<bool>
cl::desc("Enable the AAcrh64 branch target pass"), cl::desc("Enable the AAcrh64 branch target pass"),
cl::init(true)); cl::init(true));
extern "C" void LLVMInitializeAArch64Target() { extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeAArch64Target() {
// Register the target. // Register the target.
RegisterTargetMachine<AArch64leTargetMachine> X(getTheAArch64leTarget()); RegisterTargetMachine<AArch64leTargetMachine> X(getTheAArch64leTarget());
RegisterTargetMachine<AArch64beTargetMachine> Y(getTheAArch64beTarget()); RegisterTargetMachine<AArch64beTargetMachine> Y(getTheAArch64beTarget());

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@ -5515,7 +5515,7 @@ AArch64AsmParser::classifySymbolRef(const MCExpr *Expr,
} }
/// Force static initialization. /// Force static initialization.
extern "C" void LLVMInitializeAArch64AsmParser() { extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeAArch64AsmParser() {
RegisterMCAsmParser<AArch64AsmParser> X(getTheAArch64leTarget()); RegisterMCAsmParser<AArch64AsmParser> X(getTheAArch64leTarget());
RegisterMCAsmParser<AArch64AsmParser> Y(getTheAArch64beTarget()); RegisterMCAsmParser<AArch64AsmParser> Y(getTheAArch64beTarget());
RegisterMCAsmParser<AArch64AsmParser> Z(getTheARM64Target()); RegisterMCAsmParser<AArch64AsmParser> Z(getTheARM64Target());

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@ -277,7 +277,7 @@ createAArch64ExternalSymbolizer(const Triple &TT, LLVMOpInfoCallback GetOpInfo,
SymbolLookUp, DisInfo); SymbolLookUp, DisInfo);
} }
extern "C" void LLVMInitializeAArch64Disassembler() { extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeAArch64Disassembler() {
TargetRegistry::RegisterMCDisassembler(getTheAArch64leTarget(), TargetRegistry::RegisterMCDisassembler(getTheAArch64leTarget(),
createAArch64Disassembler); createAArch64Disassembler);
TargetRegistry::RegisterMCDisassembler(getTheAArch64beTarget(), TargetRegistry::RegisterMCDisassembler(getTheAArch64beTarget(),

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@ -366,7 +366,7 @@ static MCInstrAnalysis *createAArch64InstrAnalysis(const MCInstrInfo *Info) {
} }
// Force static initialization. // Force static initialization.
extern "C" void LLVMInitializeAArch64TargetMC() { extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeAArch64TargetMC() {
for (Target *T : {&getTheAArch64leTarget(), &getTheAArch64beTarget(), for (Target *T : {&getTheAArch64leTarget(), &getTheAArch64beTarget(),
&getTheAArch64_32Target(), &getTheARM64Target(), &getTheAArch64_32Target(), &getTheARM64Target(),
&getTheARM64_32Target()}) { &getTheARM64_32Target()}) {

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@ -31,7 +31,7 @@ Target &llvm::getTheARM64_32Target() {
return TheARM64_32Target; return TheARM64_32Target;
} }
extern "C" void LLVMInitializeAArch64TargetInfo() { extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeAArch64TargetInfo() {
// Now register the "arm64" name for use with "-march". We don't want it to // Now register the "arm64" name for use with "-march". We don't want it to
// take possession of the Triple::aarch64 tags though. // take possession of the Triple::aarch64 tags though.
TargetRegistry::RegisterTarget(getTheARM64Target(), "arm64", TargetRegistry::RegisterTarget(getTheARM64Target(), "arm64",

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@ -90,7 +90,7 @@ createAMDGPUAsmPrinterPass(TargetMachine &tm,
return new AMDGPUAsmPrinter(tm, std::move(Streamer)); return new AMDGPUAsmPrinter(tm, std::move(Streamer));
} }
extern "C" void LLVMInitializeAMDGPUAsmPrinter() { extern "C" void LLVM_EXTERNAL_VISIBILITY LLVMInitializeAMDGPUAsmPrinter() {
TargetRegistry::RegisterAsmPrinter(getTheAMDGPUTarget(), TargetRegistry::RegisterAsmPrinter(getTheAMDGPUTarget(),
llvm::createR600AsmPrinterPass); llvm::createR600AsmPrinterPass);
TargetRegistry::RegisterAsmPrinter(getTheGCNTarget(), TargetRegistry::RegisterAsmPrinter(getTheGCNTarget(),

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@ -183,7 +183,7 @@ static cl::opt<bool> EnableScalarIRPasses(
cl::init(true), cl::init(true),
cl::Hidden); cl::Hidden);
extern "C" void LLVMInitializeAMDGPUTarget() { extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeAMDGPUTarget() {
// Register the target // Register the target
RegisterTargetMachine<R600TargetMachine> X(getTheAMDGPUTarget()); RegisterTargetMachine<R600TargetMachine> X(getTheAMDGPUTarget());
RegisterTargetMachine<GCNTargetMachine> Y(getTheGCNTarget()); RegisterTargetMachine<GCNTargetMachine> Y(getTheGCNTarget());

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@ -6980,7 +6980,7 @@ AMDGPUOperand::Ptr AMDGPUAsmParser::defaultABID() const {
} }
/// Force static initialization. /// Force static initialization.
extern "C" void LLVMInitializeAMDGPUAsmParser() { extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeAMDGPUAsmParser() {
RegisterMCAsmParser<AMDGPUAsmParser> A(getTheAMDGPUTarget()); RegisterMCAsmParser<AMDGPUAsmParser> A(getTheAMDGPUTarget());
RegisterMCAsmParser<AMDGPUAsmParser> B(getTheGCNTarget()); RegisterMCAsmParser<AMDGPUAsmParser> B(getTheGCNTarget());
} }

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@ -1252,7 +1252,7 @@ static MCDisassembler *createAMDGPUDisassembler(const Target &T,
return new AMDGPUDisassembler(STI, Ctx, T.createMCInstrInfo()); return new AMDGPUDisassembler(STI, Ctx, T.createMCInstrInfo());
} }
extern "C" void LLVMInitializeAMDGPUDisassembler() { extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeAMDGPUDisassembler() {
TargetRegistry::RegisterMCDisassembler(getTheGCNTarget(), TargetRegistry::RegisterMCDisassembler(getTheGCNTarget(),
createAMDGPUDisassembler); createAMDGPUDisassembler);
TargetRegistry::RegisterMCSymbolizer(getTheGCNTarget(), TargetRegistry::RegisterMCSymbolizer(getTheGCNTarget(),

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@ -134,7 +134,7 @@ static MCInstrAnalysis *createAMDGPUMCInstrAnalysis(const MCInstrInfo *Info) {
return new AMDGPUMCInstrAnalysis(Info); return new AMDGPUMCInstrAnalysis(Info);
} }
extern "C" void LLVMInitializeAMDGPUTargetMC() { extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeAMDGPUTargetMC() {
TargetRegistry::RegisterMCInstrInfo(getTheGCNTarget(), createAMDGPUMCInstrInfo); TargetRegistry::RegisterMCInstrInfo(getTheGCNTarget(), createAMDGPUMCInstrInfo);
TargetRegistry::RegisterMCInstrInfo(getTheAMDGPUTarget(), createR600MCInstrInfo); TargetRegistry::RegisterMCInstrInfo(getTheAMDGPUTarget(), createR600MCInstrInfo);

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@ -28,7 +28,7 @@ Target &llvm::getTheGCNTarget() {
} }
/// Extern function to initialize the targets for the AMDGPU backend /// Extern function to initialize the targets for the AMDGPU backend
extern "C" void LLVMInitializeAMDGPUTargetInfo() { extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeAMDGPUTargetInfo() {
RegisterTarget<Triple::r600, false> R600(getTheAMDGPUTarget(), "r600", RegisterTarget<Triple::r600, false> R600(getTheAMDGPUTarget(), "r600",
"AMD GPUs HD2XXX-HD6XXX", "AMDGPU"); "AMD GPUs HD2XXX-HD6XXX", "AMDGPU");
RegisterTarget<Triple::amdgcn, false> GCN(getTheGCNTarget(), "amdgcn", RegisterTarget<Triple::amdgcn, false> GCN(getTheGCNTarget(), "amdgcn",

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@ -62,6 +62,6 @@ void ARCAsmPrinter::EmitInstruction(const MachineInstr *MI) {
} }
// Force static initialization. // Force static initialization.
extern "C" void LLVMInitializeARCAsmPrinter() { extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeARCAsmPrinter() {
RegisterAsmPrinter<ARCAsmPrinter> X(getTheARCTarget()); RegisterAsmPrinter<ARCAsmPrinter> X(getTheARCTarget());
} }

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@ -81,7 +81,7 @@ void ARCPassConfig::addPreRegAlloc() {
} }
// Force static initialization. // Force static initialization.
extern "C" void LLVMInitializeARCTarget() { extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeARCTarget() {
RegisterTargetMachine<ARCTargetMachine> X(getTheARCTarget()); RegisterTargetMachine<ARCTargetMachine> X(getTheARCTarget());
} }

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@ -363,7 +363,7 @@ static MCDisassembler *createARCDisassembler(const Target &T,
return new ARCDisassembler(STI, Ctx, T.createMCInstrInfo()); return new ARCDisassembler(STI, Ctx, T.createMCInstrInfo());
} }
extern "C" void LLVMInitializeARCDisassembler() { extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeARCDisassembler() {
// Register the disassembler. // Register the disassembler.
TargetRegistry::RegisterMCDisassembler(getTheARCTarget(), TargetRegistry::RegisterMCDisassembler(getTheARCTarget(),
createARCDisassembler); createARCDisassembler);

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@ -82,7 +82,7 @@ static MCTargetStreamer *createTargetAsmStreamer(MCStreamer &S,
} }
// Force static initialization. // Force static initialization.
extern "C" void LLVMInitializeARCTargetMC() { extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeARCTargetMC() {
// Register the MC asm info. // Register the MC asm info.
Target &TheARCTarget = getTheARCTarget(); Target &TheARCTarget = getTheARCTarget();
RegisterMCAsmInfoFn X(TheARCTarget, createARCMCAsmInfo); RegisterMCAsmInfoFn X(TheARCTarget, createARCMCAsmInfo);

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@ -16,6 +16,6 @@ Target &llvm::getTheARCTarget() {
return TheARCTarget; return TheARCTarget;
} }
extern "C" void LLVMInitializeARCTargetInfo() { extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeARCTargetInfo() {
RegisterTarget<Triple::arc> X(getTheARCTarget(), "arc", "ARC", "ARC"); RegisterTarget<Triple::arc> X(getTheARCTarget(), "arc", "ARC", "ARC");
} }

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@ -2148,7 +2148,7 @@ void ARMAsmPrinter::EmitInstruction(const MachineInstr *MI) {
//===----------------------------------------------------------------------===// //===----------------------------------------------------------------------===//
// Force static initialization. // Force static initialization.
extern "C" void LLVMInitializeARMAsmPrinter() { extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeARMAsmPrinter() {
RegisterAsmPrinter<ARMAsmPrinter> X(getTheARMLETarget()); RegisterAsmPrinter<ARMAsmPrinter> X(getTheARMLETarget());
RegisterAsmPrinter<ARMAsmPrinter> Y(getTheARMBETarget()); RegisterAsmPrinter<ARMAsmPrinter> Y(getTheARMBETarget());
RegisterAsmPrinter<ARMAsmPrinter> A(getTheThumbLETarget()); RegisterAsmPrinter<ARMAsmPrinter> A(getTheThumbLETarget());

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@ -79,7 +79,7 @@ namespace llvm {
void initializeARMExecutionDomainFixPass(PassRegistry&); void initializeARMExecutionDomainFixPass(PassRegistry&);
} }
extern "C" void LLVMInitializeARMTarget() { extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeARMTarget() {
// Register the target. // Register the target.
RegisterTargetMachine<ARMLETargetMachine> X(getTheARMLETarget()); RegisterTargetMachine<ARMLETargetMachine> X(getTheARMLETarget());
RegisterTargetMachine<ARMLETargetMachine> A(getTheThumbLETarget()); RegisterTargetMachine<ARMLETargetMachine> A(getTheThumbLETarget());

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@ -11546,7 +11546,7 @@ bool ARMAsmParser::parseDirectiveThumbSet(SMLoc L) {
} }
/// Force static initialization. /// Force static initialization.
extern "C" void LLVMInitializeARMAsmParser() { extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeARMAsmParser() {
RegisterMCAsmParser<ARMAsmParser> X(getTheARMLETarget()); RegisterMCAsmParser<ARMAsmParser> X(getTheARMLETarget());
RegisterMCAsmParser<ARMAsmParser> Y(getTheARMBETarget()); RegisterMCAsmParser<ARMAsmParser> Y(getTheARMBETarget());
RegisterMCAsmParser<ARMAsmParser> A(getTheThumbLETarget()); RegisterMCAsmParser<ARMAsmParser> A(getTheThumbLETarget());

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@ -1099,7 +1099,7 @@ DecodeStatus ARMDisassembler::getThumbInstruction(MCInst &MI, uint64_t &Size,
return MCDisassembler::Fail; return MCDisassembler::Fail;
} }
extern "C" void LLVMInitializeARMDisassembler() { extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeARMDisassembler() {
TargetRegistry::RegisterMCDisassembler(getTheARMLETarget(), TargetRegistry::RegisterMCDisassembler(getTheARMLETarget(),
createARMDisassembler); createARMDisassembler);
TargetRegistry::RegisterMCDisassembler(getTheARMBETarget(), TargetRegistry::RegisterMCDisassembler(getTheARMBETarget(),

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@ -317,7 +317,7 @@ static MCInstrAnalysis *createThumbMCInstrAnalysis(const MCInstrInfo *Info) {
} }
// Force static initialization. // Force static initialization.
extern "C" void LLVMInitializeARMTargetMC() { extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeARMTargetMC() {
for (Target *T : {&getTheARMLETarget(), &getTheARMBETarget(), for (Target *T : {&getTheARMLETarget(), &getTheARMBETarget(),
&getTheThumbLETarget(), &getTheThumbBETarget()}) { &getTheThumbLETarget(), &getTheThumbBETarget()}) {
// Register the MC asm info. // Register the MC asm info.

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@ -27,7 +27,7 @@ Target &llvm::getTheThumbBETarget() {
return TheThumbBETarget; return TheThumbBETarget;
} }
extern "C" void LLVMInitializeARMTargetInfo() { extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeARMTargetInfo() {
RegisterTarget<Triple::arm, /*HasJIT=*/true> X(getTheARMLETarget(), "arm", RegisterTarget<Triple::arm, /*HasJIT=*/true> X(getTheARMLETarget(), "arm",
"ARM", "ARM"); "ARM", "ARM");
RegisterTarget<Triple::armeb, /*HasJIT=*/true> Y(getTheARMBETarget(), "armeb", RegisterTarget<Triple::armeb, /*HasJIT=*/true> Y(getTheARMBETarget(), "armeb",

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@ -178,7 +178,7 @@ void AVRAsmPrinter::EmitInstruction(const MachineInstr *MI) {
} // end of namespace llvm } // end of namespace llvm
extern "C" void LLVMInitializeAVRAsmPrinter() { extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeAVRAsmPrinter() {
llvm::RegisterAsmPrinter<llvm::AVRAsmPrinter> X(llvm::getTheAVRTarget()); llvm::RegisterAsmPrinter<llvm::AVRAsmPrinter> X(llvm::getTheAVRTarget());
} }

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@ -76,7 +76,7 @@ TargetPassConfig *AVRTargetMachine::createPassConfig(PassManagerBase &PM) {
return new AVRPassConfig(*this, PM); return new AVRPassConfig(*this, PM);
} }
extern "C" void LLVMInitializeAVRTarget() { extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeAVRTarget() {
// Register the target. // Register the target.
RegisterTargetMachine<AVRTargetMachine> X(getTheAVRTarget()); RegisterTargetMachine<AVRTargetMachine> X(getTheAVRTarget());

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@ -682,7 +682,7 @@ bool AVRAsmParser::parseLiteralValues(unsigned SizeInBytes, SMLoc L) {
return (parseMany(parseOne)); return (parseMany(parseOne));
} }
extern "C" void LLVMInitializeAVRAsmParser() { extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeAVRAsmParser() {
RegisterMCAsmParser<AVRAsmParser> X(getTheAVRTarget()); RegisterMCAsmParser<AVRAsmParser> X(getTheAVRTarget());
} }

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@ -51,7 +51,7 @@ static MCDisassembler *createAVRDisassembler(const Target &T,
} }
extern "C" void LLVMInitializeAVRDisassembler() { extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeAVRDisassembler() {
// Register the disassembler. // Register the disassembler.
TargetRegistry::RegisterMCDisassembler(getTheAVRTarget(), TargetRegistry::RegisterMCDisassembler(getTheAVRTarget(),
createAVRDisassembler); createAVRDisassembler);

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@ -89,7 +89,7 @@ static MCTargetStreamer *createMCAsmTargetStreamer(MCStreamer &S,
return new AVRTargetAsmStreamer(S); return new AVRTargetAsmStreamer(S);
} }
extern "C" void LLVMInitializeAVRTargetMC() { extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeAVRTargetMC() {
// Register the MC asm info. // Register the MC asm info.
RegisterMCAsmInfo<AVRMCAsmInfo> X(getTheAVRTarget()); RegisterMCAsmInfo<AVRMCAsmInfo> X(getTheAVRTarget());

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@ -15,7 +15,7 @@ Target &getTheAVRTarget() {
} }
} }
extern "C" void LLVMInitializeAVRTargetInfo() { extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeAVRTargetInfo() {
llvm::RegisterTarget<llvm::Triple::avr> X(llvm::getTheAVRTarget(), "avr", llvm::RegisterTarget<llvm::Triple::avr> X(llvm::getTheAVRTarget(), "avr",
"Atmel AVR Microcontroller", "AVR"); "Atmel AVR Microcontroller", "AVR");
} }

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@ -493,7 +493,7 @@ bool BPFAsmParser::ParseInstruction(ParseInstructionInfo &Info, StringRef Name,
bool BPFAsmParser::ParseDirective(AsmToken DirectiveID) { return true; } bool BPFAsmParser::ParseDirective(AsmToken DirectiveID) { return true; }
extern "C" void LLVMInitializeBPFAsmParser() { extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeBPFAsmParser() {
RegisterMCAsmParser<BPFAsmParser> X(getTheBPFTarget()); RegisterMCAsmParser<BPFAsmParser> X(getTheBPFTarget());
RegisterMCAsmParser<BPFAsmParser> Y(getTheBPFleTarget()); RegisterMCAsmParser<BPFAsmParser> Y(getTheBPFleTarget());
RegisterMCAsmParser<BPFAsmParser> Z(getTheBPFbeTarget()); RegisterMCAsmParser<BPFAsmParser> Z(getTheBPFbeTarget());

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@ -148,7 +148,7 @@ void BPFAsmPrinter::EmitInstruction(const MachineInstr *MI) {
} }
// Force static initialization. // Force static initialization.
extern "C" void LLVMInitializeBPFAsmPrinter() { extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeBPFAsmPrinter() {
RegisterAsmPrinter<BPFAsmPrinter> X(getTheBPFleTarget()); RegisterAsmPrinter<BPFAsmPrinter> X(getTheBPFleTarget());
RegisterAsmPrinter<BPFAsmPrinter> Y(getTheBPFbeTarget()); RegisterAsmPrinter<BPFAsmPrinter> Y(getTheBPFbeTarget());
RegisterAsmPrinter<BPFAsmPrinter> Z(getTheBPFTarget()); RegisterAsmPrinter<BPFAsmPrinter> Z(getTheBPFTarget());

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@ -27,7 +27,7 @@ static cl::
opt<bool> DisableMIPeephole("disable-bpf-peephole", cl::Hidden, opt<bool> DisableMIPeephole("disable-bpf-peephole", cl::Hidden,
cl::desc("Disable machine peepholes for BPF")); cl::desc("Disable machine peepholes for BPF"));
extern "C" void LLVMInitializeBPFTarget() { extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeBPFTarget() {
// Register the target. // Register the target.
RegisterTargetMachine<BPFTargetMachine> X(getTheBPFleTarget()); RegisterTargetMachine<BPFTargetMachine> X(getTheBPFleTarget());
RegisterTargetMachine<BPFTargetMachine> Y(getTheBPFbeTarget()); RegisterTargetMachine<BPFTargetMachine> Y(getTheBPFbeTarget());

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@ -83,7 +83,7 @@ static MCDisassembler *createBPFDisassembler(const Target &T,
} }
extern "C" void LLVMInitializeBPFDisassembler() { extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeBPFDisassembler() {
// Register the disassembler. // Register the disassembler.
TargetRegistry::RegisterMCDisassembler(getTheBPFTarget(), TargetRegistry::RegisterMCDisassembler(getTheBPFTarget(),
createBPFDisassembler); createBPFDisassembler);

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@ -97,7 +97,7 @@ static MCInstrAnalysis *createBPFInstrAnalysis(const MCInstrInfo *Info) {
return new BPFMCInstrAnalysis(Info); return new BPFMCInstrAnalysis(Info);
} }
extern "C" void LLVMInitializeBPFTargetMC() { extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeBPFTargetMC() {
for (Target *T : for (Target *T :
{&getTheBPFleTarget(), &getTheBPFbeTarget(), &getTheBPFTarget()}) { {&getTheBPFleTarget(), &getTheBPFbeTarget(), &getTheBPFTarget()}) {
// Register the MC asm info. // Register the MC asm info.

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@ -24,7 +24,7 @@ Target &llvm::getTheBPFTarget() {
return TheBPFTarget; return TheBPFTarget;
} }
extern "C" void LLVMInitializeBPFTargetInfo() { extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeBPFTargetInfo() {
TargetRegistry::RegisterTarget(getTheBPFTarget(), "bpf", "BPF (host endian)", TargetRegistry::RegisterTarget(getTheBPFTarget(), "bpf", "BPF (host endian)",
"BPF", [](Triple::ArchType) { return false; }, "BPF", [](Triple::ArchType) { return false; },
true); true);

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@ -13,6 +13,14 @@ add_llvm_component_library(LLVMTarget
${LLVM_MAIN_INCLUDE_DIR}/llvm/Target ${LLVM_MAIN_INCLUDE_DIR}/llvm/Target
) )
# When building shared objects for each target there are some internal APIs
# that are used across shared objects which we can't hide.
if (NOT BUILD_SHARED_LIBS AND NOT APPLE)
# Set default visibility to hidden, so we don't export all the Target classes
# in libLLVM.so.
set(CMAKE_CXX_VISIBILITY_PRESET hidden)
endif()
foreach(t ${LLVM_TARGETS_TO_BUILD}) foreach(t ${LLVM_TARGETS_TO_BUILD})
message(STATUS "Targeting ${t}") message(STATUS "Targeting ${t}")
add_subdirectory(${t}) add_subdirectory(${t})

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@ -813,10 +813,10 @@ bool HexagonAsmParser::RegisterMatchesArch(unsigned MatchNum) const {
return true; return true;
} }
// extern "C" void LLVMInitializeHexagonAsmLexer(); // extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeHexagonAsmLexer();
/// Force static initialization. /// Force static initialization.
extern "C" void LLVMInitializeHexagonAsmParser() { extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeHexagonAsmParser() {
RegisterMCAsmParser<HexagonAsmParser> X(getTheHexagonTarget()); RegisterMCAsmParser<HexagonAsmParser> X(getTheHexagonTarget());
} }

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@ -156,7 +156,7 @@ static MCDisassembler *createHexagonDisassembler(const Target &T,
return new HexagonDisassembler(STI, Ctx, T.createMCInstrInfo()); return new HexagonDisassembler(STI, Ctx, T.createMCInstrInfo());
} }
extern "C" void LLVMInitializeHexagonDisassembler() { extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeHexagonDisassembler() {
TargetRegistry::RegisterMCDisassembler(getTheHexagonTarget(), TargetRegistry::RegisterMCDisassembler(getTheHexagonTarget(),
createHexagonDisassembler); createHexagonDisassembler);
} }

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@ -771,6 +771,6 @@ void HexagonAsmPrinter::EmitInstruction(const MachineInstr *MI) {
OutStreamer->EmitInstruction(MCB, getSubtargetInfo()); OutStreamer->EmitInstruction(MCB, getSubtargetInfo());
} }
extern "C" void LLVMInitializeHexagonAsmPrinter() { extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeHexagonAsmPrinter() {
RegisterAsmPrinter<HexagonAsmPrinter> X(getTheHexagonTarget()); RegisterAsmPrinter<HexagonAsmPrinter> X(getTheHexagonTarget());
} }

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@ -180,7 +180,7 @@ static Reloc::Model getEffectiveRelocModel(Optional<Reloc::Model> RM) {
return *RM; return *RM;
} }
extern "C" void LLVMInitializeHexagonTarget() { extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeHexagonTarget() {
// Register the target. // Register the target.
RegisterTargetMachine<HexagonTargetMachine> X(getTheHexagonTarget()); RegisterTargetMachine<HexagonTargetMachine> X(getTheHexagonTarget());

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@ -456,7 +456,7 @@ static MCInstrAnalysis *createHexagonMCInstrAnalysis(const MCInstrInfo *Info) {
} }
// Force static initialization. // Force static initialization.
extern "C" void LLVMInitializeHexagonTargetMC() { extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeHexagonTargetMC() {
// Register the MC asm info. // Register the MC asm info.
RegisterMCAsmInfoFn X(getTheHexagonTarget(), createHexagonMCAsmInfo); RegisterMCAsmInfoFn X(getTheHexagonTarget(), createHexagonMCAsmInfo);

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@ -15,7 +15,7 @@ Target &llvm::getTheHexagonTarget() {
return TheHexagonTarget; return TheHexagonTarget;
} }
extern "C" void LLVMInitializeHexagonTargetInfo() { extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeHexagonTargetInfo() {
RegisterTarget<Triple::hexagon, /*HasJIT=*/true> X( RegisterTarget<Triple::hexagon, /*HasJIT=*/true> X(
getTheHexagonTarget(), "hexagon", "Hexagon", "Hexagon"); getTheHexagonTarget(), "hexagon", "Hexagon", "Hexagon");
} }

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@ -1224,6 +1224,6 @@ bool LanaiAsmParser::ParseInstruction(ParseInstructionInfo & /*Info*/,
#define GET_MATCHER_IMPLEMENTATION #define GET_MATCHER_IMPLEMENTATION
#include "LanaiGenAsmMatcher.inc" #include "LanaiGenAsmMatcher.inc"
extern "C" void LLVMInitializeLanaiAsmParser() { extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeLanaiAsmParser() {
RegisterMCAsmParser<LanaiAsmParser> x(getTheLanaiTarget()); RegisterMCAsmParser<LanaiAsmParser> x(getTheLanaiTarget());
} }

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@ -36,7 +36,7 @@ static MCDisassembler *createLanaiDisassembler(const Target & /*T*/,
return new LanaiDisassembler(STI, Ctx); return new LanaiDisassembler(STI, Ctx);
} }
extern "C" void LLVMInitializeLanaiDisassembler() { extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeLanaiDisassembler() {
// Register the disassembler // Register the disassembler
TargetRegistry::RegisterMCDisassembler(getTheLanaiTarget(), TargetRegistry::RegisterMCDisassembler(getTheLanaiTarget(),
createLanaiDisassembler); createLanaiDisassembler);

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@ -237,6 +237,6 @@ bool LanaiAsmPrinter::isBlockOnlyReachableByFallthrough(
} }
// Force static initialization. // Force static initialization.
extern "C" void LLVMInitializeLanaiAsmPrinter() { extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeLanaiAsmPrinter() {
RegisterAsmPrinter<LanaiAsmPrinter> X(getTheLanaiTarget()); RegisterAsmPrinter<LanaiAsmPrinter> X(getTheLanaiTarget());
} }

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@ -30,7 +30,7 @@ namespace llvm {
void initializeLanaiMemAluCombinerPass(PassRegistry &); void initializeLanaiMemAluCombinerPass(PassRegistry &);
} // namespace llvm } // namespace llvm
extern "C" void LLVMInitializeLanaiTarget() { extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeLanaiTarget() {
// Register the target. // Register the target.
RegisterTargetMachine<LanaiTargetMachine> registered_target( RegisterTargetMachine<LanaiTargetMachine> registered_target(
getTheLanaiTarget()); getTheLanaiTarget());

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@ -123,7 +123,7 @@ static MCInstrAnalysis *createLanaiInstrAnalysis(const MCInstrInfo *Info) {
return new LanaiMCInstrAnalysis(Info); return new LanaiMCInstrAnalysis(Info);
} }
extern "C" void LLVMInitializeLanaiTargetMC() { extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeLanaiTargetMC() {
// Register the MC asm info. // Register the MC asm info.
RegisterMCAsmInfo<LanaiMCAsmInfo> X(getTheLanaiTarget()); RegisterMCAsmInfo<LanaiMCAsmInfo> X(getTheLanaiTarget());

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@ -16,7 +16,7 @@ Target &llvm::getTheLanaiTarget() {
return TheLanaiTarget; return TheLanaiTarget;
} }
extern "C" void LLVMInitializeLanaiTargetInfo() { extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeLanaiTargetInfo() {
RegisterTarget<Triple::lanai> X(getTheLanaiTarget(), "lanai", "Lanai", RegisterTarget<Triple::lanai> X(getTheLanaiTarget(), "lanai", "Lanai",
"Lanai"); "Lanai");
} }

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@ -529,7 +529,7 @@ bool MSP430AsmParser::ParseLiteralValues(unsigned Size, SMLoc L) {
return (parseMany(parseOne)); return (parseMany(parseOne));
} }
extern "C" void LLVMInitializeMSP430AsmParser() { extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeMSP430AsmParser() {
RegisterMCAsmParser<MSP430AsmParser> X(getTheMSP430Target()); RegisterMCAsmParser<MSP430AsmParser> X(getTheMSP430Target());
} }

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@ -58,7 +58,7 @@ static MCDisassembler *createMSP430Disassembler(const Target &T,
return new MSP430Disassembler(STI, Ctx); return new MSP430Disassembler(STI, Ctx);
} }
extern "C" void LLVMInitializeMSP430Disassembler() { extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeMSP430Disassembler() {
TargetRegistry::RegisterMCDisassembler(getTheMSP430Target(), TargetRegistry::RegisterMCDisassembler(getTheMSP430Target(),
createMSP430Disassembler); createMSP430Disassembler);
} }

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@ -57,7 +57,7 @@ static MCInstPrinter *createMSP430MCInstPrinter(const Triple &T,
return nullptr; return nullptr;
} }
extern "C" void LLVMInitializeMSP430TargetMC() { extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeMSP430TargetMC() {
Target &T = getTheMSP430Target(); Target &T = getTheMSP430Target();
RegisterMCAsmInfo<MSP430MCAsmInfo> X(T); RegisterMCAsmInfo<MSP430MCAsmInfo> X(T);

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@ -185,6 +185,6 @@ bool MSP430AsmPrinter::runOnMachineFunction(MachineFunction &MF) {
} }
// Force static initialization. // Force static initialization.
extern "C" void LLVMInitializeMSP430AsmPrinter() { extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeMSP430AsmPrinter() {
RegisterAsmPrinter<MSP430AsmPrinter> X(getTheMSP430Target()); RegisterAsmPrinter<MSP430AsmPrinter> X(getTheMSP430Target());
} }

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@ -21,7 +21,7 @@
#include "llvm/Support/TargetRegistry.h" #include "llvm/Support/TargetRegistry.h"
using namespace llvm; using namespace llvm;
extern "C" void LLVMInitializeMSP430Target() { extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeMSP430Target() {
// Register the target. // Register the target.
RegisterTargetMachine<MSP430TargetMachine> X(getTheMSP430Target()); RegisterTargetMachine<MSP430TargetMachine> X(getTheMSP430Target());
} }

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@ -15,7 +15,7 @@ Target &llvm::getTheMSP430Target() {
return TheMSP430Target; return TheMSP430Target;
} }
extern "C" void LLVMInitializeMSP430TargetInfo() { extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeMSP430TargetInfo() {
RegisterTarget<Triple::msp430> X(getTheMSP430Target(), "msp430", RegisterTarget<Triple::msp430> X(getTheMSP430Target(), "msp430",
"MSP430 [experimental]", "MSP430"); "MSP430 [experimental]", "MSP430");
} }

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@ -8645,7 +8645,7 @@ bool MipsAsmParser::parseInternalDirectiveReallowModule() {
return false; return false;
} }
extern "C" void LLVMInitializeMipsAsmParser() { extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeMipsAsmParser() {
RegisterMCAsmParser<MipsAsmParser> X(getTheMipsTarget()); RegisterMCAsmParser<MipsAsmParser> X(getTheMipsTarget());
RegisterMCAsmParser<MipsAsmParser> Y(getTheMipselTarget()); RegisterMCAsmParser<MipsAsmParser> Y(getTheMipselTarget());
RegisterMCAsmParser<MipsAsmParser> A(getTheMips64Target()); RegisterMCAsmParser<MipsAsmParser> A(getTheMips64Target());

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@ -563,7 +563,7 @@ static MCDisassembler *createMipselDisassembler(
return new MipsDisassembler(STI, Ctx, false); return new MipsDisassembler(STI, Ctx, false);
} }
extern "C" void LLVMInitializeMipsDisassembler() { extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeMipsDisassembler() {
// Register the disassembler. // Register the disassembler.
TargetRegistry::RegisterMCDisassembler(getTheMipsTarget(), TargetRegistry::RegisterMCDisassembler(getTheMipsTarget(),
createMipsDisassembler); createMipsDisassembler);

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@ -166,7 +166,7 @@ static MCInstrAnalysis *createMipsMCInstrAnalysis(const MCInstrInfo *Info) {
return new MipsMCInstrAnalysis(Info); return new MipsMCInstrAnalysis(Info);
} }
extern "C" void LLVMInitializeMipsTargetMC() { extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeMipsTargetMC() {
for (Target *T : {&getTheMipsTarget(), &getTheMipselTarget(), for (Target *T : {&getTheMipsTarget(), &getTheMipselTarget(),
&getTheMips64Target(), &getTheMips64elTarget()}) { &getTheMips64Target(), &getTheMips64elTarget()}) {
// Register the MC asm info. // Register the MC asm info.

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@ -1306,7 +1306,7 @@ bool MipsAsmPrinter::isLongBranchPseudo(int Opcode) const {
} }
// Force static initialization. // Force static initialization.
extern "C" void LLVMInitializeMipsAsmPrinter() { extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeMipsAsmPrinter() {
RegisterAsmPrinter<MipsAsmPrinter> X(getTheMipsTarget()); RegisterAsmPrinter<MipsAsmPrinter> X(getTheMipsTarget());
RegisterAsmPrinter<MipsAsmPrinter> Y(getTheMipselTarget()); RegisterAsmPrinter<MipsAsmPrinter> Y(getTheMipselTarget());
RegisterAsmPrinter<MipsAsmPrinter> A(getTheMips64Target()); RegisterAsmPrinter<MipsAsmPrinter> A(getTheMips64Target());

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@ -45,7 +45,7 @@ using namespace llvm;
#define DEBUG_TYPE "mips" #define DEBUG_TYPE "mips"
extern "C" void LLVMInitializeMipsTarget() { extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeMipsTarget() {
// Register the target. // Register the target.
RegisterTargetMachine<MipsebTargetMachine> X(getTheMipsTarget()); RegisterTargetMachine<MipsebTargetMachine> X(getTheMipsTarget());
RegisterTargetMachine<MipselTargetMachine> Y(getTheMipselTarget()); RegisterTargetMachine<MipselTargetMachine> Y(getTheMipselTarget());

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@ -27,7 +27,7 @@ Target &llvm::getTheMips64elTarget() {
return TheMips64elTarget; return TheMips64elTarget;
} }
extern "C" void LLVMInitializeMipsTargetInfo() { extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeMipsTargetInfo() {
RegisterTarget<Triple::mips, RegisterTarget<Triple::mips,
/*HasJIT=*/true> /*HasJIT=*/true>
X(getTheMipsTarget(), "mips", "MIPS (32-bit big endian)", "Mips"); X(getTheMipsTarget(), "mips", "MIPS (32-bit big endian)", "Mips");

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@ -66,7 +66,7 @@ static MCTargetStreamer *createTargetAsmStreamer(MCStreamer &S,
} }
// Force static initialization. // Force static initialization.
extern "C" void LLVMInitializeNVPTXTargetMC() { extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeNVPTXTargetMC() {
for (Target *T : {&getTheNVPTXTarget32(), &getTheNVPTXTarget64()}) { for (Target *T : {&getTheNVPTXTarget32(), &getTheNVPTXTarget64()}) {
// Register the MC asm info. // Register the MC asm info.
RegisterMCAsmInfo<NVPTXMCAsmInfo> X(*T); RegisterMCAsmInfo<NVPTXMCAsmInfo> X(*T);

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@ -2258,7 +2258,7 @@ void NVPTXAsmPrinter::printMemOperand(const MachineInstr *MI, int opNum,
} }
// Force static initialization. // Force static initialization.
extern "C" void LLVMInitializeNVPTXAsmPrinter() { extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeNVPTXAsmPrinter() {
RegisterAsmPrinter<NVPTXAsmPrinter> X(getTheNVPTXTarget32()); RegisterAsmPrinter<NVPTXAsmPrinter> X(getTheNVPTXTarget32());
RegisterAsmPrinter<NVPTXAsmPrinter> Y(getTheNVPTXTarget64()); RegisterAsmPrinter<NVPTXAsmPrinter> Y(getTheNVPTXTarget64());
} }

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@ -72,7 +72,7 @@ void initializeNVPTXProxyRegErasurePass(PassRegistry &);
} // end namespace llvm } // end namespace llvm
extern "C" void LLVMInitializeNVPTXTarget() { extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeNVPTXTarget() {
// Register the target. // Register the target.
RegisterTargetMachine<NVPTXTargetMachine32> X(getTheNVPTXTarget32()); RegisterTargetMachine<NVPTXTargetMachine32> X(getTheNVPTXTarget32());
RegisterTargetMachine<NVPTXTargetMachine64> Y(getTheNVPTXTarget64()); RegisterTargetMachine<NVPTXTargetMachine64> Y(getTheNVPTXTarget64());

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@ -19,7 +19,7 @@ Target &llvm::getTheNVPTXTarget64() {
return TheNVPTXTarget64; return TheNVPTXTarget64;
} }
extern "C" void LLVMInitializeNVPTXTargetInfo() { extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeNVPTXTargetInfo() {
RegisterTarget<Triple::nvptx> X(getTheNVPTXTarget32(), "nvptx", RegisterTarget<Triple::nvptx> X(getTheNVPTXTarget32(), "nvptx",
"NVIDIA PTX 32-bit", "NVPTX"); "NVIDIA PTX 32-bit", "NVPTX");
RegisterTarget<Triple::nvptx64> Y(getTheNVPTXTarget64(), "nvptx64", RegisterTarget<Triple::nvptx64> Y(getTheNVPTXTarget64(), "nvptx64",

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@ -1786,7 +1786,7 @@ bool PPCAsmParser::ParseDirectiveLocalEntry(SMLoc L) {
/// Force static initialization. /// Force static initialization.
extern "C" void LLVMInitializePowerPCAsmParser() { extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializePowerPCAsmParser() {
RegisterMCAsmParser<PPCAsmParser> A(getThePPC32Target()); RegisterMCAsmParser<PPCAsmParser> A(getThePPC32Target());
RegisterMCAsmParser<PPCAsmParser> B(getThePPC64Target()); RegisterMCAsmParser<PPCAsmParser> B(getThePPC64Target());
RegisterMCAsmParser<PPCAsmParser> C(getThePPC64LETarget()); RegisterMCAsmParser<PPCAsmParser> C(getThePPC64LETarget());

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@ -50,7 +50,7 @@ static MCDisassembler *createPPCLEDisassembler(const Target &T,
return new PPCDisassembler(STI, Ctx, /*IsLittleEndian=*/true); return new PPCDisassembler(STI, Ctx, /*IsLittleEndian=*/true);
} }
extern "C" void LLVMInitializePowerPCDisassembler() { extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializePowerPCDisassembler() {
// Register the disassembler for each target. // Register the disassembler for each target.
TargetRegistry::RegisterMCDisassembler(getThePPC32Target(), TargetRegistry::RegisterMCDisassembler(getThePPC32Target(),
createPPCDisassembler); createPPCDisassembler);

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@ -292,7 +292,7 @@ static MCInstPrinter *createPPCMCInstPrinter(const Triple &T,
return new PPCInstPrinter(MAI, MII, MRI, T); return new PPCInstPrinter(MAI, MII, MRI, T);
} }
extern "C" void LLVMInitializePowerPCTargetMC() { extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializePowerPCTargetMC() {
for (Target *T : for (Target *T :
{&getThePPC32Target(), &getThePPC64Target(), &getThePPC64LETarget()}) { {&getThePPC32Target(), &getThePPC64Target(), &getThePPC64LETarget()}) {
// Register the MC asm info. // Register the MC asm info.

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@ -1801,7 +1801,7 @@ createPPCAsmPrinterPass(TargetMachine &tm,
} }
// Force static initialization. // Force static initialization.
extern "C" void LLVMInitializePowerPCAsmPrinter() { extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializePowerPCAsmPrinter() {
TargetRegistry::RegisterAsmPrinter(getThePPC32Target(), TargetRegistry::RegisterAsmPrinter(getThePPC32Target(),
createPPCAsmPrinterPass); createPPCAsmPrinterPass);
TargetRegistry::RegisterAsmPrinter(getThePPC64Target(), TargetRegistry::RegisterAsmPrinter(getThePPC64Target(),

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@ -94,7 +94,7 @@ static cl::opt<bool>
ReduceCRLogical("ppc-reduce-cr-logicals", ReduceCRLogical("ppc-reduce-cr-logicals",
cl::desc("Expand eligible cr-logical binary ops to branches"), cl::desc("Expand eligible cr-logical binary ops to branches"),
cl::init(true), cl::Hidden); cl::init(true), cl::Hidden);
extern "C" void LLVMInitializePowerPCTarget() { extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializePowerPCTarget() {
// Register the targets // Register the targets
RegisterTargetMachine<PPCTargetMachine> A(getThePPC32Target()); RegisterTargetMachine<PPCTargetMachine> A(getThePPC32Target());
RegisterTargetMachine<PPCTargetMachine> B(getThePPC64Target()); RegisterTargetMachine<PPCTargetMachine> B(getThePPC64Target());

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@ -23,7 +23,7 @@ Target &llvm::getThePPC64LETarget() {
return ThePPC64LETarget; return ThePPC64LETarget;
} }
extern "C" void LLVMInitializePowerPCTargetInfo() { extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializePowerPCTargetInfo() {
RegisterTarget<Triple::ppc, /*HasJIT=*/true> X(getThePPC32Target(), "ppc32", RegisterTarget<Triple::ppc, /*HasJIT=*/true> X(getThePPC32Target(), "ppc32",
"PowerPC 32", "PPC"); "PowerPC 32", "PPC");

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@ -1872,7 +1872,7 @@ bool RISCVAsmParser::processInstruction(MCInst &Inst, SMLoc IDLoc,
return false; return false;
} }
extern "C" void LLVMInitializeRISCVAsmParser() { extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeRISCVAsmParser() {
RegisterMCAsmParser<RISCVAsmParser> X(getTheRISCV32Target()); RegisterMCAsmParser<RISCVAsmParser> X(getTheRISCV32Target());
RegisterMCAsmParser<RISCVAsmParser> Y(getTheRISCV64Target()); RegisterMCAsmParser<RISCVAsmParser> Y(getTheRISCV64Target());
} }

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@ -48,7 +48,7 @@ static MCDisassembler *createRISCVDisassembler(const Target &T,
return new RISCVDisassembler(STI, Ctx); return new RISCVDisassembler(STI, Ctx);
} }
extern "C" void LLVMInitializeRISCVDisassembler() { extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeRISCVDisassembler() {
// Register the disassembler for each target. // Register the disassembler for each target.
TargetRegistry::RegisterMCDisassembler(getTheRISCV32Target(), TargetRegistry::RegisterMCDisassembler(getTheRISCV32Target(),
createRISCVDisassembler); createRISCVDisassembler);

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@ -93,7 +93,7 @@ static MCTargetStreamer *createRISCVAsmTargetStreamer(MCStreamer &S,
return new RISCVTargetAsmStreamer(S, OS); return new RISCVTargetAsmStreamer(S, OS);
} }
extern "C" void LLVMInitializeRISCVTargetMC() { extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeRISCVTargetMC() {
for (Target *T : {&getTheRISCV32Target(), &getTheRISCV64Target()}) { for (Target *T : {&getTheRISCV32Target(), &getTheRISCV64Target()}) {
TargetRegistry::RegisterMCAsmInfo(*T, createRISCVMCAsmInfo); TargetRegistry::RegisterMCAsmInfo(*T, createRISCVMCAsmInfo);
TargetRegistry::RegisterMCInstrInfo(*T, createRISCVMCInstrInfo); TargetRegistry::RegisterMCInstrInfo(*T, createRISCVMCInstrInfo);

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@ -155,7 +155,7 @@ bool RISCVAsmPrinter::PrintAsmMemoryOperand(const MachineInstr *MI,
} }
// Force static initialization. // Force static initialization.
extern "C" void LLVMInitializeRISCVAsmPrinter() { extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeRISCVAsmPrinter() {
RegisterAsmPrinter<RISCVAsmPrinter> X(getTheRISCV32Target()); RegisterAsmPrinter<RISCVAsmPrinter> X(getTheRISCV32Target());
RegisterAsmPrinter<RISCVAsmPrinter> Y(getTheRISCV64Target()); RegisterAsmPrinter<RISCVAsmPrinter> Y(getTheRISCV64Target());
} }

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@ -31,7 +31,7 @@
#include "llvm/Target/TargetOptions.h" #include "llvm/Target/TargetOptions.h"
using namespace llvm; using namespace llvm;
extern "C" void LLVMInitializeRISCVTarget() { extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeRISCVTarget() {
RegisterTargetMachine<RISCVTargetMachine> X(getTheRISCV32Target()); RegisterTargetMachine<RISCVTargetMachine> X(getTheRISCV32Target());
RegisterTargetMachine<RISCVTargetMachine> Y(getTheRISCV64Target()); RegisterTargetMachine<RISCVTargetMachine> Y(getTheRISCV64Target());
auto PR = PassRegistry::getPassRegistry(); auto PR = PassRegistry::getPassRegistry();

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@ -20,7 +20,7 @@ Target &llvm::getTheRISCV64Target() {
return TheRISCV64Target; return TheRISCV64Target;
} }
extern "C" void LLVMInitializeRISCVTargetInfo() { extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeRISCVTargetInfo() {
RegisterTarget<Triple::riscv32> X(getTheRISCV32Target(), "riscv32", RegisterTarget<Triple::riscv32> X(getTheRISCV32Target(), "riscv32",
"32-bit RISC-V", "RISCV"); "32-bit RISC-V", "RISCV");
RegisterTarget<Triple::riscv64> Y(getTheRISCV64Target(), "riscv64", RegisterTarget<Triple::riscv64> Y(getTheRISCV64Target(), "riscv64",

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@ -1308,7 +1308,7 @@ bool SparcAsmParser::matchSparcAsmModifiers(const MCExpr *&EVal,
return true; return true;
} }
extern "C" void LLVMInitializeSparcAsmParser() { extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeSparcAsmParser() {
RegisterMCAsmParser<SparcAsmParser> A(getTheSparcTarget()); RegisterMCAsmParser<SparcAsmParser> A(getTheSparcTarget());
RegisterMCAsmParser<SparcAsmParser> B(getTheSparcV9Target()); RegisterMCAsmParser<SparcAsmParser> B(getTheSparcV9Target());
RegisterMCAsmParser<SparcAsmParser> C(getTheSparcelTarget()); RegisterMCAsmParser<SparcAsmParser> C(getTheSparcelTarget());

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@ -47,7 +47,7 @@ static MCDisassembler *createSparcDisassembler(const Target &T,
} }
extern "C" void LLVMInitializeSparcDisassembler() { extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeSparcDisassembler() {
// Register the disassembler. // Register the disassembler.
TargetRegistry::RegisterMCDisassembler(getTheSparcTarget(), TargetRegistry::RegisterMCDisassembler(getTheSparcTarget(),
createSparcDisassembler); createSparcDisassembler);

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@ -91,7 +91,7 @@ static MCInstPrinter *createSparcMCInstPrinter(const Triple &T,
return new SparcInstPrinter(MAI, MII, MRI); return new SparcInstPrinter(MAI, MII, MRI);
} }
extern "C" void LLVMInitializeSparcTargetMC() { extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeSparcTargetMC() {
// Register the MC asm info. // Register the MC asm info.
RegisterMCAsmInfoFn X(getTheSparcTarget(), createSparcMCAsmInfo); RegisterMCAsmInfoFn X(getTheSparcTarget(), createSparcMCAsmInfo);
RegisterMCAsmInfoFn Y(getTheSparcV9Target(), createSparcV9MCAsmInfo); RegisterMCAsmInfoFn Y(getTheSparcV9Target(), createSparcV9MCAsmInfo);

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@ -439,7 +439,7 @@ bool SparcAsmPrinter::PrintAsmMemoryOperand(const MachineInstr *MI,
} }
// Force static initialization. // Force static initialization.
extern "C" void LLVMInitializeSparcAsmPrinter() { extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeSparcAsmPrinter() {
RegisterAsmPrinter<SparcAsmPrinter> X(getTheSparcTarget()); RegisterAsmPrinter<SparcAsmPrinter> X(getTheSparcTarget());
RegisterAsmPrinter<SparcAsmPrinter> Y(getTheSparcV9Target()); RegisterAsmPrinter<SparcAsmPrinter> Y(getTheSparcV9Target());
RegisterAsmPrinter<SparcAsmPrinter> Z(getTheSparcelTarget()); RegisterAsmPrinter<SparcAsmPrinter> Z(getTheSparcelTarget());

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@ -20,7 +20,7 @@
#include "llvm/Support/TargetRegistry.h" #include "llvm/Support/TargetRegistry.h"
using namespace llvm; using namespace llvm;
extern "C" void LLVMInitializeSparcTarget() { extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeSparcTarget() {
// Register the target. // Register the target.
RegisterTargetMachine<SparcV8TargetMachine> X(getTheSparcTarget()); RegisterTargetMachine<SparcV8TargetMachine> X(getTheSparcTarget());
RegisterTargetMachine<SparcV9TargetMachine> Y(getTheSparcV9Target()); RegisterTargetMachine<SparcV9TargetMachine> Y(getTheSparcV9Target());

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@ -23,7 +23,7 @@ Target &llvm::getTheSparcelTarget() {
return TheSparcelTarget; return TheSparcelTarget;
} }
extern "C" void LLVMInitializeSparcTargetInfo() { extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeSparcTargetInfo() {
RegisterTarget<Triple::sparc, /*HasJIT=*/true> X(getTheSparcTarget(), "sparc", RegisterTarget<Triple::sparc, /*HasJIT=*/true> X(getTheSparcTarget(), "sparc",
"Sparc", "Sparc"); "Sparc", "Sparc");
RegisterTarget<Triple::sparcv9, /*HasJIT=*/true> Y( RegisterTarget<Triple::sparcv9, /*HasJIT=*/true> Y(

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@ -1389,6 +1389,6 @@ SystemZAsmParser::parsePCRel(OperandVector &Operands, int64_t MinVal,
} }
// Force static initialization. // Force static initialization.
extern "C" void LLVMInitializeSystemZAsmParser() { extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeSystemZAsmParser() {
RegisterMCAsmParser<SystemZAsmParser> X(getTheSystemZTarget()); RegisterMCAsmParser<SystemZAsmParser> X(getTheSystemZTarget());
} }

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@ -45,7 +45,7 @@ static MCDisassembler *createSystemZDisassembler(const Target &T,
return new SystemZDisassembler(STI, Ctx); return new SystemZDisassembler(STI, Ctx);
} }
extern "C" void LLVMInitializeSystemZDisassembler() { extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeSystemZDisassembler() {
// Register the disassembler. // Register the disassembler.
TargetRegistry::RegisterMCDisassembler(getTheSystemZTarget(), TargetRegistry::RegisterMCDisassembler(getTheSystemZTarget(),
createSystemZDisassembler); createSystemZDisassembler);

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@ -183,7 +183,7 @@ static MCInstPrinter *createSystemZMCInstPrinter(const Triple &T,
return new SystemZInstPrinter(MAI, MII, MRI); return new SystemZInstPrinter(MAI, MII, MRI);
} }
extern "C" void LLVMInitializeSystemZTargetMC() { extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeSystemZTargetMC() {
// Register the MCAsmInfo. // Register the MCAsmInfo.
TargetRegistry::RegisterMCAsmInfo(getTheSystemZTarget(), TargetRegistry::RegisterMCAsmInfo(getTheSystemZTarget(),
createSystemZMCAsmInfo); createSystemZMCAsmInfo);

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@ -724,6 +724,6 @@ void SystemZAsmPrinter::EmitEndOfAsmFile(Module &M) {
} }
// Force static initialization. // Force static initialization.
extern "C" void LLVMInitializeSystemZAsmPrinter() { extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeSystemZAsmPrinter() {
RegisterAsmPrinter<SystemZAsmPrinter> X(getTheSystemZTarget()); RegisterAsmPrinter<SystemZAsmPrinter> X(getTheSystemZTarget());
} }

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@ -29,7 +29,7 @@
using namespace llvm; using namespace llvm;
extern "C" void LLVMInitializeSystemZTarget() { extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeSystemZTarget() {
// Register the target. // Register the target.
RegisterTargetMachine<SystemZTargetMachine> X(getTheSystemZTarget()); RegisterTargetMachine<SystemZTargetMachine> X(getTheSystemZTarget());
} }

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@ -16,7 +16,7 @@ Target &llvm::getTheSystemZTarget() {
return TheSystemZTarget; return TheSystemZTarget;
} }
extern "C" void LLVMInitializeSystemZTargetInfo() { extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeSystemZTargetInfo() {
RegisterTarget<Triple::systemz, /*HasJIT=*/true> X( RegisterTarget<Triple::systemz, /*HasJIT=*/true> X(
getTheSystemZTarget(), "systemz", "SystemZ", "SystemZ"); getTheSystemZTarget(), "systemz", "SystemZ", "SystemZ");
} }

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@ -899,7 +899,7 @@ public:
} // end anonymous namespace } // end anonymous namespace
// Force static initialization. // Force static initialization.
extern "C" void LLVMInitializeWebAssemblyAsmParser() { extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeWebAssemblyAsmParser() {
RegisterMCAsmParser<WebAssemblyAsmParser> X(getTheWebAssemblyTarget32()); RegisterMCAsmParser<WebAssemblyAsmParser> X(getTheWebAssemblyTarget32());
RegisterMCAsmParser<WebAssemblyAsmParser> Y(getTheWebAssemblyTarget64()); RegisterMCAsmParser<WebAssemblyAsmParser> Y(getTheWebAssemblyTarget64());
} }

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@ -64,7 +64,8 @@ static MCDisassembler *createWebAssemblyDisassembler(const Target &T,
return new WebAssemblyDisassembler(STI, Ctx, std::move(MCII)); return new WebAssemblyDisassembler(STI, Ctx, std::move(MCII));
} }
extern "C" void LLVMInitializeWebAssemblyDisassembler() { extern "C" LLVM_EXTERNAL_VISIBILITY void
LLVMInitializeWebAssemblyDisassembler() {
// Register the disassembler for each target. // Register the disassembler for each target.
TargetRegistry::RegisterMCDisassembler(getTheWebAssemblyTarget32(), TargetRegistry::RegisterMCDisassembler(getTheWebAssemblyTarget32(),
createWebAssemblyDisassembler); createWebAssemblyDisassembler);

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@ -96,7 +96,7 @@ static MCTargetStreamer *createNullTargetStreamer(MCStreamer &S) {
} }
// Force static initialization. // Force static initialization.
extern "C" void LLVMInitializeWebAssemblyTargetMC() { extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeWebAssemblyTargetMC() {
for (Target *T : for (Target *T :
{&getTheWebAssemblyTarget32(), &getTheWebAssemblyTarget64()}) { {&getTheWebAssemblyTarget32(), &getTheWebAssemblyTarget64()}) {
// Register the MC asm info. // Register the MC asm info.

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@ -26,7 +26,7 @@ Target &llvm::getTheWebAssemblyTarget64() {
return TheWebAssemblyTarget64; return TheWebAssemblyTarget64;
} }
extern "C" void LLVMInitializeWebAssemblyTargetInfo() { extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeWebAssemblyTargetInfo() {
RegisterTarget<Triple::wasm32> X(getTheWebAssemblyTarget32(), "wasm32", RegisterTarget<Triple::wasm32> X(getTheWebAssemblyTarget32(), "wasm32",
"WebAssembly 32-bit", "WebAssembly"); "WebAssembly 32-bit", "WebAssembly");
RegisterTarget<Triple::wasm64> Y(getTheWebAssemblyTarget64(), "wasm64", RegisterTarget<Triple::wasm64> Y(getTheWebAssemblyTarget64(), "wasm64",

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@ -425,7 +425,7 @@ bool WebAssemblyAsmPrinter::PrintAsmMemoryOperand(const MachineInstr *MI,
} }
// Force static initialization. // Force static initialization.
extern "C" void LLVMInitializeWebAssemblyAsmPrinter() { extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeWebAssemblyAsmPrinter() {
RegisterAsmPrinter<WebAssemblyAsmPrinter> X(getTheWebAssemblyTarget32()); RegisterAsmPrinter<WebAssemblyAsmPrinter> X(getTheWebAssemblyTarget32());
RegisterAsmPrinter<WebAssemblyAsmPrinter> Y(getTheWebAssemblyTarget64()); RegisterAsmPrinter<WebAssemblyAsmPrinter> Y(getTheWebAssemblyTarget64());
} }

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@ -45,7 +45,7 @@ static cl::opt<bool> EnableEmSjLj(
cl::desc("WebAssembly Emscripten-style setjmp/longjmp handling"), cl::desc("WebAssembly Emscripten-style setjmp/longjmp handling"),
cl::init(false)); cl::init(false));
extern "C" void LLVMInitializeWebAssemblyTarget() { extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeWebAssemblyTarget() {
// Register the target. // Register the target.
RegisterTargetMachine<WebAssemblyTargetMachine> X( RegisterTargetMachine<WebAssemblyTargetMachine> X(
getTheWebAssemblyTarget32()); getTheWebAssemblyTarget32());

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@ -3939,7 +3939,7 @@ bool X86AsmParser::parseDirectiveSEHPushFrame(SMLoc Loc) {
} }
// Force static initialization. // Force static initialization.
extern "C" void LLVMInitializeX86AsmParser() { extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeX86AsmParser() {
RegisterMCAsmParser<X86AsmParser> X(getTheX86_32Target()); RegisterMCAsmParser<X86AsmParser> X(getTheX86_32Target());
RegisterMCAsmParser<X86AsmParser> Y(getTheX86_64Target()); RegisterMCAsmParser<X86AsmParser> Y(getTheX86_64Target());
} }

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@ -2332,7 +2332,7 @@ static MCDisassembler *createX86Disassembler(const Target &T,
return new X86GenericDisassembler(STI, Ctx, std::move(MII)); return new X86GenericDisassembler(STI, Ctx, std::move(MII));
} }
extern "C" void LLVMInitializeX86Disassembler() { extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeX86Disassembler() {
// Register the disassembler. // Register the disassembler.
TargetRegistry::RegisterMCDisassembler(getTheX86_32Target(), TargetRegistry::RegisterMCDisassembler(getTheX86_32Target(),
createX86Disassembler); createX86Disassembler);

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@ -552,7 +552,7 @@ static MCInstrAnalysis *createX86MCInstrAnalysis(const MCInstrInfo *Info) {
} }
// Force static initialization. // Force static initialization.
extern "C" void LLVMInitializeX86TargetMC() { extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeX86TargetMC() {
for (Target *T : {&getTheX86_32Target(), &getTheX86_64Target()}) { for (Target *T : {&getTheX86_32Target(), &getTheX86_64Target()}) {
// Register the MC asm info. // Register the MC asm info.
RegisterMCAsmInfoFn X(*T, createX86MCAsmInfo); RegisterMCAsmInfoFn X(*T, createX86MCAsmInfo);

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@ -19,7 +19,7 @@ Target &llvm::getTheX86_64Target() {
return TheX86_64Target; return TheX86_64Target;
} }
extern "C" void LLVMInitializeX86TargetInfo() { extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeX86TargetInfo() {
RegisterTarget<Triple::x86, /*HasJIT=*/true> X( RegisterTarget<Triple::x86, /*HasJIT=*/true> X(
getTheX86_32Target(), "x86", "32-bit X86: Pentium-Pro and above", "X86"); getTheX86_32Target(), "x86", "32-bit X86: Pentium-Pro and above", "X86");

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@ -749,7 +749,7 @@ void X86AsmPrinter::EmitEndOfAsmFile(Module &M) {
//===----------------------------------------------------------------------===// //===----------------------------------------------------------------------===//
// Force static initialization. // Force static initialization.
extern "C" void LLVMInitializeX86AsmPrinter() { extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeX86AsmPrinter() {
RegisterAsmPrinter<X86AsmPrinter> X(getTheX86_32Target()); RegisterAsmPrinter<X86AsmPrinter> X(getTheX86_32Target());
RegisterAsmPrinter<X86AsmPrinter> Y(getTheX86_64Target()); RegisterAsmPrinter<X86AsmPrinter> Y(getTheX86_64Target());
} }

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