From fb41a5956577900628b209228c0f27b082406296 Mon Sep 17 00:00:00 2001 From: Konstantin Zhuravlyov Date: Tue, 12 Jun 2018 18:33:51 +0000 Subject: [PATCH] AMDHSA/NFC: Code object v3 updates (additional): - Move section selection and alignment to AMDGPUAsmPrinter llvm-svn: 334521 --- lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp | 16 ++++++++++++++++ .../AMDGPU/MCTargetDesc/AMDGPUTargetStreamer.cpp | 13 ------------- test/CodeGen/AMDGPU/code-object-v3.ll | 10 ++++++++++ 3 files changed, 26 insertions(+), 13 deletions(-) diff --git a/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp b/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp index 8e56ec60eff..5d6e98a1861 100644 --- a/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp +++ b/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp @@ -220,10 +220,26 @@ void AMDGPUAsmPrinter::EmitFunctionBodyEnd() { TM.getTargetTriple().getOS() != Triple::AMDHSA) return; + auto &Streamer = getTargetStreamer()->getStreamer(); + auto &Context = Streamer.getContext(); + auto &ObjectFileInfo = *Context.getObjectFileInfo(); + auto &ReadOnlySection = *ObjectFileInfo.getReadOnlySection(); + + Streamer.PushSection(); + Streamer.SwitchSection(&ReadOnlySection); + + // CP microcode requires the kernel descriptor to be allocated on 64 byte + // alignment. + Streamer.EmitValueToAlignment(64, 0, 1, 0); + if (ReadOnlySection.getAlignment() < 64) + ReadOnlySection.setAlignment(64); + SmallString<128> KernelName; getNameWithPrefix(KernelName, &MF->getFunction()); getTargetStreamer()->EmitAmdhsaKernelDescriptor( KernelName, getAmdhsaKernelDescriptor(*MF, CurrentProgramInfo)); + + Streamer.PopSection(); } void AMDGPUAsmPrinter::EmitFunctionEntryLabel() { diff --git a/lib/Target/AMDGPU/MCTargetDesc/AMDGPUTargetStreamer.cpp b/lib/Target/AMDGPU/MCTargetDesc/AMDGPUTargetStreamer.cpp index 6a4b2055468..38dd0630159 100644 --- a/lib/Target/AMDGPU/MCTargetDesc/AMDGPUTargetStreamer.cpp +++ b/lib/Target/AMDGPU/MCTargetDesc/AMDGPUTargetStreamer.cpp @@ -374,17 +374,6 @@ void AMDGPUTargetELFStreamer::EmitAmdhsaKernelDescriptor( const amdhsa::kernel_descriptor_t &KernelDescriptor) { auto &Streamer = getStreamer(); auto &Context = Streamer.getContext(); - auto &ObjectFileInfo = *Context.getObjectFileInfo(); - auto &ReadOnlySection = *ObjectFileInfo.getReadOnlySection(); - - Streamer.PushSection(); - Streamer.SwitchSection(&ReadOnlySection); - - // CP microcode requires the kernel descriptor to be allocated on 64 byte - // alignment. - Streamer.EmitValueToAlignment(64, 0, 1, 0); - if (ReadOnlySection.getAlignment() < 64) - ReadOnlySection.setAlignment(64); MCSymbolELF *KernelDescriptorSymbol = cast( Context.getOrCreateSymbol(Twine(KernelName) + Twine(".kd"))); @@ -419,6 +408,4 @@ void AMDGPUTargetELFStreamer::EmitAmdhsaKernelDescriptor( sizeof(KernelDescriptor) - offsetof(amdhsa::kernel_descriptor_t, kernel_code_entry_byte_offset) - sizeof(KernelDescriptor.kernel_code_entry_byte_offset))); - - Streamer.PopSection(); } diff --git a/test/CodeGen/AMDGPU/code-object-v3.ll b/test/CodeGen/AMDGPU/code-object-v3.ll index 42ddf19a93f..cf9ccf87f86 100644 --- a/test/CodeGen/AMDGPU/code-object-v3.ll +++ b/test/CodeGen/AMDGPU/code-object-v3.ll @@ -1,6 +1,16 @@ ; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx803 -mattr=+code-object-v3 < %s | FileCheck --check-prefixes=ALL-ASM,OSABI-AMDHSA-ASM %s ; RUN: llc -filetype=obj -mtriple=amdgcn-amd-amdhsa -mcpu=gfx803 -mattr=+code-object-v3 < %s | llvm-readobj -elf-output-style=GNU -notes -relocations -sections -symbols | FileCheck --check-prefixes=ALL-ELF,OSABI-AMDHSA-ELF %s +; ALL-ASM-LABEL: {{^}}fadd: +; OSABI-AMDHSA-ASM: s_endpgm +; OSABI-AMDHSA-ASM: .section .rodata,#alloc +; OSABI-AMDHSA-ASM: .p2align 6 + +; ALL-ASM-LABEL: {{^}}fsub: +; OSABI-AMDHSA-ASM: s_endpgm +; OSABI-AMDHSA-ASM: .section .rodata,#alloc +; OSABI-AMDHSA-ASM: .p2align 6 + ; OSABI-AMDHSA-ASM-NOT: .hsa_code_object_version ; OSABI-AMDHSA-ASM-NOT: .hsa_code_object_isa ; OSABI-AMDHSA-ASM-NOT: .amd_amdgpu_isa