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[X86][AVX] Add PR34041 subvector broadcast test cases
llvm-svn: 353182
This commit is contained in:
Simon Pilgrim
parent
a7a3ff99be
commit
fb45770858
@ -1615,3 +1615,173 @@ define <16 x i32> @test_2xi32_to_16xi32_mem(<2 x i32>* %vp) {
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%res = shufflevector <2 x i32> %vec, <2 x i32> undef, <16 x i32> <i32 0, i32 1, i32 0, i32 1, i32 0, i32 1, i32 0, i32 1, i32 0, i32 1, i32 0, i32 1, i32 0, i32 1, i32 0, i32 1>
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ret <16 x i32> %res
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}
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;
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; PR34041
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;
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define <4 x double> @broadcast_v4f64_f64_u000(double* %p) {
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; X32-LABEL: broadcast_v4f64_f64_u000:
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; X32: # %bb.0:
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; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X32-NEXT: vbroadcastsd (%eax), %ymm0
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; X32-NEXT: retl
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;
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; X64-LABEL: broadcast_v4f64_f64_u000:
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; X64: # %bb.0:
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; X64-NEXT: vbroadcastsd (%rdi), %ymm0
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; X64-NEXT: retq
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%s = load double, double* %p
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%vec = insertelement <2 x double> undef, double %s, i32 0
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%res = shufflevector <2 x double> %vec, <2 x double> undef, <4 x i32> <i32 1, i32 0, i32 0, i32 0>
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ret <4 x double> %res
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}
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define <4 x double> @broadcast_v4f64_v2f64_4u61(<2 x double>* %vp, <4 x double> %default) {
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; X32-LABEL: broadcast_v4f64_v2f64_4u61:
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; X32: # %bb.0:
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; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X32-NEXT: vinsertf128 $1, (%eax), %ymm0, %ymm1
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; X32-NEXT: vblendps {{.*#+}} ymm0 = ymm0[0,1,2,3,4,5],ymm1[6,7]
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; X32-NEXT: retl
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;
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; X64-LABEL: broadcast_v4f64_v2f64_4u61:
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; X64: # %bb.0:
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; X64-NEXT: vinsertf128 $1, (%rdi), %ymm0, %ymm1
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; X64-NEXT: vblendps {{.*#+}} ymm0 = ymm0[0,1,2,3,4,5],ymm1[6,7]
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; X64-NEXT: retq
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%vec = load <2 x double>, <2 x double>* %vp
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%shuf = shufflevector <2 x double> %vec, <2 x double> undef, <4 x i32> <i32 0, i32 3, i32 undef, i32 1>
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%res = select <4 x i1> <i1 0, i1 1, i1 0, i1 1>, <4 x double> %shuf, <4 x double> %default
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ret <4 x double> %res
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}
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define <8 x float> @broadcast_v8f32_v2f32_u1uu0uEu(<2 x float>* %vp, <8 x float> %default) {
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; X32-AVX1-LABEL: broadcast_v8f32_v2f32_u1uu0uEu:
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; X32-AVX1: # %bb.0:
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; X32-AVX1-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X32-AVX1-NEXT: vmovsd {{.*#+}} xmm1 = mem[0],zero
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; X32-AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm1, %ymm1
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; X32-AVX1-NEXT: vblendps {{.*#+}} ymm0 = ymm1[0,1],ymm0[2,3],ymm1[4,5],ymm0[6,7]
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; X32-AVX1-NEXT: retl
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;
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; X32-AVX2-LABEL: broadcast_v8f32_v2f32_u1uu0uEu:
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; X32-AVX2: # %bb.0:
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; X32-AVX2-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X32-AVX2-NEXT: vmovsd {{.*#+}} xmm1 = mem[0],zero
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; X32-AVX2-NEXT: vblendps {{.*#+}} ymm0 = ymm1[0,1],ymm0[2,3],ymm1[4,5],ymm0[6,7]
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; X32-AVX2-NEXT: vpermpd {{.*#+}} ymm0 = ymm0[0,1,0,3]
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; X32-AVX2-NEXT: retl
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;
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; X32-AVX512-LABEL: broadcast_v8f32_v2f32_u1uu0uEu:
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; X32-AVX512: # %bb.0:
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; X32-AVX512-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X32-AVX512-NEXT: vmovsd {{.*#+}} xmm1 = mem[0],zero
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; X32-AVX512-NEXT: vblendps {{.*#+}} ymm0 = ymm1[0,1],ymm0[2,3],ymm1[4,5],ymm0[6,7]
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; X32-AVX512-NEXT: vpermpd {{.*#+}} ymm0 = ymm0[0,1,0,3]
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; X32-AVX512-NEXT: retl
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;
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; X64-AVX1-LABEL: broadcast_v8f32_v2f32_u1uu0uEu:
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; X64-AVX1: # %bb.0:
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; X64-AVX1-NEXT: vmovsd {{.*#+}} xmm1 = mem[0],zero
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; X64-AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm1, %ymm1
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; X64-AVX1-NEXT: vblendps {{.*#+}} ymm0 = ymm1[0,1],ymm0[2,3],ymm1[4,5],ymm0[6,7]
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; X64-AVX1-NEXT: retq
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;
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; X64-AVX2-LABEL: broadcast_v8f32_v2f32_u1uu0uEu:
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; X64-AVX2: # %bb.0:
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; X64-AVX2-NEXT: vmovsd {{.*#+}} xmm1 = mem[0],zero
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; X64-AVX2-NEXT: vblendps {{.*#+}} ymm0 = ymm1[0,1],ymm0[2,3],ymm1[4,5],ymm0[6,7]
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; X64-AVX2-NEXT: vpermpd {{.*#+}} ymm0 = ymm0[0,1,0,3]
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; X64-AVX2-NEXT: retq
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;
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; X64-AVX512-LABEL: broadcast_v8f32_v2f32_u1uu0uEu:
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; X64-AVX512: # %bb.0:
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; X64-AVX512-NEXT: vmovsd {{.*#+}} xmm1 = mem[0],zero
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; X64-AVX512-NEXT: vblendps {{.*#+}} ymm0 = ymm1[0,1],ymm0[2,3],ymm1[4,5],ymm0[6,7]
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; X64-AVX512-NEXT: vpermpd {{.*#+}} ymm0 = ymm0[0,1,0,3]
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; X64-AVX512-NEXT: retq
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%vec = load <2 x float>, <2 x float>* %vp
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%shuf = shufflevector <2 x float> %vec, <2 x float> undef, <8 x i32> <i32 undef, i32 1, i32 undef, i32 undef, i32 0, i32 2, i32 3, i32 undef>
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%res = select <8 x i1> <i1 1, i1 1, i1 1, i1 1, i1 1, i1 1, i1 0, i1 1>, <8 x float> %shuf, <8 x float> %default
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ret <8 x float> %res
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}
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define <8 x double> @broadcast_v8f64_v2f64_u1u10101(<2 x double>* %vp) {
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; X32-AVX1-LABEL: broadcast_v8f64_v2f64_u1u10101:
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; X32-AVX1: # %bb.0:
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; X32-AVX1-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X32-AVX1-NEXT: vbroadcastf128 {{.*#+}} ymm0 = mem[0,1,0,1]
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; X32-AVX1-NEXT: vmovaps %ymm0, %ymm1
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; X32-AVX1-NEXT: retl
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;
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; X32-AVX2-LABEL: broadcast_v8f64_v2f64_u1u10101:
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; X32-AVX2: # %bb.0:
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; X32-AVX2-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X32-AVX2-NEXT: vmovaps (%eax), %xmm0
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; X32-AVX2-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm1
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; X32-AVX2-NEXT: vpermpd {{.*#+}} ymm0 = ymm0[0,1,2,1]
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; X32-AVX2-NEXT: retl
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;
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; X32-AVX512-LABEL: broadcast_v8f64_v2f64_u1u10101:
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; X32-AVX512: # %bb.0:
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; X32-AVX512-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X32-AVX512-NEXT: vmovapd (%eax), %xmm0
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; X32-AVX512-NEXT: vshuff64x2 {{.*#+}} zmm0 = zmm0[0,1,0,1,0,1,0,1]
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; X32-AVX512-NEXT: retl
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;
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; X64-AVX1-LABEL: broadcast_v8f64_v2f64_u1u10101:
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; X64-AVX1: # %bb.0:
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; X64-AVX1-NEXT: vbroadcastf128 {{.*#+}} ymm0 = mem[0,1,0,1]
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; X64-AVX1-NEXT: vmovaps %ymm0, %ymm1
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; X64-AVX1-NEXT: retq
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;
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; X64-AVX2-LABEL: broadcast_v8f64_v2f64_u1u10101:
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; X64-AVX2: # %bb.0:
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; X64-AVX2-NEXT: vmovaps (%rdi), %xmm0
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; X64-AVX2-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm1
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; X64-AVX2-NEXT: vpermpd {{.*#+}} ymm0 = ymm0[0,1,2,1]
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; X64-AVX2-NEXT: retq
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;
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; X64-AVX512-LABEL: broadcast_v8f64_v2f64_u1u10101:
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; X64-AVX512: # %bb.0:
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; X64-AVX512-NEXT: vmovapd (%rdi), %xmm0
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; X64-AVX512-NEXT: vshuff64x2 {{.*#+}} zmm0 = zmm0[0,1,0,1,0,1,0,1]
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; X64-AVX512-NEXT: retq
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%vec = load <2 x double>, <2 x double>* %vp
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%res = shufflevector <2 x double> %vec, <2 x double> undef, <8 x i32> <i32 3, i32 1, i32 undef, i32 1, i32 0, i32 1, i32 0, i32 1>
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ret <8 x double> %res
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}
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define <8 x double> @broadcast_v8f64_v2f64_0uuu0101(<2 x double>* %vp) {
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; X32-AVX-LABEL: broadcast_v8f64_v2f64_0uuu0101:
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; X32-AVX: # %bb.0:
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; X32-AVX-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X32-AVX-NEXT: vmovaps (%eax), %xmm0
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; X32-AVX-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm1
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; X32-AVX-NEXT: retl
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;
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; X32-AVX512-LABEL: broadcast_v8f64_v2f64_0uuu0101:
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; X32-AVX512: # %bb.0:
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; X32-AVX512-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X32-AVX512-NEXT: vmovaps (%eax), %xmm0
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; X32-AVX512-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm1
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; X32-AVX512-NEXT: vinsertf64x4 $1, %ymm1, %zmm0, %zmm0
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; X32-AVX512-NEXT: retl
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;
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; X64-AVX-LABEL: broadcast_v8f64_v2f64_0uuu0101:
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; X64-AVX: # %bb.0:
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; X64-AVX-NEXT: vmovaps (%rdi), %xmm0
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; X64-AVX-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm1
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; X64-AVX-NEXT: retq
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;
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; X64-AVX512-LABEL: broadcast_v8f64_v2f64_0uuu0101:
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; X64-AVX512: # %bb.0:
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; X64-AVX512-NEXT: vmovaps (%rdi), %xmm0
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; X64-AVX512-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm1
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; X64-AVX512-NEXT: vinsertf64x4 $1, %ymm1, %zmm0, %zmm0
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; X64-AVX512-NEXT: retq
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%vec = load <2 x double>, <2 x double>* %vp
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%res = shufflevector <2 x double> %vec, <2 x double> undef, <8 x i32> <i32 0, i32 undef, i32 undef, i32 undef, i32 0, i32 1, i32 0, i32 1>
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ret <8 x double> %res
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}
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