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[x86] auto-generate complete test checks; NFC

llvm-svn: 356763
This commit is contained in:
Sanjay Patel 2019-03-22 15:33:59 +00:00
parent b88170ad5b
commit fb77f41f0b

View File

@ -1,3 +1,4 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc < %s -mtriple=x86_64-linux-gnu -mcpu=atom | FileCheck %s
; <rdar://problem/8006248>
@ -7,6 +8,39 @@
@llvm.used = appending global [1 x i8*] [i8* bitcast (void ([40 x i16]*, i32*, i16**, i64*)* @func to i8*)], section "llvm.metadata"
define void @func([40 x i16]* %a, i32* %b, i16** %c, i64* %d) nounwind {
; CHECK-LABEL: func:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: movslq (%rsi), %rax
; CHECK-NEXT: movl $4, %esi
; CHECK-NEXT: subq %rax, %rsi
; CHECK-NEXT: movq (%rdx), %rax
; CHECK-NEXT: movswl 8(%rdi), %edx
; CHECK-NEXT: movabsq $5089792277106559579, %rdi # imm = 0x46A2931BF1768A5B
; CHECK-NEXT: movswl (%rax,%rsi,2), %eax
; CHECK-NEXT: movl $1, %esi
; CHECK-NEXT: imull %edx, %eax
; CHECK-NEXT: xorl %edx, %edx
; CHECK-NEXT: addl $2138875574, %eax # imm = 0x7F7CA6B6
; CHECK-NEXT: cmpl $-8608074, %eax # imm = 0xFF7CA6B6
; CHECK-NEXT: movslq %eax, %r8
; CHECK-NEXT: setl %dl
; CHECK-NEXT: cmpl $2138875573, %eax # imm = 0x7F7CA6B5
; CHECK-NEXT: movq %r8, %r9
; CHECK-NEXT: leal -1(%rdx,%rdx), %edx
; CHECK-NEXT: cmovlel %edx, %esi
; CHECK-NEXT: subq %rax, %r9
; CHECK-NEXT: addq %r8, %rdi
; CHECK-NEXT: xorl %eax, %eax
; CHECK-NEXT: cmpl $1, %esi
; CHECK-NEXT: cmovneq %rax, %r9
; CHECK-NEXT: testl %r8d, %r8d
; CHECK-NEXT: cmovnsq %rax, %r9
; CHECK-NEXT: movabsq $-5089792279245435153, %rax # imm = 0xB95D6CE38F0CCEEF
; CHECK-NEXT: subq %r9, %rdi
; CHECK-NEXT: addq (%rcx), %rdi
; CHECK-NEXT: addq %rdi, %rax
; CHECK-NEXT: movq %rax, (%rcx)
; CHECK-NEXT: retq
entry:
%tmp103 = getelementptr inbounds [40 x i16], [40 x i16]* %a, i64 0, i64 4
%tmp104 = load i16, i16* %tmp103, align 2
@ -32,15 +66,6 @@ entry:
%tmp10 = and i1 %tmp8, %tmp9
%tmp11 = sext i32 %tmp4 to i64
%tmp12 = add i64 %tmp11, 5089792279245435153
; CHECK: addl $2138875574, %e[[REGISTER_zext:[a-z0-9]+]]
; CHECK: cmpl $-8608074, %e[[REGISTER_zext]]
; CHECK: movslq %e[[REGISTER_zext]], [[REGISTER_sext:%r[a-z0-9]+]]
; CHECK-NOT: [[REGISTER_zext]]
; CHECK-DAG: cmpl $2138875573, %e[[REGISTER_zext]]
; CHECK: movq [[REGISTER_sext]], [[REGISTER_sext2:%[a-z0-9]+]]
; CHECK: subq %r[[REGISTER_zext]], [[REGISTER_sext2]]
%tmp13 = sub i64 %tmp12, 2138875574
%tmp14 = zext i32 %tmp4 to i64
%tmp15 = sub i64 %tmp11, %tmp14