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Each prologue may have multiple vpush instructions to store callee-saved

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D registers since the vpush list may not have gaps. Make sure the stack
adjustment instruction isn't moved between them. Ditto for vpop in
epilogues.

Sorry, can't reduce a small test case.
rdar://9043312

llvm-svn: 126457
This commit is contained in:
Evan Cheng 2011-02-25 00:24:46 +00:00
parent 44b43a85db
commit fbdcea4b2e
1 changed files with 14 additions and 2 deletions
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16
lib/Target/ARM/ARMFrameLowering.cpp
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@ -215,7 +215,13 @@ void ARMFrameLowering::emitPrologue(MachineFunction &MF) const {
AFI->setDPRCalleeSavedAreaOffset(DPRCSOffset);
// Move past area 3.
if (DPRCSSize > 0) MBBI++;
if (DPRCSSize > 0) {
MBBI++;
// Since vpush register list cannot have gaps, there may be multiple vpush
// instructions in the epilogue.
while (MBBI->getOpcode() == ARM::VSTMDDB_UPD)
MBBI++;
}
NumBytes = DPRCSOffset;
if (NumBytes) {
@ -370,7 +376,13 @@ void ARMFrameLowering::emitEpilogue(MachineFunction &MF,
emitSPUpdate(isARM, MBB, MBBI, dl, TII, NumBytes);
// Increment past our save areas.
if (AFI->getDPRCalleeSavedAreaSize()) MBBI++;
if (AFI->getDPRCalleeSavedAreaSize()) {
MBBI++;
// Since vpop register list cannot have gaps, there may be multiple vpop
// instructions in the epilogue.
while (MBBI->getOpcode() == ARM::VLDMDIA_UPD)
MBBI++;
}
if (AFI->getGPRCalleeSavedArea2Size()) MBBI++;
if (AFI->getGPRCalleeSavedArea1Size()) MBBI++;
}