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[compiler-rt][hwasan] Decouple use of the TLS global for getting the shadow base and using the frame record feature
This allows for using the frame record feature (which uses __hwasan_tls) independently from however the user wants to access the shadow base, which prior was only usable if shadow wasn't accessed through the TLS variable or ifuncs. Frame recording can be explicitly set according to ShadowMapping::WithFrameRecord in ShadowMapping::init. Currently, it is only enabled on Fuchsia and if TLS is used, so this should mimic the old behavior. Added an extra case to prologue.ll that covers this new case. Differential Revision: https://reviews.llvm.org/D103841
This commit is contained in:
Leonard Chan
parent
c35099a5e4
commit
fca9191cc7
@ -264,11 +264,15 @@ private:
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/// If InTls is true, then
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/// extern char *__hwasan_tls;
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/// shadow = (mem>>Scale) + align_up(__hwasan_shadow, kShadowBaseAlignment)
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///
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/// If WithFrameRecord is true, then __hwasan_tls will be used to access the
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/// ring buffer for storing stack allocations on targets that support it.
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struct ShadowMapping {
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int Scale;
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uint64_t Offset;
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bool InGlobal;
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bool InTls;
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bool WithFrameRecord;
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void init(Triple &TargetTriple, bool InstrumentWithCalls);
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unsigned getObjectAlignment() const { return 1U << Scale; }
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@ -1042,15 +1046,13 @@ Value *HWAddressSanitizer::getHwasanThreadSlotPtr(IRBuilder<> &IRB, Type *Ty) {
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}
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void HWAddressSanitizer::emitPrologue(IRBuilder<> &IRB, bool WithFrameRecord) {
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if (!Mapping.InTls) {
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if (!Mapping.InTls)
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ShadowBase = getShadowNonTls(IRB);
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return;
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}
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if (!WithFrameRecord && TargetTriple.isAndroid()) {
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else if (!WithFrameRecord && TargetTriple.isAndroid())
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ShadowBase = getDynamicShadowIfunc(IRB);
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if (!WithFrameRecord && ShadowBase)
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return;
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}
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Value *SlotPtr = getHwasanThreadSlotPtr(IRB, IntptrTy);
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assert(SlotPtr);
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@ -1106,15 +1108,17 @@ void HWAddressSanitizer::emitPrologue(IRBuilder<> &IRB, bool WithFrameRecord) {
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IRB.CreateStore(ThreadLongNew, SlotPtr);
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}
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// Get shadow base address by aligning RecordPtr up.
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// Note: this is not correct if the pointer is already aligned.
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// Runtime library will make sure this never happens.
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ShadowBase = IRB.CreateAdd(
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IRB.CreateOr(
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ThreadLongMaybeUntagged,
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ConstantInt::get(IntptrTy, (1ULL << kShadowBaseAlignment) - 1)),
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ConstantInt::get(IntptrTy, 1), "hwasan.shadow");
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ShadowBase = IRB.CreateIntToPtr(ShadowBase, Int8PtrTy);
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if (!ShadowBase) {
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// Get shadow base address by aligning RecordPtr up.
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// Note: this is not correct if the pointer is already aligned.
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// Runtime library will make sure this never happens.
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ShadowBase = IRB.CreateAdd(
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IRB.CreateOr(
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ThreadLongMaybeUntagged,
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ConstantInt::get(IntptrTy, (1ULL << kShadowBaseAlignment) - 1)),
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ConstantInt::get(IntptrTy, 1), "hwasan.shadow");
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ShadowBase = IRB.CreateIntToPtr(ShadowBase, Int8PtrTy);
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}
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}
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Value *HWAddressSanitizer::readRegister(IRBuilder<> &IRB, StringRef Name) {
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@ -1273,7 +1277,7 @@ bool HWAddressSanitizer::sanitizeFunction(Function &F) {
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IRBuilder<> EntryIRB(InsertPt);
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emitPrologue(EntryIRB,
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/*WithFrameRecord*/ ClRecordStackHistory &&
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!AllocasToInstrument.empty());
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Mapping.WithFrameRecord && !AllocasToInstrument.empty());
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if (!AllocasToInstrument.empty()) {
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Value *StackTag =
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@ -1540,25 +1544,31 @@ void HWAddressSanitizer::ShadowMapping::init(Triple &TargetTriple,
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InGlobal = false;
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InTls = false;
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Offset = 0;
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WithFrameRecord = true;
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} else if (ClMappingOffset.getNumOccurrences() > 0) {
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InGlobal = false;
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InTls = false;
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Offset = ClMappingOffset;
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WithFrameRecord = false;
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} else if (ClEnableKhwasan || InstrumentWithCalls) {
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InGlobal = false;
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InTls = false;
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Offset = 0;
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WithFrameRecord = false;
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} else if (ClWithIfunc) {
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InGlobal = true;
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InTls = false;
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Offset = kDynamicShadowSentinel;
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WithFrameRecord = false;
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} else if (ClWithTls) {
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InGlobal = false;
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InTls = true;
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Offset = kDynamicShadowSentinel;
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WithFrameRecord = true;
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} else {
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InGlobal = false;
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InTls = false;
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Offset = kDynamicShadowSentinel;
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WithFrameRecord = false;
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}
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}
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@ -1,15 +1,17 @@
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; Test -hwasan-with-ifunc flag.
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;
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; RUN: opt -hwasan -S < %s | \
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; RUN: FileCheck %s --check-prefixes=CHECK,CHECK-NOGLOBAL,CHECK-TLS,CHECK-HISTORY
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; RUN: FileCheck %s --check-prefixes=CHECK,CHECK-NOGLOBAL,CHECK-TLS-SLOT,CHECK-HISTORY,CHECK-HISTORY-TLS-SLOT
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; RUN: opt -hwasan -S -hwasan-with-ifunc=0 -hwasan-with-tls=1 -hwasan-record-stack-history=1 < %s | \
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; RUN: FileCheck %s --check-prefixes=CHECK,CHECK-NOGLOBAL,CHECK-TLS,CHECK-HISTORY
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; RUN: FileCheck %s --check-prefixes=CHECK,CHECK-NOGLOBAL,CHECK-TLS-SLOT,CHECK-HISTORY,CHECK-HISTORY-TLS-SLOT
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; RUN: opt -hwasan -S -hwasan-with-ifunc=0 -hwasan-with-tls=1 -hwasan-record-stack-history=0 < %s | \
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; RUN: FileCheck %s --check-prefixes=CHECK,CHECK-NOGLOBAL,CHECK-IFUNC,CHECK-NOHISTORY
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; RUN: opt -hwasan -S -hwasan-with-ifunc=0 -hwasan-with-tls=0 < %s | \
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; RUN: FileCheck %s --check-prefixes=CHECK,CHECK-GLOBAL,CHECK-NOHISTORY
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; RUN: opt -hwasan -S -hwasan-with-ifunc=1 -hwasan-with-tls=0 < %s | \
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; RUN: FileCheck %s --check-prefixes=CHECK,CHECK-IFUNC,CHECK-NOHISTORY
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; RUN: opt -hwasan -S -mtriple=aarch64-fuchsia < %s | \
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; RUN: FileCheck %s --check-prefixes=CHECK,CHECK-ZERO-OFFSET,CHECK-SHORT-GRANULES,CHECK-HISTORY,CHECK-HWASAN-TLS,CHECK-HISTORY-HWASAN-TLS
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target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128"
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target triple = "aarch64--linux-android22"
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@ -25,6 +27,8 @@ define i32 @test_load(i32* %a) sanitize_hwaddress {
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; CHECK-NOGLOBAL: %[[A:[^ ]*]] = call i8* asm "", "=r,0"([0 x i8]* @__hwasan_shadow)
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; CHECK-NOGLOBAL: @llvm.hwasan.check.memaccess(i8* %[[A]]
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; CHECK-ZERO-OFFSET: %[[A:[^ ]*]] = call i8* asm "", "=r,0"(i8* null)
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; CHECK-SHORT-GRANULES: @llvm.hwasan.check.memaccess.shortgranules(i8* %[[A]]
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; CHECK-GLOBAL: load i8*, i8** @__hwasan_shadow_memory_dynamic_address
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@ -52,11 +56,13 @@ define void @test_alloca() sanitize_hwaddress {
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; CHECK-GLOBAL: load i8*, i8** @__hwasan_shadow_memory_dynamic_address
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; CHECK-TLS: %[[A:[^ ]*]] = call i8* @llvm.thread.pointer()
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; CHECK-TLS: %[[B:[^ ]*]] = getelementptr i8, i8* %[[A]], i32 48
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; CHECK-TLS: %[[C:[^ ]*]] = bitcast i8* %[[B]] to i64*
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; CHECK-TLS: %[[D:[^ ]*]] = load i64, i64* %[[C]]
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; CHECK-TLS: %[[E:[^ ]*]] = ashr i64 %[[D]], 3
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; CHECK-TLS-SLOT: %[[A:[^ ]*]] = call i8* @llvm.thread.pointer()
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; CHECK-TLS-SLOT: %[[B:[^ ]*]] = getelementptr i8, i8* %[[A]], i32 48
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; CHECK-TLS-SLOT: %[[C:[^ ]*]] = bitcast i8* %[[B]] to i64*
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; CHECK-TLS-SLOT: %[[D:[^ ]*]] = load i64, i64* %[[C]]
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; CHECK-TLS-SLOT: %[[E:[^ ]*]] = ashr i64 %[[D]], 3
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; CHECK-HWASAN-TLS: %[[D:[^ ]*]] = load i64, i64* @__hwasan_tls, align 8
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; CHECK-HWASAN-TLS: %[[E:[^ ]*]] = ashr i64 %[[D]], 3
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; CHECK-NOHISTORY-NOT: store i64
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@ -68,7 +74,8 @@ define void @test_alloca() sanitize_hwaddress {
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; CHECK-HISTORY: %[[D3:[^ ]*]] = xor i64 %[[D2]], -1
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; CHECK-HISTORY: %[[D4:[^ ]*]] = add i64 %[[D]], 8
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; CHECK-HISTORY: %[[D5:[^ ]*]] = and i64 %[[D4]], %[[D3]]
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; CHECK-HISTORY: store i64 %[[D5]], i64* %[[C]]
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; CHECK-HISTORY-TLS-SLOT: store i64 %[[D5]], i64* %[[C]]
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; CHECK-HISTORY-HWASAN-TLS: store i64 %[[D5]], i64* @__hwasan_tls
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; CHECK-TLS: %[[F:[^ ]*]] = or i64 %[[D]], 4294967295
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; CHECK-TLS: = add i64 %[[F]], 1
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