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implement large (>16 bit) constant loading.
llvm-svn: 166749
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@ -971,6 +971,10 @@ class SetCC_I16<PatFrag cond_op, PatLeaf imm_type, Instruction I>:
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Mips16Pat<(cond_op CPU16Regs:$rx, imm_type:$imm16),
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Mips16Pat<(cond_op CPU16Regs:$rx, imm_type:$imm16),
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(I CPU16Regs:$rx, imm_type:$imm16)>;
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(I CPU16Regs:$rx, imm_type:$imm16)>;
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// Large (>16 bit) immediate loads
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def : Mips16Pat<(i32 imm:$imm),
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(OrRxRxRy16 (SllX16 (LiRxImmX16 (HI16 imm:$imm)), 16),
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(LiRxImmX16 (LO16 imm:$imm)))>;
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//
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//
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// Some branch conditional patterns are not generated by llvm at this time.
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// Some branch conditional patterns are not generated by llvm at this time.
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17
test/CodeGen/Mips/i32k.ll
Normal file
17
test/CodeGen/Mips/i32k.ll
Normal file
@ -0,0 +1,17 @@
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; RUN: llc -march=mipsel -mcpu=mips16 -relocation-model=pic -O3 < %s | FileCheck %s -check-prefix=16a
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; RUN: llc -march=mipsel -mcpu=mips16 -relocation-model=pic -O3 < %s | FileCheck %s -check-prefix=16b
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@.str = private unnamed_addr constant [4 x i8] c"%i\0A\00", align 1
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define i32 @main() nounwind {
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entry:
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%call = tail call i32 (i8*, ...)* @printf(i8* getelementptr inbounds ([4 x i8]* @.str, i32 0, i32 0), i32 1075344593) nounwind
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; 16a: li ${{[0-9]+}}, 29905
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; 16b: li ${{[0-9]+}}, 16408
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%call1 = tail call i32 (i8*, ...)* @printf(i8* getelementptr inbounds ([4 x i8]* @.str, i32 0, i32 0), i32 -1075344593) nounwind
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; 16a: li ${{[0-9]+}}, 49127
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; 16b: li ${{[0-9]+}}, 35631
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ret i32 0
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}
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declare i32 @printf(i8* nocapture, ...) nounwind
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