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[AArch64][GlobalISel] Select immediate fcmp if the zero is on the LHS.
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@ -4224,6 +4224,14 @@ AArch64InstructionSelector::emitFPCompare(Register LHS, Register RHS,
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// to explicitly materialize a constant.
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const ConstantFP *FPImm = getConstantFPVRegVal(RHS, MRI);
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bool ShouldUseImm = FPImm && (FPImm->isZero() && !FPImm->isNegative());
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if (!ShouldUseImm) {
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// Try commutating the operands.
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const ConstantFP *LHSImm = getConstantFPVRegVal(LHS, MRI);
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if (LHSImm && (LHSImm->isZero() && !LHSImm->isNegative())) {
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ShouldUseImm = true;
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std::swap(LHS, RHS);
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}
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}
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unsigned CmpOpcTbl[2][2] = {{AArch64::FCMPSrr, AArch64::FCMPDrr},
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{AArch64::FCMPSri, AArch64::FCMPDri}};
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unsigned CmpOpc = CmpOpcTbl[ShouldUseImm][OpSize == 64];
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@ -107,3 +107,30 @@ body: |
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%3:gpr(s32) = G_FCMP floatpred(oeq), %0(s64), %2
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$s0 = COPY %3(s32)
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RET_ReallyLR implicit $s0
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...
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---
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name: zero_lhs
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alignment: 4
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legalized: true
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regBankSelected: true
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tracksRegLiveness: true
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body: |
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bb.1:
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liveins: $s0, $s1
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; CHECK-LABEL: name: zero_lhs
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; CHECK: liveins: $s0, $s1
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; CHECK: [[COPY:%[0-9]+]]:fpr32 = COPY $s0
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; CHECK: FCMPSri [[COPY]], implicit-def $nzcv
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; CHECK: [[CSINCWr:%[0-9]+]]:gpr32 = CSINCWr $wzr, $wzr, 1, implicit $nzcv
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; CHECK: $s0 = COPY [[CSINCWr]]
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; CHECK: RET_ReallyLR implicit $s0
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%0:fpr(s32) = COPY $s0
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%1:fpr(s32) = COPY $s1
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%2:fpr(s32) = G_FCONSTANT float 0.000000e+00
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%3:gpr(s32) = G_FCMP floatpred(oeq), %2(s32), %0
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$s0 = COPY %3(s32)
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RET_ReallyLR implicit $s0
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...
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