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[AArch64] Add support for Samsung Exynos-M1
Adds core tuning support for new Samsung Exynos-M1 core (ARMv8-A). Differential Revision: http://reviews.llvm.org/D15663 llvm-svn: 256828
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MinSeong Kim
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3698d6d326
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fea8e6c4f8
@ -213,6 +213,7 @@ ARM_CPU_NAME("cortex-a53", AK_ARMV8A, FK_CRYPTO_NEON_FP_ARMV8, true, AEK_CRC)
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ARM_CPU_NAME("cortex-a57", AK_ARMV8A, FK_CRYPTO_NEON_FP_ARMV8, false, AEK_CRC)
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ARM_CPU_NAME("cortex-a72", AK_ARMV8A, FK_CRYPTO_NEON_FP_ARMV8, false, AEK_CRC)
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ARM_CPU_NAME("cyclone", AK_ARMV8A, FK_CRYPTO_NEON_FP_ARMV8, false, AEK_CRC)
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ARM_CPU_NAME("exynos-m1", AK_ARMV8A, FK_CRYPTO_NEON_FP_ARMV8, false, AEK_CRC)
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// Non-standard Arch names.
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ARM_CPU_NAME("iwmmxt", AK_IWMMXT, FK_NONE, true, AEK_NONE)
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ARM_CPU_NAME("xscale", AK_XSCALE, FK_NONE, true, AEK_NONE)
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@ -124,6 +124,14 @@ def ProcCyclone : SubtargetFeature<"cyclone", "ARMProcFamily", "Cyclone",
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FeaturePerfMon,
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FeatureZCRegMove, FeatureZCZeroing]>;
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def ProcExynosM1 : SubtargetFeature<"exynosm1", "ARMProcFamily", "ExynosM1",
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"Samsung Exynos-M1 processors",
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[FeatureFPARMv8,
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FeatureNEON,
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FeatureCrypto,
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FeatureCRC,
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FeaturePerfMon]>;
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def : ProcessorModel<"generic", NoSchedModel, [FeatureFPARMv8,
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FeatureNEON,
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FeatureCRC,
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@ -136,6 +144,8 @@ def : ProcessorModel<"cortex-a57", CortexA57Model, [ProcA57]>;
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// FIXME: Cortex-A72 is currently modelled as an Cortex-A57.
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def : ProcessorModel<"cortex-a72", CortexA57Model, [ProcA57]>;
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def : ProcessorModel<"cyclone", CycloneModel, [ProcCyclone]>;
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// FIXME: Exynos-M1 is currently modelled without a specific SchedModel.
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def : ProcessorModel<"exynos-m1", NoSchedModel, [ProcExynosM1]>;
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//===----------------------------------------------------------------------===//
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// Assembly parser
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@ -33,7 +33,14 @@ class Triple;
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class AArch64Subtarget : public AArch64GenSubtargetInfo {
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protected:
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enum ARMProcFamilyEnum {Others, CortexA35, CortexA53, CortexA57, Cyclone};
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enum ARMProcFamilyEnum {
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Others,
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CortexA35,
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CortexA53,
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CortexA57,
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Cyclone,
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ExynosM1
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};
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/// ARMProcFamily - ARM processor family: Cortex-A53, Cortex-A57, and others.
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ARMProcFamilyEnum ARMProcFamily;
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@ -143,6 +150,7 @@ public:
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bool isCyclone() const { return CPUString == "cyclone"; }
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bool isCortexA57() const { return CPUString == "cortex-a57"; }
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bool isCortexA53() const { return CPUString == "cortex-a53"; }
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bool isExynosM1() const { return CPUString == "exynos-m1"; }
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bool useAA() const override { return isCortexA53(); }
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@ -252,6 +252,8 @@ def ProcKrait : SubtargetFeature<"krait", "ARMProcFamily", "Krait",
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def ProcSwift : SubtargetFeature<"swift", "ARMProcFamily", "Swift",
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"Swift ARM processors", []>;
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def ProcExynosM1 : SubtargetFeature<"exynosm1", "ARMProcFamily", "ExynosM1",
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"Samsung Exynos-M1 processors", []>;
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def ProcR4 : SubtargetFeature<"r4", "ARMProcFamily", "CortexR4",
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"Cortex-R4 ARM processors", []>;
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@ -649,6 +651,12 @@ def : ProcessorModel<"cyclone", SwiftModel, [ARMv8a, ProcSwift,
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FeatureCrypto,
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FeatureZCZeroing]>;
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def : ProcNoItin<"exynos-m1", [ARMv8a, ProcExynosM1,
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FeatureHWDiv,
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FeatureHWDivARM,
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FeatureT2XtPk,
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FeatureCrypto,
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FeatureCRC]>;
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//===----------------------------------------------------------------------===//
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// Register File Description
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@ -44,7 +44,7 @@ protected:
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enum ARMProcFamilyEnum {
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Others, CortexA5, CortexA7, CortexA8, CortexA9, CortexA12, CortexA15,
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CortexA17, CortexR4, CortexR4F, CortexR5, CortexR7, CortexA35, CortexA53,
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CortexA57, CortexA72, Krait, Swift
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CortexA57, CortexA72, Krait, Swift, ExynosM1
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};
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enum ARMProcClassEnum {
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None, AClass, RClass, MClass
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@ -6,6 +6,7 @@
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; RUN: llc < %s -mtriple=arm64-unknown-unknown -mcpu=cortex-a53 2>&1 | FileCheck %s
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; RUN: llc < %s -mtriple=arm64-unknown-unknown -mcpu=cortex-a57 2>&1 | FileCheck %s
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; RUN: llc < %s -mtriple=arm64-unknown-unknown -mcpu=cortex-a72 2>&1 | FileCheck %s
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; RUN: llc < %s -mtriple=arm64-unknown-unknown -mcpu=exynos-m1 2>&1 | FileCheck %s
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; RUN: llc < %s -mtriple=arm64-unknown-unknown -mcpu=invalidcpu 2>&1 | FileCheck %s --check-prefix=INVALID
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; CHECK-NOT: {{.*}} is not a recognized processor for this target
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@ -2,6 +2,7 @@
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; RUN: llc -mtriple=aarch64-linux-gnuabi -mcpu=cortex-a57 -o - %s | FileCheck %s
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; RUN: llc -mtriple=aarch64-linux-gnuabi -mcpu=cortex-a53 -o - %s | FileCheck %s
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; RUN: llc -mtriple=aarch64-linux-gnuabi -mcpu=cortex-a72 -o - %s | FileCheck %s
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; RUN: llc -mtriple=aarch64-linux-gnuabi -mcpu=exynos-m1 -o - %s | FileCheck %s
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%X = type { i64, i64, i64 }
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declare void @f(%X*)
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@ -109,6 +109,9 @@
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; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a72 -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=CORTEX-A72-FAST
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; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=cortex-a72 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
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; RUN: llc < %s -mtriple=armv8.1a-linux-gnueabi | FileCheck %s --check-prefix=GENERIC-ARMV8_1-A
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; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=exynos-m1 | FileCheck %s --check-prefix=EXYNOS-M1
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; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=exynos-m1 -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=EXYNOS-M1-FAST
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; RUN: llc < %s -mtriple=armv8-linux-gnueabi -mcpu=exynos-m1 -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
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; RUN: llc < %s -mtriple=armv8.1a-linux-gnueabi -enable-unsafe-fp-math -disable-fp-elim -enable-no-infs-fp-math -enable-no-nans-fp-math -fp-contract=fast | FileCheck %s --check-prefix=GENERIC-ARMV8_1-A-FAST
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; RUN: llc < %s -mtriple=armv8.1a-linux-gnueabi -enable-sign-dependent-rounding-fp-math | FileCheck %s --check-prefix=DYN-ROUNDING
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; RUN: llc < %s -mtriple=armv7-none-linux-gnueabi -mcpu=cortex-a7 | FileCheck %s --check-prefix=CORTEX-A7-CHECK
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@ -138,6 +141,9 @@
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; RUN: llc < %s -mtriple=armv8-none-linux-gnueabi -mcpu=cortex-a57 -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN
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; RUN: llc < %s -mtriple=armv8-none-linux-gnueabi -mcpu=cortex-a72 | FileCheck %s --check-prefix=NO-STRICT-ALIGN
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; RUN: llc < %s -mtriple=armv8-none-linux-gnueabi -mcpu=cortex-a72 -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN
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; RUN: llc < %s -mtriple=armv8-none-linux-gnueabi -mcpu=exynos-m1 | FileCheck %s --check-prefix=NO-STRICT-ALIGN
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; RUN: llc < %s -mtriple=armv8-none-linux-gnueabi -mcpu=exynos-m1 -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN
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; ARMv7a
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; RUN: llc < %s -mtriple=armv7-none-linux-gnueabi -mcpu=cortex-a7 | FileCheck %s --check-prefix=NO-STRICT-ALIGN
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; RUN: llc < %s -mtriple=armv7-none-linux-gnueabi -mcpu=cortex-a7 -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN
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@ -1238,6 +1244,36 @@
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; CORTEX-A72-FAST-NOT: .eabi_attribute 22
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; CORTEX-A72-FAST: .eabi_attribute 23, 1
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; EXYNOS-M1: .cpu exynos-m1
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; EXYNOS-M1: .eabi_attribute 6, 14
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; EXYNOS-M1: .eabi_attribute 7, 65
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; EXYNOS-M1: .eabi_attribute 8, 1
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; EXYNOS-M1: .eabi_attribute 9, 2
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; EXYNOS-M1: .fpu crypto-neon-fp-armv8
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; EXYNOS-M1: .eabi_attribute 12, 3
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; EXYNOS-M1-NOT: .eabi_attribute 19
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;; We default to IEEE 754 compliance
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; EXYNOS-M1: .eabi_attribute 20, 1
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; EXYNOS-M1: .eabi_attribute 21, 1
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; EXYNOS-M1-NOT: .eabi_attribute 22
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; EXYNOS-M1: .eabi_attribute 23, 3
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; EXYNOS-M1: .eabi_attribute 24, 1
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; EXYNOS-M1: .eabi_attribute 25, 1
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; EXYNOS-M1-NOT: .eabi_attribute 27
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; EXYNOS-M1-NOT: .eabi_attribute 28
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; EXYNOS-M1: .eabi_attribute 36, 1
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; EXYNOS-M1: .eabi_attribute 38, 1
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; EXYNOS-M1: .eabi_attribute 42, 1
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; EXYNOS-M1-NOT: .eabi_attribute 44
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; EXYNOS-M15: .eabi_attribute 68, 3
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; EXYNOS-M1-FAST-NOT: .eabi_attribute 19
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;; The exynos-m1 has the ARMv8 FP unit, which always flushes preserving sign.
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; EXYNOS-M1-FAST: .eabi_attribute 20, 2
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; EXYNOS-M1-FAST-NOT: .eabi_attribute 21
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; EXYNOS-M1-FAST-NOT: .eabi_attribute 22
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; EXYNOS-M1-FAST: .eabi_attribute 23, 1
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; GENERIC-FPU-VFPV3-FP16: .fpu vfpv3-fp16
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; GENERIC-FPU-VFPV3-D16-FP16: .fpu vfpv3-d16-fp16
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; GENERIC-FPU-VFPV3XD: .fpu vfpv3xd
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