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Special handling of zero-sized live intervals.

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llvm-svn: 49167
This commit is contained in:
Evan Cheng 2008-04-03 16:40:27 +00:00
parent 6250bfbd3e
commit ff9c1655de
2 changed files with 23 additions and 7 deletions
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6
include/llvm/CodeGen/LiveInterval.h
View File

@ -275,14 +275,16 @@ namespace llvm {
/// beginNumber - Return the lowest numbered slot covered by interval.
unsigned beginNumber() const {
assert(!empty() && "empty interval for register");
if (empty())
return 0;
return ranges.front().start;
}
/// endNumber - return the maximum point of the interval of the whole,
/// exclusive.
unsigned endNumber() const {
assert(!empty() && "empty interval for register");
if (empty())
return 0;
return ranges.back().end;
}

24
lib/CodeGen/RegAllocLinearScan.cpp
View File

@ -322,11 +322,13 @@ void RALinScan::linearScan()
++NumIters;
DOUT << "\n*** CURRENT ***: " << *cur << '\n';
processActiveIntervals(cur->beginNumber());
processInactiveIntervals(cur->beginNumber());
if (!cur->empty()) {
processActiveIntervals(cur->beginNumber());
processInactiveIntervals(cur->beginNumber());
assert(TargetRegisterInfo::isVirtualRegister(cur->reg) &&
"Can only allocate virtual registers!");
assert(TargetRegisterInfo::isVirtualRegister(cur->reg) &&
"Can only allocate virtual registers!");
}
// Allocating a virtual register. try to find a free
// physical register or spill an interval (possibly this one) in order to
@ -508,11 +510,23 @@ void RALinScan::assignRegOrStackSlotAtInterval(LiveInterval* cur)
{
DOUT << "\tallocating current interval: ";
// This is an implicitly defined live interval, just assign any register.
const TargetRegisterClass *RC = reginfo_->getRegClass(cur->reg);
if (cur->empty()) {
unsigned physReg = cur->preference;
if (!physReg)
physReg = *RC->allocation_order_begin(*mf_);
DOUT << tri_->getName(physReg) << '\n';
// Note the register is not really in use.
vrm_->assignVirt2Phys(cur->reg, physReg);
handled_.push_back(cur);
return;
}
PhysRegTracker backupPrt = *prt_;
std::vector<std::pair<unsigned, float> > SpillWeightsToAdd;
unsigned StartPosition = cur->beginNumber();
const TargetRegisterClass *RC = reginfo_->getRegClass(cur->reg);
const TargetRegisterClass *RCLeader = RelatedRegClasses.getLeaderValue(RC);
// If this live interval is defined by a move instruction and its source is