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[X86] Support matching VPTERNLOG when the root node is X86ISD::ANDNP.

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This commit is contained in:
Craig Topper 2020-08-08 12:58:49 -07:00
parent 83ecd17734
commit ffa193cdec
2 changed files with 13 additions and 4 deletions
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11
lib/Target/X86/X86ISelDAGToDAG.cpp
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@ -3991,6 +3991,12 @@ bool X86DAGToDAGISel::tryVPTERNLOG(SDNode *N) {
switch (N->getOpcode()) {
default: llvm_unreachable("Unexpected opcode!");
case X86ISD::ANDNP:
if (A == N0)
Imm &= ~TernlogMagicA;
else
Imm = ~(Imm) & TernlogMagicA;
break;
case ISD::AND: Imm &= TernlogMagicA; break;
case ISD::OR: Imm |= TernlogMagicA; break;
case ISD::XOR: Imm ^= TernlogMagicA; break;
@ -4592,6 +4598,11 @@ void X86DAGToDAGISel::Select(SDNode *Node) {
return;
break;
case X86ISD::ANDNP:
if (tryVPTERNLOG(Node))
return;
break;
case ISD::AND:
if (NVT.isVector() && NVT.getVectorElementType() == MVT::i1) {
// Try to form a masked VPTESTM. Operands can be in either order.

6
test/CodeGen/X86/avx512vl-logic.ll
View File

@ -1301,8 +1301,7 @@ define <4 x i64> @ternlog_masky_xor_and_mask_ymm(<4 x i64> %x, <4 x i64> %y, <4
define <4 x i32> @ternlog_andn_or(<4 x i32> %x, <4 x i32> %y, <4 x i32> %z) {
; CHECK-LABEL: ternlog_andn_or:
; CHECK: ## %bb.0:
; CHECK-NEXT: vorps %xmm2, %xmm1, %xmm1
; CHECK-NEXT: vandnps %xmm1, %xmm0, %xmm0
; CHECK-NEXT: vpternlogd $14, %xmm2, %xmm1, %xmm0
; CHECK-NEXT: retq
%a = xor <4 x i32> %x, <i32 -1, i32 -1, i32 -1, i32 -1>
%b = or <4 x i32> %y, %z
@ -1313,8 +1312,7 @@ define <4 x i32> @ternlog_andn_or(<4 x i32> %x, <4 x i32> %y, <4 x i32> %z) {
define <4 x i32> @ternlog_andn_or_2(<4 x i32> %x, <4 x i32> %y, <4 x i32> %z) {
; CHECK-LABEL: ternlog_andn_or_2:
; CHECK: ## %bb.0:
; CHECK-NEXT: vorps %xmm2, %xmm1, %xmm1
; CHECK-NEXT: vandnps %xmm0, %xmm1, %xmm0
; CHECK-NEXT: vpternlogd $16, %xmm2, %xmm1, %xmm0
; CHECK-NEXT: retq
%a = or <4 x i32> %y, %z
%b = xor <4 x i32> %a, <i32 -1, i32 -1, i32 -1, i32 -1>