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Commit Graph

176 Commits

Author SHA1 Message Date
Venkatraman Govindaraju
05510dd426 [SparcV9]: Implement lowering of long double (fp128) arguments in Sparc64 ABI.
Also, pass fp128 arguments to varargs through integer registers if necessary.

llvm-svn: 198145
2013-12-29 01:20:36 +00:00
Venkatraman Govindaraju
700f24667b [SPARCV9]: Adjust the resultant pointer of DYNAMIC_STACKALLOC with the stack BIAS on sparcV9.
llvm-svn: 196755
2013-12-09 05:13:25 +00:00
Venkatraman Govindaraju
c918055fdb [Sparc]: Implement getSetCCResultType() in SparcTargetLowering so that umulo/smulo can be lowered on sparcv9 without an assertion error.
llvm-svn: 196751
2013-12-09 04:02:15 +00:00
Venkatraman Govindaraju
0ab9fc8dbd [SparcV9]: Expand MULHU/MULHS:i64 and UMUL_LOHI/SMUL_LOHI:i64 on sparcv9.
This fixes PR18150.

llvm-svn: 196735
2013-12-08 22:06:07 +00:00
Venkatraman Govindaraju
0c27a5ac2c [SparcV9] Enable custom lowering of DYNAMIC_STACKALLOC in sparc64.
llvm-svn: 195573
2013-11-24 17:41:41 +00:00
Roman Divacky
8f3a1182e7 Expand rotate instructions on sparcv9 as well.
llvm-svn: 194500
2013-11-12 19:04:45 +00:00
Venkatraman Govindaraju
8ce290e5fa [SparcV9] Handle i64 <-> float conversions in sparcv9 mode.
llvm-svn: 193957
2013-11-03 12:28:40 +00:00
Venkatraman Govindaraju
1b0f7d035d [Sparc] Expand FP_TO_UINT, UINT_TO_FP for fp128.
llvm-svn: 193947
2013-11-03 08:00:19 +00:00
Venkatraman Govindaraju
c60684ae6f [SparcV9] Add ctpop instruction for i64. Also, expand ctlz, cttz and bswap.
llvm-svn: 193941
2013-11-03 05:59:07 +00:00
Roman Divacky
e5df4dcd13 SparcV9 doesnt have rem instruction either.
llvm-svn: 193789
2013-10-31 19:22:33 +00:00
Venkatraman Govindaraju
aedc12be2e [Sparc] Disable tail call optimization for sparc64.
This patch fixes PR17506.

llvm-svn: 192294
2013-10-09 12:50:39 +00:00
Venkatraman Govindaraju
6abd2b0367 [Sparc] Implement JIT for SPARC.
No new testcases. However, this patch makes all supported JIT testcases in 
test/ExecutionEngine  pass on Sparc.

llvm-svn: 192176
2013-10-08 07:15:22 +00:00
Venkatraman Govindaraju
aacd252702 [Sparc] Custom lower addc/adde/subc/sube on i64 in sparc64.
This is required because i64 is a legal type but addxcc/subxcc reads icc carry bit, which are 32 bit conditional codes.

llvm-svn: 192054
2013-10-06 03:36:18 +00:00
Venkatraman Govindaraju
179e7e6dea [Sparc] Use correct alignment while loading/storing fp128 values.
llvm-svn: 192023
2013-10-05 02:29:47 +00:00
Venkatraman Govindaraju
cf869e9b2a [Sparc] Respect hasHardQuad parameter correctly when lowering SINT_TO_FP with fp128 operand.
llvm-svn: 192015
2013-10-05 00:31:41 +00:00
Venkatraman Govindaraju
af5985d1f5 [Sparc] Implements exception handling in SPARC with DwarfCFI.
llvm-svn: 191432
2013-09-26 15:11:00 +00:00
Venkatraman Govindaraju
ae9ddc5768 [Sparc] Add support for TLS in sparc.
llvm-svn: 191164
2013-09-22 06:48:52 +00:00
Venkatraman Govindaraju
df68ba133b [SPARC] Make functions with GLOBAL_OFFSET_TABLE access as non-leaf functions.
llvm-svn: 191160
2013-09-22 01:40:24 +00:00
Venkatraman Govindaraju
54744c0b41 [Sparc] Fix lowering FABS on fp128 (long double) on pre-v9 targets.
llvm-svn: 191154
2013-09-21 23:51:08 +00:00
Venkatraman Govindaraju
b3ea970660 [Sparc] Correctly handle call to functions with ReturnsTwice attribute.
In sparc, setjmp stores only the registers %fp, %sp, %i7 and %o7. longjmp restores
the stack, and the callee-saved registers (all local/in registers: %i0-%i7, %l0-%l7)
using the stored %fp and register windows. However, this does not guarantee that the longjmp
will restore the registers, as they were when the setjmp was called. This is because these
registers may be clobbered after returning from setjmp, but before calling longjmp.

This patch prevents the registers %i0-%i5, %l0-l7 to live across the setjmp call using the register mask.  

llvm-svn: 190033
2013-09-05 05:32:16 +00:00
Venkatraman Govindaraju
30d6d6f6c9 [Sparc] Fix an assertion failure while lowering fcmp on long double.
This assertion is triggered because an integer constant is created with wrong
  type.

llvm-svn: 189948
2013-09-04 15:15:20 +00:00
Venkatraman Govindaraju
ab95772300 [Sparc] Add support for soft long double (fp128).
llvm-svn: 189780
2013-09-03 04:11:59 +00:00
Venkatraman Govindaraju
a3fc2b00cc [Sparc] Add long double (f128) instructions to sparc backend.
llvm-svn: 189198
2013-08-25 18:30:06 +00:00
Jakob Stoklund Olesen
30751de202 Use register masks on SPARC call instructions.
llvm-svn: 189085
2013-08-23 02:33:47 +00:00
Venkatraman Govindaraju
bc8be24d6c [Sparc] Rewrite MBB's live-in registers for leaf functions. Also, add
register i7 as a live-in if current function's return address is taken.

This revision fixes PR16269.

llvm-svn: 187433
2013-07-30 19:53:10 +00:00
Craig Topper
58fa7a9b4a Use SmallVectorImpl& instead of SmallVector to avoid repeating small vector size.
llvm-svn: 186274
2013-07-14 04:42:23 +00:00
Chad Rosier
d00211e479 The getRegForInlineAsmConstraint function should only accept MVT value types.
llvm-svn: 184642
2013-06-22 18:37:38 +00:00
Venkatraman Govindaraju
9767317993 [Sparc] Delete FPMover Pass and remove Fp* Pseudo-instructions from Sparc backend.
llvm-svn: 183613
2013-06-08 15:32:59 +00:00
Venkatraman Govindaraju
867986b1ff [Sparc]: Use cmp instruction instead of subcc to compare integers.
llvm-svn: 183463
2013-06-07 00:03:36 +00:00
Venkatraman Govindaraju
a65d380b15 Sparc: No functionality change. Cleanup whitespaces, comment formatting etc.,
llvm-svn: 183243
2013-06-04 18:33:25 +00:00
Venkatraman Govindaraju
2d5d39937e Sparc: Add support for indirect branch and blockaddress in Sparc backend.
llvm-svn: 183094
2013-06-03 05:58:33 +00:00
Venkatraman Govindaraju
2425aef2ad Sparc: Mark functions calling llvm.vastart and llvm.returnaddress intrinsics as non-leaf functions.
llvm-svn: 183079
2013-06-01 20:42:48 +00:00
Andrew Trick
aec414c298 Order CALLSEQ_START and CALLSEQ_END nodes.
Fixes PR16146: gdb.base__call-ar-st.exp fails after
pre-RA-sched=source fixes.

Patch by Xiaoyi Guo!

This also fixes an unsupported dbg.value test case. Codegen was
previously incorrect but the test was passing by luck.

llvm-svn: 182885
2013-05-29 22:03:55 +00:00
Andrew Trick
2790ee3a8e Track IR ordering of SelectionDAG nodes 2/4.
Change SelectionDAG::getXXXNode() interfaces as well as call sites of
these functions to pass in SDLoc instead of DebugLoc.

llvm-svn: 182703
2013-05-25 02:42:55 +00:00
Jakob Stoklund Olesen
dad0022424 Also expand 64-bit bitcasts.
llvm-svn: 182229
2013-05-20 01:01:43 +00:00
Jakob Stoklund Olesen
f777e6d131 Mark i64 SETCC as expand so it is turned into a SELECT_CC.
llvm-svn: 182227
2013-05-20 00:28:36 +00:00
Jakob Stoklund Olesen
c9f30e9065 Passing arguments to varags functions under the SPARC v9 ABI.
Arguments after the fixed arguments never use the floating point
registers.

llvm-svn: 179987
2013-04-21 21:36:49 +00:00
Jakob Stoklund Olesen
cbfbef04da Compile varargs functions for SPARCv9.
With a little help from the frontend, it looks like the standard va_*
intrinsics can do the job.

Also clean up an old bitcast hack in LowerVAARG that dealt with
unaligned double loads. Load SDNodes can specify an alignment now.

Still missing: Calling varargs functions with float arguments.

llvm-svn: 179961
2013-04-20 22:49:16 +00:00
Tim Northover
d12b2f24c8 Remove unused MEMBARRIER DAG node; it's been replaced by ATOMIC_FENCE.
llvm-svn: 179939
2013-04-20 12:32:17 +00:00
Jakob Stoklund Olesen
3b790b7f2e Use i32 for all SPARC shift amounts, even in 64-bit mode.
Test case by llvm-stress.

llvm-svn: 179477
2013-04-14 05:48:50 +00:00
Jakob Stoklund Olesen
8fafe8cd31 Add support for the abs64 SPARC v9 code model.
For when 16 TB just isn't enough.

llvm-svn: 179474
2013-04-14 05:10:36 +00:00
Jakob Stoklund Olesen
d29f125f5b Add support for the SPARC v9 abs44 code model.
This is the default model for non-PIC 64-bit code. It supports
text+data+bss linked anywhere in the low 16 TB of the address space.

llvm-svn: 179473
2013-04-14 04:57:51 +00:00
Jakob Stoklund Olesen
b5173ad8fb Also put target flags on SPARC constant pool references.
Constant pool entries are accessed exactly the same way as global
variables.

llvm-svn: 179471
2013-04-14 04:35:16 +00:00
Jakob Stoklund Olesen
edb2dd00c5 Add target flags to SPARC address operands.
SDNodes and MachineOperands get target flags representing the %hi() and
%lo() assembly annotations that eventually become relocations.

Also define flags to be used by the 64-bit code models.

llvm-svn: 179468
2013-04-14 01:33:32 +00:00
Jakob Stoklund Olesen
6182cc630a Define SPARC code models.
Currently, only abs32 and pic32 are implemented. Add a test case for
abs32 with 64-bit code. 64-bit PIC code is currently broken.

llvm-svn: 179463
2013-04-13 19:02:23 +00:00
Jakob Stoklund Olesen
b5640bf98c Extract a function.
llvm-svn: 179086
2013-04-09 05:11:52 +00:00
Jakob Stoklund Olesen
6a275455ac Compute correct frame sizes for SPARC v9 64-bit frames.
The save area is twice as big and there is no struct return slot. The
stack pointer is always 16-byte aligned (after adding the bias).

Also eliminate the stack adjustment instructions around calls when the
function has a reserved stack frame.

llvm-svn: 179083
2013-04-09 04:37:47 +00:00
Jakob Stoklund Olesen
658f7754a3 Implement LowerCall_64 for the SPARC v9 64-bit ABI.
There is still no support for byval arguments (which I don't think are
needed) and varargs.

llvm-svn: 178993
2013-04-07 19:10:57 +00:00
Jakob Stoklund Olesen
594e073ba0 Implement LowerReturn_64 for SPARC v9.
Integer return values are sign or zero extended by the callee, and
structs up to 32 bytes in size can be returned in registers.

The CC_Sparc64 CallingConv definition is shared between
LowerFormalArguments_64 and LowerReturn_64. Function arguments and
return values are passed in the same registers.

The inreg flag is also used for return values. This is required to handle
C functions returning structs containing floats and ints:

  struct ifp {
    int i;
    float f;
  };

  struct ifp f(void);

LLVM IR:

  define inreg { i32, float } @f() {
     ...
     ret { i32, float } %retval
  }

The ABI requires that %retval.i is returned in the high bits of %i0
while %retval.f goes in %f1.

Without the inreg return value attribute, %retval.i would go in %i0 and
%retval.f would go in %f3 which is a more efficient way of returning
%multiple values, but it is not ABI compliant for returning C structs.

llvm-svn: 178966
2013-04-06 23:57:33 +00:00
Jakob Stoklund Olesen
2076ffbc15 Complete formal arguments for the SPARC v9 64-bit ABI.
All arguments are formally assigned to stack positions and then promoted
to floating point and integer registers. Since there are more floating
point registers than integer registers, this can cause situations where
floating point arguments are assigned to registers after integer
arguments that where assigned to the stack.

Use the inreg flag to indicate 32-bit fragments of structs containing
both float and int members.

The three-way shadowing between stack, integer, and floating point
registers requires custom argument lowering. The good news is that
return values are passed in the exact same way, and we can share the
code.

Still missing:

 - Update LowerReturn to handle structs returned in registers.
 - LowerCall.
 - Variadic functions.

llvm-svn: 178958
2013-04-06 18:32:12 +00:00