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Commit Graph

141101 Commits

Author SHA1 Message Date
Nicolai Haehnle
045e52b36e [SelectionDAG] Early-out in TargetLowering::expandMUL (NFC)
Summary: Reduce indentation level; preparation for D24956.

Reviewers: efriedma

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D27063

llvm-svn: 287831
2016-11-23 22:14:20 +00:00
Simon Pilgrim
cb7f3e03bb [X86][AVX512VL] Add v2f64 -> v2i32/v2f32 + zero codegen tests
llvm-svn: 287821
2016-11-23 22:01:50 +00:00
Matt Arsenault
52046c39e3 AMDGPU: Cleanup immediate folding code
Move code down to use, reorder to avoid hard to follow
immediate folding logic.

llvm-svn: 287818
2016-11-23 21:51:07 +00:00
Matt Arsenault
51f193382b AMDGPU: Fix debug printing
The uint8_t was printed as a char which didn't really work.

llvm-svn: 287817
2016-11-23 21:51:05 +00:00
Simon Pilgrim
88fa710a55 [X86][SSE] Add v2i64 -> v2i32 + zero codegen test
llvm-svn: 287813
2016-11-23 21:19:57 +00:00
Matt Arsenault
8316e1ce66 AMDGPU: Fix not setting kill flag on temp reg when spilling
llvm-svn: 287808
2016-11-23 21:00:12 +00:00
Matt Arsenault
4fa66c3653 AMDGPU: Fix adding extra implicit def of register
In the scalar case, there's no reason to add an additional
def of the same register.

llvm-svn: 287807
2016-11-23 21:00:10 +00:00
Matt Arsenault
dae776c6dc AMDGPU: Fix MMO when splitting spill
The size and offset were wrong. The size of the object was
being used for the size of the access, when here it is really
being split into 4-byte accesses. The underlying object size
is set in the MachinePointerInfo, which also didn't have the
offset set.

llvm-svn: 287806
2016-11-23 20:52:53 +00:00
Vedant Kumar
8cd1c5209c Revert "[lit] When setting SDKROOT on Darwin, use '--sdk macosx' to find the right SDK path."
This reverts commit r287403. It breaks an internal asan bot. According
to Kuba, a fix is up for review here: https://reviews.llvm.org/D26929

llvm-svn: 287804
2016-11-23 20:51:09 +00:00
Meador Inge
6746ba845f llvm-nm: Print correct symbol types for init and fini sections
This patch fixes a small bug where symbols defined in the INIT
and FINI sections were incorrectly getting a type of 'n'.

Differential Revision: https://reviews.llvm.org/D26937

llvm-svn: 287803
2016-11-23 20:17:20 +00:00
Meador Inge
4761d43258 llvm-nm: Don't print value or size for undefined or weak symbols
Undefined and weak symbols don't have a meaningful size or value.
As such, nothing should be printed for those attributes (this is
already done for the address with 'U') with the BSD format.  This
matches what GNU nm does.

Note that for the POSIX.2 format [1] zero values are still
printed for the size and value.  This seems in spirit with
the format strings in that specification, but is debatable.

[1] http://pubs.opengroup.org/onlinepubs/9699919799/

Differential Revision: https://reviews.llvm.org/D26936

llvm-svn: 287802
2016-11-23 20:17:15 +00:00
Alexey Bataev
ee7135385b [SLP] Add more tests for SLP Vectorizer.
llvm-svn: 287801
2016-11-23 20:10:32 +00:00
Haicheng Wu
fe4a4f4937 [LoopUnroll] Move code to exit early. NFC.
Just to save some compilation time.

Differential Revision: https://reviews.llvm.org/D26784

llvm-svn: 287800
2016-11-23 19:39:26 +00:00
Daniel Berlin
5c0c0081f0 Revert "[Triple] Add Facebook vendor"
This reverts commit r287684

Objections on the review thread had not been addressed to
prior to commit.  I asked the committer to revert, but i expect they
are gone for the US holiday or something.

llvm-svn: 287798
2016-11-23 19:03:54 +00:00
Michael Kuperstein
fb1214dfc3 [X86] Allow folding of stack reloads when loading a subreg of the spilled reg
We did not support subregs in InlineSpiller:foldMemoryOperand() because targets
may not deal with them correctly.

This adds a target hook to let the spiller know that a target can handle
subregs, and actually enables it for x86 for the case of stack slot reloads.
This fixes PR30832.

Differential Revision: https://reviews.llvm.org/D26521

llvm-svn: 287792
2016-11-23 18:33:49 +00:00
Hemant Kulkarni
2897f4949a llvm-readobj: Use hash tables to print dynamic symbols.
-symbols prints both .symtab and .dynsym symbols for GNU style in ELF.
-dyn-symbols prints symbols looking up through hash tables. This helps validate hash tables.

llvm-svn: 287786
2016-11-23 18:04:23 +00:00
Chandler Carruth
dad102bcc9 [PM] Change the static object whose address is used to uniquely identify
analyses to have a common type which is enforced rather than using
a char object and a `void *` type when used as an identifier.

This has a number of advantages. First, it at least helps some of the
confusion raised in Justin Lebar's code review of why `void *` was being
used everywhere by having a stronger type that connects to documentation
about this.

However, perhaps more importantly, it addresses a serious issue where
the alignment of these pointer-like identifiers was unknown. This made
it hard to use them in pointer-like data structures. We were already
dodging this in dangerous ways to create the "all analyses" entry. In
a subsequent patch I attempted to use these with TinyPtrVector and
things fell apart in a very bad way.

And it isn't just a compile time or type system issue. Worse than that,
the actual alignment of these pointer-like opaque identifiers wasn't
guaranteed to be a useful alignment as they were just characters.

This change introduces a type to use as the "key" object whose address
forms the opaque identifier. This both forces the objects to have proper
alignment, and provides type checking that we get it right everywhere.
It also makes the types somewhat less mysterious than `void *`.

We could go one step further and introduce a truly opaque pointer-like
type to return from the `ID()` static function rather than returning
`AnalysisKey *`, but that didn't seem to be a clear win so this is just
the initial change to get to a reliably typed and aligned object serving
is a key for all the analyses.

Thanks to Richard Smith and Justin Lebar for helping pick plausible
names and avoid making this refactoring many times. =] And thanks to
Sean for the super fast review!

While here, I've tried to move away from the "PassID" nomenclature
entirely as it wasn't really helping and is overloaded with old pass
manager constructs. Now we have IDs for analyses, and key objects whose
address can be used as IDs. Where possible and clear I've shortened this
to just "ID". In a few places I kept "AnalysisID" to make it clear what
was being identified.

Differential Revision: https://reviews.llvm.org/D27031

llvm-svn: 287783
2016-11-23 17:53:26 +00:00
Alina Sbirlea
40a0781572 [LoadStoreVectorizer] Enable vectorization of stores in the presence of an aliasing load
Summary:
The "getVectorizablePrefix" method would give up if it found an aliasing load for a store chain.
In practice, the aliasing load can be treated as a memory barrier and all stores that precede it
are a valid vectorizable prefix.
Issue found by volkan in D26962. Testcase is a pruned version of the one in the original patch.

Reviewers: jlebar, arsenm, tstellarAMD

Subscribers: mzolotukhin, wdng, nhaehnle, anna, volkan, llvm-commits

Differential Revision: https://reviews.llvm.org/D27008

llvm-svn: 287781
2016-11-23 17:43:15 +00:00
Nirav Dave
7277c2fa1f [DAG] Improve loads-from-store forwarding to handle TokenFactor
Forward store values to matching loads down through token
factors. Factored from D14834.

Reviewers: jyknight, hfinkel

Subscribers: hfinkel, nemanjai, llvm-commits

Differential Revision: https://reviews.llvm.org/D26080

llvm-svn: 287773
2016-11-23 16:48:35 +00:00
Yichao Yu
f15fbb456e Fix doc of llvm.bitreverse.iN
Summary:
The return type is `iN` rather than always `i16`

Seems to be a typo in https://reviews.llvm.org/rL252878 .

Reviewers: jmolloy

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D27047

llvm-svn: 287769
2016-11-23 16:25:31 +00:00
John Brawn
216329b982 [DAGCombiner] Fix infinite loop in vector mul/shl combining
We have the following DAGCombiner transformations:
 (mul (shl X, c1), c2) -> (mul X, c2 << c1)
 (mul (shl X, C), Y) -> (shl (mul X, Y), C)
 (shl (mul x, c1), c2) -> (mul x, c1 << c2)
Usually the constant shift is optimised by SelectionDAG::getNode when it is
constructed, by SelectionDAG::FoldConstantArithmetic, but when we're dealing
with vectors and one of those vector constants contains an undef element
FoldConstantArithmetic does not fold and we enter an infinite loop.

Fix this by making FoldConstantArithmetic use getNode to decide how to fold each
vector element, the same as FoldConstantVectorArithmetic does, and rather than
adding the constant shift to the work list instead only apply the transformation
if it's already been folded into a constant, as if it's not we're going to loop
endlessly. Additionally add missing NoOpaques to one of those transformations,
which I noticed when writing the tests for this.

Differential Revision: https://reviews.llvm.org/D26605

llvm-svn: 287766
2016-11-23 16:05:51 +00:00
Nemanja Ivanovic
3f612871bc [PowerPC] Remove InstAlias definitions that cause incorrect assembly
In rL283190, I added some InstAlias definitions to generate extended mnemonics
for some uses of the XXPERMDI instruction. However, when the assembler matches
these extended mnemonics, it matches the new instruction in situations where it
should match the old one.
This patch removes these definitions and accomplishes that by defining these
mnemonics with additional instructions that are isCodeGenOnly.

Fixes PR31127.

llvm-svn: 287765
2016-11-23 15:51:52 +00:00
Simon Pilgrim
5df905e2e1 [X86][AVX512] Add support for v4i64 fptosi/fptoui/sitofp/uitofp on AVX512DQ-only targets
Use 512-bit instructions with subvector insertion/extraction like we do in a number of similar circumstances

llvm-svn: 287762
2016-11-23 14:01:18 +00:00
Elena Demikhovsky
d4faa2ae53 Type legalization for compressstore and expandload intrinsics.
Implemented widening (v2f32) and splitting (v16f64).
On splitting, I use "popcnt" to calculate memory increment. 
More type legalization work will come in the next patches.

llvm-svn: 287761
2016-11-23 13:58:24 +00:00
Simon Pilgrim
1f99fea9ae [CostModel][X86] Add missing AVX512DQ v8i64 fptosi/sitofp costs
llvm-svn: 287760
2016-11-23 13:42:09 +00:00
Benjamin Kramer
121f95bd32 [MD5] Use write32le instead of spelling it out with shifts.
No functionality change intended.

llvm-svn: 287757
2016-11-23 11:49:28 +00:00
Simon Pilgrim
648b765007 [CostModel][X86] Add v2f32 -> v2i64 fptosi/fptoui cost tests
llvm-svn: 287756
2016-11-23 11:43:00 +00:00
Craig Topper
db1139c3c8 [AVX-512] Remove intrinsics for valignd/q and autoupgrade them to native shuffles.
llvm-svn: 287744
2016-11-23 06:54:55 +00:00
Zvi Rackover
624c7ddb4e [X86] Simplify lowerVectorShuffleAsBitMask to handle only integer VT's
Summary: This function is only called with integer VT arguments, so remove code that handles FP vectors.

Reviewers: RKSimon, craig.topper, delena, andreadb

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D26985

llvm-svn: 287743
2016-11-23 06:45:25 +00:00
Rui Ueyama
f0af8c0e9b Fix builbots.
llvm-svn: 287735
2016-11-23 03:58:12 +00:00
Kuba Mracek
c7c751102c [xray] Add XRay support for Mach-O in CodeGen
Currently, XRay only supports emitting the XRay table (xray_instr_map) on ELF binaries. Let's add Mach-O support.

Differential Revision: https://reviews.llvm.org/D26983

llvm-svn: 287734
2016-11-23 02:07:04 +00:00
Davide Italiano
c9c586dde1 [SCCP] Add a test for switches on undef.
Without this test, you can just remove the code fixing the
switch to the first constant in ResolvedUndefs in and everything
pass. This test, instead, fails with an assertion if the code
is removed. Found while refactoring SCCP to integrate undef in
the solver.

llvm-svn: 287731
2016-11-23 01:42:39 +00:00
Rui Ueyama
e33d058f16 Add convenient functions to compute hashes of byte vectors.
In many sitautions, you just want to compute a hash for one chunk
of data. This patch adds convenient functions for that purpose.

Differential Revision: https://reviews.llvm.org/D26988

llvm-svn: 287726
2016-11-23 00:46:09 +00:00
Eugene Zelenko
becb428e09 [ADT] Fix some Clang-tidy modernize-use-default and Include What You Use warnings; other minor fixes.
Differential revision: https://reviews.llvm.org/D27001

llvm-svn: 287725
2016-11-23 00:30:24 +00:00
Zachary Turner
abe4ee5498 Make STL range adapter naming consistent.
Differential Revision: https://reviews.llvm.org/D27009

llvm-svn: 287724
2016-11-23 00:27:23 +00:00
Zachary Turner
f7b9285e0f Add some searching functions for ArrayRef<T>.
Differential Revision: https://reviews.llvm.org/D26999

llvm-svn: 287722
2016-11-22 23:22:19 +00:00
Justin Lebar
639bde8815 [StructurizeCFG] Refactor OrderNodes.
Summary:
No need to copy the RPOT vector before using it.  Switch from std::map
to SmallDenseMap.  Get rid of an unused variable (TempVisited).  Get rid
of a typedef, RNVector, which is now used only once.

Differential Revision: https://reviews.llvm.org/D26997

llvm-svn: 287721
2016-11-22 23:14:11 +00:00
Justin Lebar
556ff6c269 [StructurizeCFG] Add whitespace in getAnalysisUsage.
Summary:
"addRequired" and "addPreserved" look very similar when squished up next
to each other -- without the newline this code looked to me like it was
addRequired'ing DominatorTreeWrapperPass twice.

Reviewers: arsenm

Subscribers: wdng, llvm-commits

Differential Revision: https://reviews.llvm.org/D26996

llvm-svn: 287720
2016-11-22 23:14:07 +00:00
Justin Lebar
74d146e2de [StructurizeCFG] Remove unnecessary "using" in class.
Reviewers: arsenm

Subscribers: wdng, llvm-commits

Differential Revision: https://reviews.llvm.org/D26995

llvm-svn: 287719
2016-11-22 23:13:49 +00:00
Justin Lebar
ebfbd1c05a [StructurizeCFG] Merge the two constructors into one.
Reviewers: arsenm

Subscribers: wdng, llvm-commits

Differential Revision: https://reviews.llvm.org/D26994

llvm-svn: 287718
2016-11-22 23:13:44 +00:00
Justin Lebar
025800b1ba [StructurizeCFG] Use a for-each loop instead of iterators in runOnRegion.
Summary:

Reviewers: arsenm

Subscribers: wdng, llvm-commits

Differential Revision: https://reviews.llvm.org/D26993

llvm-svn: 287717
2016-11-22 23:13:37 +00:00
Justin Lebar
c229bf7dc3 [StructurizeCFG] Make hasOnlyUniformBranches a non-member function.
Summary: Lets us get rid of one member variable too.

Reviewers: arsenm

Subscribers: wdng, llvm-commits

Differential Revision: https://reviews.llvm.org/D26992

llvm-svn: 287716
2016-11-22 23:13:33 +00:00
Justin Lebar
4e42ce7138 [CUDA] Note in docs that you need to build with -lcudart on MacOS
-lcudart_static doesn't work.  We don't know why.

llvm-svn: 287715
2016-11-22 23:13:29 +00:00
Sanjay Patel
51362a8242 add and use isBitwiseLogicOp() helper function; NFCI
llvm-svn: 287712
2016-11-22 22:54:36 +00:00
Dehao Chen
ab1280a397 Before sample pgo annotation, do not inline a function that has no debug info. (NFC)
If there is no debug info in the callee, inlining it will not help annotator. This avoids infinite loop as reported in PR/31119.

llvm-svn: 287710
2016-11-22 22:50:01 +00:00
Davide Italiano
ab7c4be9a7 [SCCP] Remove code in visitBinaryOperator (and add tests).
We visit and/or, we try to derive a lattice value for the
instruction even if one of the operands is overdefined.
If the non-overdefined value is still 'unknown' just return and wait
for ResolvedUndefsIn to "plug in" the correct value. This simplifies
the logic a bit. While I'm here add tests for missing cases.

llvm-svn: 287709
2016-11-22 22:11:25 +00:00
Matthias Braun
882a081504 TargetSubtargetInfo: Move implementation to lib/CodeGen; NFC
TargetSubtargetInfo is filled with CodeGen specific interfaces nowadays
(getInstrInfo(), getFrameLowering(), getSelectionDAGInfo()) most of the
tuning flags like enablePostRAScheduler(), getAntiDepBreakMode(),
enableRALocalReassignment(), ... also do not seem to be universal enough
to make sense outside of CodeGen.

Differential Revision: https://reviews.llvm.org/D26948

llvm-svn: 287708
2016-11-22 22:09:03 +00:00
Sanjay Patel
bfd2798cf9 [InstCombine] change bitwise logic type to eliminate bitcasts
In PR27925:
https://llvm.org/bugs/show_bug.cgi?id=27925

...we proposed adding this fold to eliminate a bitcast. In D20774, there was 
some concern about changing the type of a bitwise op as well as creating 
bitcasts that might not be free for a target. However, if we're strictly 
eliminating an instruction (by limiting this to one-use ops), then we should 
be able to do this in InstCombine.

But we're cautiously restricting the transform for now to vector types to
avoid possible backend problems. A transform to make sure the logic op is
legal for the target should be added to reverse this transform and improve
codegen.

Differential Revision: https://reviews.llvm.org/D26641

llvm-svn: 287707
2016-11-22 22:05:48 +00:00
Simon Pilgrim
d10c156adb [X86][AVX512DQ] Add fp <-> int tests for AVX512DQ/AVX512DQ+VL
llvm-svn: 287706
2016-11-22 22:04:50 +00:00
Chandler Carruth
5809531031 [LCG] Add a previously missing assert about the relationship of RefSCCs.
No intended change, everything seems to be in working order already.

llvm-svn: 287705
2016-11-22 21:40:10 +00:00