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Commit Graph

113 Commits

Author SHA1 Message Date
Evan Cheng
52dedf7dfe Now that code placement optimization pass is run for JIT, make sure it's before pre-emit passes.
llvm-svn: 86092
2009-11-05 01:16:59 +00:00
Eric Christopher
f20f6980cb Add some options to disable various code gen optimizations.
llvm-svn: 86044
2009-11-04 19:57:50 +00:00
Dan Gohman
de460ebecb Factor out more code into addCommonCodeGenPasses. The JIT wasn't
previously running CodePlacementOpt. Also print headers before
each dump in -print-machineinstrs mode, so that it's clear which
dump is which.

llvm-svn: 85681
2009-10-31 20:17:39 +00:00
Dan Gohman
04c536dff6 Remove CodeGenLICM. It's largely obsoleted by MachineLICM's new ability
to unfold loop-invariant loads.

llvm-svn: 85657
2009-10-31 14:35:41 +00:00
Bill Wendling
58923e365d Don't put in these EH changes.
llvm-svn: 85460
2009-10-29 00:37:35 +00:00
Bill Wendling
784d38511f Reverting r85338 for now. It's causing a bootstrap failure on PPC darwin9.
--- Reverse-merging r85338 into '.':
U    lib/CodeGen/SimpleRegisterCoalescing.cpp
U    lib/CodeGen/SimpleRegisterCoalescing.h

llvm-svn: 85454
2009-10-29 00:22:16 +00:00
Bob Wilson
fc1194919b Revert r85346 change to control tail merging by CodeGenOpt::Level.
I'm going to redo this using the OptimizeForSize function attribute.

llvm-svn: 85426
2009-10-28 20:46:46 +00:00
Bob Wilson
98c9fb94ab Record CodeGen optimization level in the BranchFolding pass so that we can
use it to control tail merging when there is a tradeoff between performance
and code size.  When there is only 1 instruction in the common tail, we have
been merging.  That can be good for code size but is a definite loss for
performance.  Now we will avoid tail merging in that case when the
optimization level is "Aggressive", i.e., "-O3".  Radar 7338114.

Since the IfConversion pass invokes BranchFolding, it too needs to know
the optimization level.  Note that I removed the RegisterPass instantiation
for IfConversion because it required a default constructor.  If someone
wants to keep that for some reason, we can add a default constructor with
a hard-wired optimization level.

llvm-svn: 85346
2009-10-27 23:49:38 +00:00
Evan Cheng
e1fbdc5244 Change createPostRAScheduler so it can be turned off at llc -O1.
llvm-svn: 84273
2009-10-16 21:06:15 +00:00
Evan Cheng
bb0561f2dd Add a target hook to add pre- post-regalloc scheduling passes.
llvm-svn: 83144
2009-09-30 08:49:50 +00:00
David Goodwin
a282690f82 Remove -post-RA-schedule flag and add a TargetSubtarget method to enable post-register-allocation scheduling. By default it is off. For ARM, enable/disable with -mattr=+/-postrasched. Enable by default for cortex-a8.
llvm-svn: 83122
2009-09-30 00:10:16 +00:00
Evan Cheng
ac17fbc5fe Flip -disable-post-RA-scheduler to -post-RA-scheduler.
llvm-svn: 82803
2009-09-25 21:38:11 +00:00
Dan Gohman
752227ef24 Add a new pass for doing late hoisting of floating-point and vector
constants out of loops. These aren't covered by the regular LICM
pass, because in LLVM IR constants don't require separate
instructions. They're not always covered by the MachineLICM pass
either, because it doesn't know how to unfold folded constant-pool
loads. This is somewhat experimental at this point, and off by
default.

llvm-svn: 82076
2009-09-16 20:25:11 +00:00
Dan Gohman
cd6a67f749 -fast is now -O0. -fast-isel is no longer experimental.
llvm-svn: 80104
2009-08-26 15:57:57 +00:00
Chris Lattner
9a542aae19 remove std::ostream versions of printing stuff for MBB and MF,
upgrading a few things to use raw_ostream

llvm-svn: 79811
2009-08-23 03:13:20 +00:00
Chris Lattner
5d8af49626 Rename TargetAsmInfo (and its subclasses) to MCAsmInfo.
llvm-svn: 79763
2009-08-22 20:48:53 +00:00
Jim Grosbach
4643e96d36 Move the sjlj exception handling conversions to a back-end pass where they
more properly belong. This allows removing the front-end conditionalized
SJLJ code, and cleans up the generated IR considerably. All of the
infrastructure code (calling _Unwind_SjLj_Register/Unregister, etc) is
added by the SjLjEHPrepare pass.

llvm-svn: 79250
2009-08-17 16:41:22 +00:00
Jakob Stoklund Olesen
db3f862b6f Allow double defs in the machine code verifier after the addPreRegAlloc passes.
llvm-svn: 79095
2009-08-15 13:10:15 +00:00
Daniel Dunbar
eab68eaec4 TargetRegistry: Change AsmPrinter constructor to be typed as returning an
AsmPrinter instance (instead of just a FunctionPass)

llvm-svn: 78962
2009-08-13 23:48:47 +00:00
Daniel Dunbar
62eec42595 TargetRegistry: Reorganize AsmPrinter construction so that clients pass in the
TargetAsmInfo. This eliminates a dependency on TargetMachine.h from
TargetRegistry.h, which technically was a layering violation.
 - Clients probably can only sensibly pass in the same TargetAsmInfo as the
   TargetMachine has, but there are only limited clients of this API.

llvm-svn: 78928
2009-08-13 19:38:51 +00:00
Chris Lattner
55df534293 Change TargetAsmInfo to be constructed via TargetRegistry from a Target+Triple
pair instead of from a virtual method on TargetMachine.  This cuts the final
ties of TargetAsmInfo to TargetMachine, meaning that MC can now use 
TargetAsmInfo.

llvm-svn: 78802
2009-08-12 07:22:17 +00:00
Dan Gohman
24939b2c4f Tidy #includes.
llvm-svn: 78677
2009-08-11 16:02:12 +00:00
Jim Grosbach
c9a1dd9291 SjLj based exception handling unwinding support. This patch is nasty, brutish
and short. Well, it's kinda short. Definitely nasty and brutish.

The front-end generates the register/unregister calls into the SjLj runtime,
call-site indices and landing pad dispatch. The back end fills in the LSDA
with the call-site information provided by the front end. Catch blocks are
not yet implemented.

Built on Darwin and verified no llvm-core "make check" regressions.

llvm-svn: 78625
2009-08-11 00:09:57 +00:00
Evan Cheng
eb8c4db271 Disable stack coloring with register for now. It's not able to set kill markers.
llvm-svn: 78179
2009-08-05 07:26:17 +00:00
Dan Gohman
f28b3bb262 Reapply r77654 with a fix: MachineFunctionPass's getAnalysisUsage
shouldn't do AU.setPreservesCFG(), because even though CodeGen passes
don't modify the LLVM IR CFG, they may modify the MachineFunction CFG,
and passes like MachineLoop are registered with isCFGOnly set to true.

llvm-svn: 77691
2009-07-31 18:16:33 +00:00
Daniel Dunbar
60d71a790c Revert r77654, it appears to be causing llvm-gcc bootstrap failures, and many
failures when building assorted projects with clang.

--- Reverse-merging r77654 into '.':
U    include/llvm/CodeGen/Passes.h
U    include/llvm/CodeGen/MachineFunctionPass.h
U    include/llvm/CodeGen/MachineFunction.h
U    include/llvm/CodeGen/LazyLiveness.h
U    include/llvm/CodeGen/SelectionDAGISel.h
D    include/llvm/CodeGen/MachineFunctionAnalysis.h
U    include/llvm/Function.h
U    lib/Target/CellSPU/SPUISelDAGToDAG.cpp
U    lib/Target/PowerPC/PPCISelDAGToDAG.cpp
U    lib/CodeGen/LLVMTargetMachine.cpp
U    lib/CodeGen/MachineVerifier.cpp
U    lib/CodeGen/MachineFunction.cpp
U    lib/CodeGen/PrologEpilogInserter.cpp
U    lib/CodeGen/MachineLoopInfo.cpp
U    lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
D    lib/CodeGen/MachineFunctionAnalysis.cpp
D    lib/CodeGen/MachineFunctionPass.cpp
U    lib/CodeGen/LiveVariables.cpp

llvm-svn: 77661
2009-07-31 03:02:41 +00:00
Dan Gohman
645f1122c0 Manage MachineFunctions with an analysis Pass instead of the Annotable
mechanism. To support this, make MachineFunctionPass a little more
complete.

llvm-svn: 77654
2009-07-31 01:52:50 +00:00
Daniel Dunbar
19efed84cc We don't need to use llvm_report_error, this interface can deal with errors
(although we don't get a very good error message).

llvm-svn: 75864
2009-07-15 23:54:01 +00:00
Daniel Dunbar
5f443ecde8 Add missing includes.
llvm-svn: 75862
2009-07-15 23:48:37 +00:00
Daniel Dunbar
4771afe104 Lift addAssemblyEmitter into LLVMTargetMachine.
- No functionality change.

llvm-svn: 75859
2009-07-15 23:34:19 +00:00
Daniel Dunbar
d85e8b6334 Lift DumpAsm / -print-emitted-asm functionality into LLVMTargetMachine.
- No intended functionality change.

llvm-svn: 75848
2009-07-15 22:33:19 +00:00
David Greene
9c8a1b9b90 Have asm printers use formatted_raw_ostream directly to avoid a
dynamic_cast<>.

llvm-svn: 75670
2009-07-14 20:18:05 +00:00
Evan Cheng
7c051b0c6f Revert an accidental commit.
llvm-svn: 75553
2009-07-13 23:44:01 +00:00
Bruno Cardoso Lopes
38373542a1 Add the Object Code Emitter class. Original patch by Aaron Gray, I did some
cleanup, removed some #includes and moved Object Code Emitter out-of-line.

llvm-svn: 74813
2009-07-06 05:09:34 +00:00
Evan Cheng
d0a66e438f Add a ARM specific pre-allocation pass that re-schedule loads / stores from
consecutive addresses togther. This makes it easier for the post-allocation pass
to form ldm / stm.

This is step 1. We are still missing a lot of ldm / stm opportunities because
of register allocation are not done in the desired order. More enhancements
coming.

llvm-svn: 73291
2009-06-13 09:12:55 +00:00
Bruno Cardoso Lopes
4da7e7af43 First patch in the direction of splitting MachineCodeEmitter in two subclasses:
JITCodeEmitter and ObjectCodeEmitter. No functional changes yet. Patch by Aaron Gray

llvm-svn: 72631
2009-05-30 20:51:52 +00:00
Duncan Sands
bbd03677ee Add a new codegen pass that normalizes dwarf exception handling
code in preparation for code generation.  The main thing it does
is handle the case when eh.exception calls (and, in a future
patch, eh.selector calls) are far away from landing pads.  Right
now in practice you only find eh.exception calls close to landing
pads: either in a landing pad (the common case) or in a landing
pad successor, due to loop passes shifting them about.  However
future exception handling improvements will result in calls far
from landing pads:
(1) Inlining of rewinds.  Consider the following case:
In function @f:
...
  invoke @g to label %normal unwind label %unwinds
...
unwinds:
  %ex = call i8* @llvm.eh.exception()
...

In function @g:
...
  invoke @something to label %continue unwind label %handler
...
handler:
  %ex = call i8* @llvm.eh.exception()
... perform cleanups ...
  "rethrow exception"

Now inline @g into @f.  Currently this is turned into:
In function @f:
...
  invoke @something to label %continue unwind label %handler
...
handler:
  %ex = call i8* @llvm.eh.exception()
... perform cleanups ...
  invoke "rethrow exception" to label %normal unwind label %unwinds
unwinds:
  %ex = call i8* @llvm.eh.exception()
...

However we would like to simplify invoke of "rethrow exception" into
a branch to the %unwinds label.  Then %unwinds is no longer a landing
pad, and the eh.exception call there is then far away from any landing
pads.

(2) Using the unwind instruction for cleanups.
It would be nice to have codegen handle the following case:
  invoke @something to label %continue unwind label %run_cleanups
...
handler:
... perform cleanups ...
  unwind

This requires turning "unwind" into a library call, which
necessarily takes a pointer to the exception as an argument
(this patch also does this unwind lowering).  But that means
you are using eh.exception again far from a landing pad.

(3) Bugpoint simplifications.  When bugpoint is simplifying
exception handling code it often generates eh.exception calls
far from a landing pad, which then causes codegen to assert.
Bugpoint then latches on to this assertion and loses sight
of the original problem.

Note that it is currently rare for this pass to actually do
anything.  And in fact it normally shouldn't do anything at
all given the code coming out of llvm-gcc!  But it does fire
a few times in the testsuite.  As far as I can see this is
almost always due to the LoopStrengthReduce codegen pass
introducing pointless loop preheader blocks which are landing
pads and only contain a branch to another block.  This other
block contains an eh.exception call.  So probably by tweaking
LoopStrengthReduce a bit this can be avoided.

llvm-svn: 72276
2009-05-22 20:36:31 +00:00
Jakob Stoklund Olesen
94c30c8409 Pass to verify generated machine code.
The following is checked:

* Operand counts: All explicit operands must be present.

* Register classes: All physical and virtual register operands must be
  compatible with the register class required by the instruction descriptor.

* Register live intervals: Registers must be defined only once, and must be
  defined before use.

The machine code verifier is enabled with the command-line option
'-verify-machineinstrs', or by defining the environment variable
LLVM_VERIFY_MACHINEINSTRS to the name of a file that will receive all the
verifier errors.

llvm-svn: 71918
2009-05-16 00:33:53 +00:00
Evan Cheng
d6e3e4d746 Fixed a stack slot coloring with reg bug: do not update implicit use / def when doing forward / backward propagation.
llvm-svn: 71574
2009-05-12 18:31:57 +00:00
Evan Cheng
1b99da6e30 Rename "loop aligner" pass to "code placement optimization" pass.
llvm-svn: 71150
2009-05-07 05:42:24 +00:00
Bill Wendling
6edd6ef74f Just turn aggressive stack coloring off at -O3.
llvm-svn: 71140
2009-05-07 01:33:38 +00:00
Bill Wendling
7c50dcd02e Temporarily revert r71010. It was causing massive failures during self-hosting.
llvm-svn: 71138
2009-05-07 01:27:25 +00:00
Evan Cheng
984da04cd0 Enable stack coloring with regs at -O3.
llvm-svn: 71010
2009-05-05 20:30:36 +00:00
Bill Wendling
40a162f75f Instead of passing in an unsigned value for the optimization level, use an enum,
which better identifies what the optimization is doing. And is more flexible for
future uses.

llvm-svn: 70440
2009-04-29 23:29:43 +00:00
Bill Wendling
7546bed590 Second attempt:
Massive check in. This changes the "-fast" flag to "-O#" in llc. If you want to
use the old behavior, the flag is -O0. This change allows for finer-grained
control over which optimizations are run at different -O levels.

Most of this work was pretty mechanical. The majority of the fixes came from
verifying that a "fast" variable wasn't used anymore. The JIT still uses a
"Fast" flag. I'll change the JIT with a follow-up patch.

llvm-svn: 70343
2009-04-29 00:15:41 +00:00
Bill Wendling
ef47ace92f r70270 isn't ready yet. Back this out. Sorry for the noise.
llvm-svn: 70275
2009-04-28 01:04:53 +00:00
Bill Wendling
2799e916c3 Massive check in. This changes the "-fast" flag to "-O#" in llc. If you want to
use the old behavior, the flag is -O0. This change allows for finer-grained
control over which optimizations are run at different -O levels.

Most of this work was pretty mechanical. The majority of the fixes came from
verifying that a "fast" variable wasn't used anymore. The JIT still uses a
"Fast" flag. I'm not 100% sure if it's necessary to change it there...

llvm-svn: 70270
2009-04-28 00:21:31 +00:00
Evan Cheng
3a7489a4cc CodeGen still defaults to non-verbose asm, but llc now overrides it and default to verbose.
llvm-svn: 67668
2009-03-25 01:47:28 +00:00
Evan Cheng
3f98669da2 Re-enable machine sinking pass now that the coalescer bugs and the AnalyzeBrnach bug are fixed.
llvm-svn: 64126
2009-02-09 08:45:39 +00:00
Bill Wendling
4ed0306d6f Revert r63999. It was breaking self-hosting builds.
llvm-svn: 64062
2009-02-08 00:58:05 +00:00