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Author SHA1 Message Date
Benjamin Kramer
0f569dc6bf Nope, there's another one! 
llvm-svn: 140045
 2011-09-19 20:23:01 +00:00
Benjamin Kramer
804be3463c Missed one instance of implicit pointer conversion. 
llvm-svn: 140044
 2011-09-19 20:14:46 +00:00
Benjamin Kramer
f2e726fe00 Silence -Wsign-compare warnings from GCC. 
llvm-svn: 140043
 2011-09-19 20:08:54 +00:00
Benjamin Kramer
06a87d562a Try to make MSVC 2010 happy. 
llvm-svn: 140042
 2011-09-19 20:08:52 +00:00
Owen Anderson
4bf9e290e9 Specify an additional fixed bit in the Thumb2 SSAT encoding to prevent the decoder from emitting gibberish for this invalid encoding. 
llvm-svn: 140041
 2011-09-19 20:00:02 +00:00
Eli Friedman
ff05929fab Fix a typo in the bitcode reader in the handling of atomic stores. Reported by David Meyer on llvmdev. 
llvm-svn: 140040
 2011-09-19 19:41:28 +00:00
Jim Grosbach
57328aa902 ARM asm parsing should handle pre-indexed writeback w/o immediate. 
For example, 'ldrb r9, [sp]!' is odd, but valid.

llvm-svn: 140035
 2011-09-19 18:42:21 +00:00
David Greene
799578fee4 Better Error Reporting 
Report missing template arguments more helpfully by supplying the name
of the missing argument in the error message.

llvm-svn: 140034
 2011-09-19 18:26:07 +00:00
Jakob Stoklund Olesen
884abe4bba X86 has asterisk-free inline asm support now. 
Floating point stack inline asm works.

llvm-svn: 140033
 2011-09-19 18:15:46 +00:00
Owen Anderson
b843f3625d Handle STRT (and friends) like LDRT (and friends) for decoding purposes. Port over additional encoding tests to decoding tests. 
llvm-svn: 140032
 2011-09-19 18:07:10 +00:00
Jim Grosbach
c677995374 Thumb2 assembly parsing and encoding for SXTAB/SXTAB16/SXTAH. 
llvm-svn: 140029
 2011-09-19 17:56:37 +00:00
Benjamin Kramer
82df2a3e37 Add a MachO-specific "mode" to llvm-objdump, that, if enabled, gathers additional information that are only available on MachO. 
- It can take FunctionStarts from a binary to find entry points more accurately.
- Symbol offsets in executables are correct now.

llvm-svn: 140028
 2011-09-19 17:56:04 +00:00
Benjamin Kramer
b758741823 MCInstrAnalysis: Don't crash on instructions with no operands. 
llvm-svn: 140027
 2011-09-19 17:56:00 +00:00
Andrew Trick
856edc0ef5 [indvars] Fix PR10946: SCEV cannot handle Vector IVs. 
llvm-svn: 140026
 2011-09-19 17:54:39 +00:00
Jim Grosbach
06677b6b4c Thumb2 assembly parsing and encoding for SVC. 
llvm-svn: 140025
 2011-09-19 17:40:35 +00:00
Jim Grosbach
a5bdf3b221 Thumb2 assembly parsing and encoding for SUB(register). 
llvm-svn: 140024
 2011-09-19 17:37:48 +00:00
Stepan Dyatkovskiy
b769edad5b Added regression test for bug #10869. 
llvm-svn: 140012
 2011-09-19 07:48:08 +00:00
NAKAMURA Takumi
6171669218 Add Win32 support to llvm::llvm_execute_on_thread(). Thanks to Aaron Ballman! 
llvm-svn: 140011
 2011-09-19 07:41:43 +00:00
Jakob Stoklund Olesen
502c13a9e4 Claimed. 
llvm-svn: 140010
 2011-09-19 05:34:10 +00:00
Nadav Rotem
a6af03c6fb Fix typos in my prev commit, found by Tobi. 
llvm-svn: 140003
 2011-09-18 19:00:23 +00:00
Nadav Rotem
1cfdc59e94 setOperationAction should be done on the return value of the type, not the operands. 
llvm-svn: 140001
 2011-09-18 14:57:03 +00:00
Bill Wendling
f29791020b Remove obsolete .pod files. 
llvm-svn: 140000
 2011-09-18 12:52:55 +00:00
Bill Wendling
911a44ba8a Fix up the formating and change llvm-gcc to clang. 
Note that this example doesn't work anymore!

llvm-svn: 139999
 2011-09-18 12:51:05 +00:00
Bill Wendling
2b453ef022 Remove mention of llvm-gcc/llvm-g++ from doc. 
llvm-svn: 139998
 2011-09-18 12:37:20 +00:00
Nadav Rotem
cfc77bc719 When promoting integer vectors we often create ext-loads. This patch adds a 
dag-combine optimization to implement the ext-load efficiently (using shuffles).

For example the type <4 x i8> is stored in memory as i32, but it needs to
find its way into a <4 x i32> register. Previously we scalarized the memory
access, now we use shuffles.

llvm-svn: 139995
 2011-09-18 10:39:32 +00:00
Nadav Rotem
4d74f80219 white space cleanups 
llvm-svn: 139994
 2011-09-18 10:29:29 +00:00
Craig Topper
c5a97d12bb Fix typo by changing Lower256IntVETCC to Lower256IntVSETCC. 
llvm-svn: 139993
 2011-09-18 08:03:58 +00:00
Benjamin Kramer
547157073b Apply Duncan's test fix from r139986 to the avx version of that test too. 
llvm-svn: 139992
 2011-09-18 00:41:38 +00:00
Duncan Sands
4149334f09 Synthesize x86 max/min instructions also for vectors (i.e. produce 
maxps and maxpd).  This broke the sse41-blend.ll testcase by causing
maxpd to be produced rather than a cmp+blend pair, which is the reason
I tweaked it.  Gives a small speedup on doduc with dragonegg when the
GCC vectorizer is used.

llvm-svn: 139986
 2011-09-17 16:49:39 +00:00
Bruno Cardoso Lopes
f611f6c371 Describe more AVX 128-bit convert instructions without patterns to have 
mayLoad = 1

llvm-svn: 139973
 2011-09-16 23:41:29 +00:00
Owen Anderson
c1f638997d Bitfield mask instructions are unpredictable if the encoded LSB is higher than the encoded MSB. 
llvm-svn: 139972
 2011-09-16 23:30:01 +00:00
Owen Anderson
df512e9961 Add a testcase for another corner-case decoding. 
llvm-svn: 139970
 2011-09-16 23:15:29 +00:00
Owen Anderson
aec67a3ea1 Fix bitfield decoding based on Eli's feedback. 
llvm-svn: 139969
 2011-09-16 23:04:48 +00:00
Ted Kremenek
484a96fab1 Add ImmutableMapRef and ImmutableSetRef, which consolidate Immutable[Map,Set] and its Factory. This may eventually replace Immtuable[Map,Set]. 
llvm-svn: 139967
 2011-09-16 23:01:25 +00:00
Jim Grosbach
95242bff08 Thumb2 assembly parsing and encoding for SUB(immediate). 
llvm-svn: 139966
 2011-09-16 22:58:42 +00:00
Owen Anderson
5d23e1e5b4 Thumb2 pre-indexed loads/stores use the restricted GPR set for Rt. 
llvm-svn: 139965
 2011-09-16 22:42:36 +00:00
Owen Anderson
eae0eee720 Fix disassembly of Thumb2 BFI instructions with bit range of [0, 32). 
llvm-svn: 139964
 2011-09-16 22:29:48 +00:00
Jim Grosbach
3a58f722bf Thumb2 assembly parsing and encoding for STRT. 
llvm-svn: 139963
 2011-09-16 22:27:12 +00:00
Jim Grosbach
41ece87fae Thumb2 assembly parsing and encoding for LDRHT/STRHT. 
llvm-svn: 139962
 2011-09-16 22:26:01 +00:00
Jim Grosbach
e9f1da5dec Thumb2 assembly parsing and encoding for STREX/STREXB/STREXH/STREXD. 
llvm-svn: 139961
 2011-09-16 22:22:07 +00:00
Jim Grosbach
f8313f60b3 Thumb2 assembly parsing and encoding for STRD. 
llvm-svn: 139960
 2011-09-16 22:19:38 +00:00
Jim Grosbach
d0ef17692a Simplify comment. There's no Thumb LDRD(register) encoding. That's ARM only. 
llvm-svn: 139959
 2011-09-16 22:18:42 +00:00
Owen Anderson
3a487c8c9b Add fixed bits to correctly distinguish Thumb2 SSAT/SSAT16's. 
llvm-svn: 139958
 2011-09-16 22:17:02 +00:00
Jim Grosbach
c3834c5da5 Thumb2 assembly parsing and encoding for STRBT. 
llvm-svn: 139957
 2011-09-16 22:15:51 +00:00
Jim Grosbach
3caa04dc32 Thumb2 assembly parsing and encoding for STRH. 
llvm-svn: 139956
 2011-09-16 22:12:19 +00:00
Jim Grosbach
771b6c5fe3 Remove test of undocumented format. 
llvm-svn: 139955
 2011-09-16 22:09:58 +00:00
Jim Grosbach
b181e68ab6 Thumb2 assembly parsing and encoding for STRB. 
llvm-svn: 139954
 2011-09-16 22:09:19 +00:00
Bruno Cardoso Lopes
396b8136bf Add mayLoad attribute to AVX convert instructions, since non of them 
are declared with load patterns. This fix the crash in PR10941. No testcases,
since a fold is triggered and then converted back to the register form
afterwards.

llvm-svn: 139953
 2011-09-16 22:02:14 +00:00
Jim Grosbach
f75d317df4 Shuffle a few more thumb2 tests to match the comment headings. 
llvm-svn: 139952
 2011-09-16 22:01:18 +00:00
Jim Grosbach
bc84a55ed8 Thumb2 tests for STR(literal), STR(register) and STR pre/post indexed immediate. 
llvm-svn: 139951
 2011-09-16 21:59:13 +00:00