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Commit Graph

69 Commits

Author SHA1 Message Date
Alex Lorenz
072f1a6a6c MIR Parser: Extract the method 'parseGlobalValue'. NFC.
This commit extracts the code that parses a global value from the method
'parseGlobalAddressOperand' into a new method 'parseGlobalValue', so that this
code can be reused by the method which will parse the block address machine
operands.

llvm-svn: 243450
2015-07-28 17:09:52 +00:00
Alex Lorenz
29ce80d4de MIR Parser: Move the function 'lexName'. NFC.
This commit moves the function 'lexName' to the start of the file so it can
be reused by the function which will lex the named LLVM IR block references.

llvm-svn: 243449
2015-07-28 17:03:40 +00:00
Alex Lorenz
82fbf0efb2 MIR Parser: Remove redundant parameters. NFC.
This commit removes the redundant parameters from the two methods
'initializeRegisterInfo' and 'initializeFrameInfo'. The removed parameters are
redundant as we are already passing in the 'MachineFunction' to those methods,
and those parameters can be derived from the machine function parameter.

llvm-svn: 243445
2015-07-28 16:48:37 +00:00
Alex Lorenz
a4d7009206 MIR Serialization: Serialize the unnamed basic block references.
This commit serializes the references from the machine basic blocks to the
unnamed basic blocks.

This commit adds a new attribute to the machine basic block's YAML mapping
called 'ir-block'. This attribute contains the actual reference to the
basic block.

Reviewers: Duncan P. N. Exon Smith
llvm-svn: 243340
2015-07-27 22:42:41 +00:00
Alex Lorenz
c5d8e8c3ef MIR Serialization: Serialize the '.cfi_def_cfa_register' CFI instruction.
llvm-svn: 243322
2015-07-27 20:39:03 +00:00
Alex Lorenz
c0e56154a9 MIR Parser: Rename the standalone parsing methods. NFC.
This commit renames the methods 'parseMBB' and 'parseNamedRegister' to
'parseStandaloneMBB' and 'parseStandaloneNamedRegister' in order for their
names to be consistent with the method 'parseStandaloneVirtualRegister'.

llvm-svn: 243319
2015-07-27 20:29:27 +00:00
Alex Lorenz
13ff25761a MIR Serialization: Serialize the machine function's liveins.
Reviewers: Duncan P. N. Exon Smith
llvm-svn: 243288
2015-07-27 17:42:45 +00:00
Alex Lorenz
810bac62a2 MIR Serialization: Serialize MachineFrameInfo's callee saved information.
This commit serializes the callee saved information from the class
'MachineFrameInfo'. This commit extends the YAML mappings for the fixed and
the ordinary stack objects and adds an optional 'callee-saved-register'
attribute. This attribute is used to serialize the callee save information.

llvm-svn: 243173
2015-07-24 22:22:50 +00:00
Alex Lorenz
3ce3b25440 MIR Serialization: Serialize the simple virtual register allocation hints.
This commit serializes the virtual register allocations hints of type 0.
These hints specify the preferred physical registers for allocations.

llvm-svn: 243156
2015-07-24 20:35:40 +00:00
Alex Lorenz
e4e044b9fa MIR Parser: Run the machine verifier after initializing machine functions.
llvm-svn: 243128
2015-07-24 17:44:49 +00:00
NAKAMURA Takumi
d6ff93a4cf MIRParser/LLVMBuild.txt: Add MC for MCRegisterInfo::getDwarfRegNum().
llvm-svn: 243081
2015-07-24 01:12:36 +00:00
NAKAMURA Takumi
8fbe9b9dad Reorder alphabetically.
llvm-svn: 243080
2015-07-24 01:12:28 +00:00
Alex Lorenz
1ba189db4e MIR Serialization: Serialize the '.cfi_offset' CFI instruction.
Reviewers: Duncan P. N. Exon Smith
llvm-svn: 243062
2015-07-23 23:09:07 +00:00
Alex Lorenz
9fd61458ca MIR Serialization: Serialize the machine instruction's debug location.
llvm-svn: 242938
2015-07-22 21:15:11 +00:00
Alex Lorenz
592bfaf056 MIR Parser: Extract the MDNode parsing code into a separate method. NFC.
This change would allow the machine instruction parser to reuse this method when
parsing the metadata node for the machine instruction's debug location property.

llvm-svn: 242934
2015-07-22 21:07:04 +00:00
Alex Lorenz
ddcf8bce2b MIR Serialization: Serialize the metadata machine operands.
llvm-svn: 242916
2015-07-22 17:58:46 +00:00
Alex Lorenz
d54c1a6d40 MIR Serialization: Start serializing the CFI operands with .cfi_def_cfa_offset.
This commit begins serialization of the CFI index machine operands by
serializing one kind of CFI instruction - the .cfi_def_cfa_offset instruction.

Reviewers: Duncan P. N. Exon Smith
llvm-svn: 242845
2015-07-21 22:28:27 +00:00
Alex Lorenz
be5ba86160 MIR Parser: Reuse the function 'lexName' when lexing global value tokens. NFC.
This commit refactors the function 'maybeLexGlobalValue' so that now it reuses
the function 'lexName' when lexing a named global value token.

llvm-svn: 242837
2015-07-21 21:23:08 +00:00
Alex Lorenz
e961fcfaa4 MIR Serialization: Serialize the external symbol machine operands.
Reviewers: Duncan P. N. Exon Smith
llvm-svn: 242806
2015-07-21 16:59:53 +00:00
Alex Lorenz
2f98a55682 MIR Serialization: Initial serialization of machine constant pools.
This commit implements the initial serialization of machine constant pools and
the constant pool index machine operands. The constant pool is serialized using
a YAML sequence of YAML mappings that represent the constant values.
The target-specific constant pool items aren't serialized by this commit.

Reviewers: Duncan P. N. Exon Smith
llvm-svn: 242707
2015-07-20 20:51:18 +00:00
Alex Lorenz
96c6a7e8a7 MIR Parser: Add support for quoted named global value operands.
This commit extends the machine instruction lexer and implements support for
the quoted global value tokens. With this change the syntax for the global value
identifier tokens becomes identical to the syntax for the global identifier
tokens from the LLVM's assembly language.

Reviewers: Duncan P. N. Exon Smith
llvm-svn: 242702
2015-07-20 20:31:01 +00:00
Alex Lorenz
5ebdfda8d2 MIR Parser: Allow the dollar characters in all of the identifier tokens.
This commit modifies the machine instruction lexer so that it now accepts the
'$' characters in identifier tokens.

This change makes the syntax for unquoted global value tokens consistent with
the syntax for the global idenfitier tokens in the LLVM's assembly language.

llvm-svn: 242584
2015-07-17 22:48:04 +00:00
Alex Lorenz
6fa497343d MIR Serialization: Serialize the frame setup machine instruction flag.
llvm-svn: 242491
2015-07-17 00:24:15 +00:00
Alex Lorenz
b3441a0f38 MIR Serialization: Serialize the frame index machine operands.
Reviewers: Duncan P. N. Exon Smith
llvm-svn: 242487
2015-07-16 23:37:45 +00:00
Alex Lorenz
5b9f1e6415 MIR Serialization: Serialize the jump table index operands.
Reviewers: Duncan P. N. Exon Smith
llvm-svn: 242358
2015-07-15 23:38:35 +00:00
Alex Lorenz
7146d12547 MIR Serialization: Serialize the jump table info.
The jump table info is serialized using a YAML mapping that contains its kind
and a YAML sequence of jump table entries. A jump table entry is a YAML mapping
that has an ID and an inline YAML sequence of machine basic block references.

The testcase 'CodeGen/MIR/X86/jump-table-info.mir' doesn't have any instructions
because one of them contains a jump table index operand. The jump table index
operands will be serialized in a follow up patch, and the appropriate
instructions will be added to this testcase.

Reviewers: Duncan P. N. Exon Smith
llvm-svn: 242357
2015-07-15 23:31:07 +00:00
Alex Lorenz
fc7a1b12f5 MIR Serialization: Serialize references from the stack objects to named allocas.
This commit serializes the references to the named LLVM alloca instructions from
the stack objects in the machine frame info. This commit adds a field 'Name' to
the struct 'yaml::MachineStackObject'. This new field is used to store the name
of the alloca instruction when the alloca is present and when it has a name.

llvm-svn: 242339
2015-07-15 22:14:49 +00:00
Alex Lorenz
427be4c561 MIR Serialization: Serialize the machine basic block live in registers.
llvm-svn: 242204
2015-07-14 21:24:41 +00:00
Alex Lorenz
262fad804e MIR Serialization: Serialize the variable sized stack objects.
llvm-svn: 242095
2015-07-14 00:26:26 +00:00
Alex Lorenz
cddac3ca8f MIR Serialization: Serialize the sub register indices.
This commit serializes the sub register indices from the register machine
operands.

Reviewers: Duncan P. N. Exon Smith
llvm-svn: 242084
2015-07-13 23:24:34 +00:00
Alex Lorenz
f891b70313 MIR Serialization: Serialize the fixed stack objects.
This commit serializes the fixed stack objects, including fixed spill slots.
The fixed stack objects are serialized using a YAML sequence of YAML inline
mappings. Each mapping has the object's ID, type, size, offset, and alignment.
The objects that aren't spill slots also serialize the isImmutable and isAliased
flags.

The fixed stack objects are a part of the machine function's YAML mapping.

Reviewers: Duncan P. N. Exon Smith
llvm-svn: 242045
2015-07-13 18:07:26 +00:00
Alex Lorenz
3307a878a0 MIR Serialization: Serialize the virtual register operands.
Reviewers: Duncan P. N. Exon Smith

Differential Revision: http://reviews.llvm.org/D11005

llvm-svn: 241959
2015-07-10 22:51:20 +00:00
Alex Lorenz
e7f6afffde MIR Serialization: Initial serialization of stack objects.
This commit implements the initial serialization of stack objects from the
MachineFrameInfo class. It can only serialize the ordinary stack objects
(including ordinary spill slots), but it doesn't serialize variable sized or
fixed stack objects yet.

The stack objects are serialized using a YAML sequence of YAML inline mappings.
Each mapping has the object's ID, type, size, offset and alignment. The stack
objects are a part of machine function's YAML mapping.

Reviewers: Duncan P. N. Exon Smith
llvm-svn: 241922
2015-07-10 18:13:57 +00:00
Alex Lorenz
5c443ee383 MIR Serialization: Serialize the virtual register definitions.
The virtual registers are serialized using a YAML sequence of YAML inline
mappings. Each mapping has the id of the virtual register and the register
class.

Reviewers: Duncan P. N. Exon Smith

Differential Revision: http://reviews.llvm.org/D10981

llvm-svn: 241868
2015-07-09 22:23:13 +00:00
Alex Lorenz
e56a7b90eb MIR Parser: Report an error when parsing machine function with an empty body.
This commit adds a new error which is reported when the MIR Parser encounters
a machine function without any machine basic blocks. The machine verifier
expects that the machine functions have at least one MBB, and this error will
prevent machine functions without MBBs from reaching the machine verifier and
crashing with an assertion.

llvm-svn: 241862
2015-07-09 21:21:33 +00:00
Alex Lorenz
60440f3a04 MIR Serialization: Serialize the simple MachineFrameInfo attributes.
This commit serializes the 13 scalar boolean and integer attributes from the
MachineFrameInfo class: IsFrameAddressTaken, IsReturnAddressTaken, HasStackMap,
HasPatchPoint, StackSize, OffsetAdjustment, MaxAlignment, AdjustsStack,
HasCalls, MaxCallFrameSize, HasOpaqueSPAdjustment, HasVAStart, and
HasMustTailInVarArgFunc. These attributes are serialized as part
of the frameInfo YAML mapping, which itself is a part of the machine function's
YAML mapping.

llvm-svn: 241844
2015-07-09 19:55:27 +00:00
Alex Lorenz
284c4b13e7 MIR Serialization: Serialize the 'undef' register machine operand flag.
llvm-svn: 241762
2015-07-08 23:58:31 +00:00
Alex Lorenz
980dc95b68 MIR Parser: Remove redundant TODO comment. NFC.
This TODO comment has been redundant since r240474.

llvm-svn: 241737
2015-07-08 21:30:21 +00:00
Alex Lorenz
1fa43c2c9d MIR Serialization: Serialize the 'killed' register machine operand flag.
llvm-svn: 241734
2015-07-08 21:23:34 +00:00
Alex Lorenz
8b999fafb7 MIR Parser: Use source locations for MBB naming errors.
This commit changes the type of the field 'Name' in the struct
'yaml::MachineBasicBlock' from 'std::string' to 'yaml::StringValue'. This change
allows the MIR parser to report errors related to the MBB name with the proper
source locations.

llvm-svn: 241718
2015-07-08 20:22:20 +00:00
Alex Lorenz
19382e1c52 MIR Serialization: Serialize the 'dead' register machine operand flag.
llvm-svn: 241624
2015-07-07 20:34:53 +00:00
Alex Lorenz
7cfc515325 MIR Parser: wrap 'MBBSlots' from the MI parsing functions in a struct. NFC.
This commit modifies the interface for the machine instruction parsing
functions by wrapping the parameter 'MBBSlots' in a new structure called
'PerFunctionMIParsingState'. This change is useful as in the future I will be
able to pass new parameters to the machine instruction parser just by modifying
the 'PerFunctionMIParsingState' structure instead of adding a new parameter to
each function.

llvm-svn: 241607
2015-07-07 17:46:43 +00:00
Alex Lorenz
813af3fadc MIR Parser: Verify the implicit machine register operands.
This commit verifies that the parsed machine instructions contain the implicit
register operands as specified by the MCInstrDesc. Variadic and call
instructions aren't verified.

Reviewers: Duncan P. N. Exon Smith

Differential Revision: http://reviews.llvm.org/D10781

llvm-svn: 241537
2015-07-07 02:08:46 +00:00
Alex Lorenz
583f921888 MIR Serialization: Serialize the implicit register flag.
This commit serializes the implicit flag for the register machine operands. It
introduces two new keywords into the machine instruction syntax: 'implicit' and
'implicit-def'. The 'implicit' keyword is used for the implicit register
operands, and the 'implicit-def' keyword is used for the register operands that
have both the implicit and the define flags set.

Reviewers: Duncan P. N. Exon Smith

Differential Revision: http://reviews.llvm.org/D10709

llvm-svn: 241519
2015-07-06 23:07:26 +00:00
Alex Lorenz
f829ecf101 MIR Serialization: Serialize MBB successors.
This commit implements serialization of the machine basic block successors. It
uses a YAML flow sequence that contains strings that have the MBB references.
The MBB references in those strings use the same syntax as the MBB machine
operands in the machine instruction strings.

Reviewers: Duncan P. N. Exon Smith

Differential Revision: http://reviews.llvm.org/D10699

llvm-svn: 241093
2015-06-30 18:16:42 +00:00
Alex Lorenz
5af8b38eb3 MIR Parser: refactor error reporting for machine instruction parser errors. NFC.
This commit extracts the code that reports an error that's produced by the
machine instruction parser into a new method that can be reused in other places.

llvm-svn: 241086
2015-06-30 17:55:00 +00:00
Alex Lorenz
2d8df4c672 MIR Parser: make the machine instruction parsing interface more consistent. NFC.
This commit refactors the interface for machine instruction parser. It adopts
the pattern of returning a bool and passing in the result in the first argument
that is used by the other parsing methods for the the method 'parse' and the
function 'parseMachineInstr'.

llvm-svn: 241085
2015-06-30 17:47:50 +00:00
Alex Lorenz
1f59108d5c MIR Parser: adopt the 'maybeLex...' pattern. NFC.
This commit refactors the machine instruction lexer so that the lexing
functions use the 'maybeLex...' pattern, where they determine if they
can lex the current token by themselves.

Reviewers: Sean Silva

Differential Revision: http://reviews.llvm.org/D10817

llvm-svn: 241078
2015-06-30 16:51:29 +00:00
Alex Lorenz
b12c23d4ef MIR Serialization: Serialize the register mask machine operands.
This commit implements serialization of the register mask machine
operands. This commit serializes only the call preserved register
masks that are defined by a target, it doesn't serialize arbitrary
register masks.

This commit also extends the TargetRegisterInfo class and TableGen so that
the users of TRI can get the list of all the call preserved register masks and
their names.

Reviewers: Duncan P. N. Exon Smith

Differential Revision: http://reviews.llvm.org/D10673

llvm-svn: 240966
2015-06-29 16:57:06 +00:00
Alex Lorenz
4a93dcb918 MIR Serialization: Serialize global address machine operands.
This commit serializes the global address machine operands.
This commit doesn't serialize the operand's offset and target
flags, it serializes only the global value reference.

Reviewers: Duncan P. N. Exon Smith

Differential Revision: http://reviews.llvm.org/D10671

llvm-svn: 240851
2015-06-26 22:56:48 +00:00