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Author SHA1 Message Date
Chris Lattner
341308dc6b Read the namespace field from register classes 
llvm-svn: 22918
 2005-08-19 18:45:20 +00:00
Chris Lattner
61526c0f6c The skeleton target has never had an isel 
llvm-svn: 22917
 2005-08-19 18:35:41 +00:00
Chris Lattner
f0b42a6f29 This code has always been dead on itanium 
llvm-svn: 22916
 2005-08-19 18:34:37 +00:00
Chris Lattner
b46e525e23 This code has always been dead for alpha 
llvm-svn: 22915
 2005-08-19 18:33:26 +00:00
Chris Lattner
e894de1791 The simple isel being gone makes this dead! 
llvm-svn: 22914
 2005-08-19 18:32:03 +00:00
Chris Lattner
f0e731ea49 Now that the simple isels are dead, so is this. 
llvm-svn: 22913
 2005-08-19 18:30:39 +00:00
Chris Lattner
bf7633b73b add a setName method to record 
llvm-svn: 22912
 2005-08-19 17:58:49 +00:00
Chris Lattner
1344e9cf9c Add a setName method to Record. 
llvm-svn: 22911
 2005-08-19 17:58:11 +00:00
Chris Lattner
36f99a1374 For now, just emit empty operand info structures. 
llvm-svn: 22910
 2005-08-19 16:57:28 +00:00
Chris Lattner
db827889e3 Sparcv9 gets no operand info 
llvm-svn: 22909
 2005-08-19 16:56:56 +00:00
Chris Lattner
6fcfaee2fc Add a new field to TargetInstrDescriptor for tracking information about 
operands.

llvm-svn: 22908
 2005-08-19 16:56:26 +00:00
Jeff Cohen
12674110d5 Fix VC++ constant truncation warning. 
llvm-svn: 22907
 2005-08-19 16:19:21 +00:00
Jeff Cohen
c6e28f4d38 Update Visual Studio projects for removed file. 
llvm-svn: 22905
 2005-08-19 13:51:22 +00:00
Duraid Madina
4efc0b6f2b a bugfix (up top) and a quick repair job: disable generation of dep.z 
(which died about a week ago) so we're back to load-(2^n-1)-then-AND
sequences. slow, but things should now be Almost Completely Working,
modulo those pesky alignment/ABI issues.

llvm-svn: 22904
 2005-08-19 13:25:50 +00:00
Chris Lattner
5ac318c67b Fix a problem jeffc noticed 
llvm-svn: 22903
 2005-08-19 06:16:04 +00:00
Jeff Cohen
f99748bc0f Fix VC++ precedence warning. 
llvm-svn: 22902
 2005-08-19 04:39:48 +00:00
Nate Begeman
88bfe8a7c3 Fix a bug where we were passing the wrong number of arguments to an 
instruction.

llvm-svn: 22901
 2005-08-19 03:42:28 +00:00
Chris Lattner
95a4e948da remove dead args 
llvm-svn: 22900
 2005-08-19 01:17:18 +00:00
Chris Lattner
3ddfd4fb7e remove dead options 
llvm-svn: 22899
 2005-08-19 01:16:18 +00:00
Chris Lattner
d00cbf7aa6 remove dead flags 
llvm-svn: 22898
 2005-08-19 01:14:40 +00:00
Chris Lattner
1685432a06 The code emitter generator only supports targets with 32-bit instruction 
words.  There is no way for one of these targets to have a > 32-bit immediate!

llvm-svn: 22897
 2005-08-19 01:04:33 +00:00
Chris Lattner
1207209677 Fix computation of # operands, add a temporary hack for CopyToReg 
llvm-svn: 22896
 2005-08-19 01:01:34 +00:00
Chris Lattner
7ab998463c now that all of the targets are clean w.r.t. the number of operands for each 
instruction defined, actually emit this to the InstrInfoDescriptor, which
allows an assert in the machineinstrbuilder to do some checking for us,
and is required by the dag->dag emitter

llvm-svn: 22895
 2005-08-19 00:59:49 +00:00
Nate Begeman
0966f7d0b9 Add support for target nodes with more than 3 operands, required by ppc 
llvm-svn: 22894
 2005-08-19 00:56:28 +00:00
Chris Lattner
5cfc567fb8 mark variable arity instructions as such. Alpha wins the battle for 
cleanest backend in this metric :)

llvm-svn: 22893
 2005-08-19 00:51:37 +00:00
Chris Lattner
5194ff37c4 Mark some instructions as variable_ops, and PSEUDO_ALLOC as taking a GPR. 
I'm not convinced this is all of them,  but I can't do much testing, because
IA64 LLC crashes on big programs :(

llvm-svn: 22892
 2005-08-19 00:47:42 +00:00
Chris Lattner
d7bd59d77e add a few missing cases 
llvm-svn: 22891
 2005-08-19 00:41:29 +00:00
Chris Lattner
f62a66a21c Give ADJCALLSTACKDOWN/UP the correct operands. 
Give a whole bunch of other stuff variable operands, particularly FP.  The
FP stackifier is playing fast and loose with operands here, so we have to
mark them all as variable.  This will have to be fixed before we can dag->dag
the X86 backend.  The solution is for the pre-stackifier and post-stackifier
instructions to all be disjoint.

llvm-svn: 22890
 2005-08-19 00:38:22 +00:00
Nate Begeman
1182e06dcf ISD::OR, and it's accompanying SelectBitfieldInsert 
llvm-svn: 22889
 2005-08-19 00:38:14 +00:00
Chris Lattner
abad70eaf8 The variable SAR's only take one operand too 
llvm-svn: 22888
 2005-08-19 00:31:37 +00:00
Chris Lattner
8ce7dd449a Stop adding bogus operands to variable shifts on X86. These instructions 
only take one operand.  The other comes implicitly in through CL.

llvm-svn: 22887
 2005-08-19 00:16:17 +00:00
Nate Begeman
a978ae8b7d Remove the X86 and PowerPC Simple instruction selectors; their time has 
passed.

llvm-svn: 22886
 2005-08-18 23:53:15 +00:00
Chris Lattner
d03fa09ce7 Figure out how many operands each instruction has, keep track of whether 
or not it's variable.

llvm-svn: 22885
 2005-08-18 23:38:41 +00:00
Nate Begeman
c1aeaed2b9 Add shifts. 
llvm-svn: 22884
 2005-08-18 23:38:00 +00:00
Chris Lattner
1d3d2fb435 Fix operand numbers by marking variable arity nodes as such and by fixing 
the operand lists of a few other nodes.

llvm-svn: 22883
 2005-08-18 23:25:33 +00:00
Chris Lattner
9b342804a8 MFLR doesn't take an operand, the LR register is implicit 
llvm-svn: 22882
 2005-08-18 23:24:50 +00:00
Chris Lattner
32120e461e Add a new flag 
llvm-svn: 22881
 2005-08-18 23:17:07 +00:00
Chris Lattner
1f718aa8b5 revert this change, which causes breakage, temporarily 
llvm-svn: 22880
 2005-08-18 22:12:31 +00:00
Chris Lattner
b312f4d374 When emitting implicit use/def lists, only emit each unique list once. Though 
LLVM is able to merge identical static const globals, GCC isn't, and this caused
some bloat in the generated data.  This has a marginal effect on PPC, shrinking
the implicit sets from 10->4, but shrinks X86 from 179 to 23, a much bigger
reduction.

This should speed up the register allocator as well by reducing the dcache
footprint for this static data.

llvm-svn: 22879
 2005-08-18 21:36:47 +00:00
Chris Lattner
7b9f02525e add a new -view-sched-dags option to view dags as they are sent to the scheduler. 
llvm-svn: 22878
 2005-08-18 20:11:49 +00:00
Chris Lattner
2147daa960 Move this to the emitter 
llvm-svn: 22877
 2005-08-18 20:08:53 +00:00
Chris Lattner
62bc771af7 Implement the first chunk of a code emitter. This is sophisticated enough to 
codegen:

_empty:
.LBB_empty_0:   ;
        blr

but can't do anything more (yet). :)

llvm-svn: 22876
 2005-08-18 20:07:59 +00:00
Jim Laskey
0022ebabdf Unmangled names. 
llvm-svn: 22875
 2005-08-18 20:06:09 +00:00
Chris Lattner
b7176ee776 Add ScheduleDAG.cpp to the project 
llvm-svn: 22874
 2005-08-18 19:52:06 +00:00
Chris Lattner
d3814ff064 Fill in the numOperands field of the TargetInstrDescriptor struct from the 
.td file.

llvm-svn: 22873
 2005-08-18 19:45:37 +00:00
Jim Laskey
0e5b5a3433 1. Fix comment. 
2. Get an exact count of 'li ' instructions.

llvm-svn: 22872
 2005-08-18 19:38:57 +00:00
Jim Laskey
4251791f33 Add regression test to make sure that constants are generated optimally. 
llvm-svn: 22871
 2005-08-18 19:32:46 +00:00
Jim Laskey
7399a3d644 More optimal solution for loading constants. 
llvm-svn: 22870
 2005-08-18 18:58:23 +00:00
Chris Lattner
a094a1279a After selecting the instructions for a basic block, emit the instructions 
llvm-svn: 22869
 2005-08-18 18:46:06 +00:00
Chris Lattner
ebb48e5877 new file, obviously just a stub 
llvm-svn: 22868
 2005-08-18 18:45:24 +00:00