Evan Cheng
234aab208a
RemoveBranch() and InsertBranch() now returns number of instructions deleted / inserted.
...
llvm-svn: 37192
2007-05-18 00:05:48 +00:00
Evan Cheng
3ce37e8d78
Fix comment.
...
llvm-svn: 37191
2007-05-18 00:00:30 +00:00
Evan Cheng
b4cc6606d5
Move isSuccessor() offline, change it to use std::find.
...
llvm-svn: 37190
2007-05-17 23:58:53 +00:00
Reid Spencer
a82bc57c04
Fix a problem with building .y files when BISON is not present.
...
Merged from the release_20 branch.
llvm-svn: 37188
2007-05-17 22:51:35 +00:00
Devang Patel
6e8f1aa332
Fix PR1431
...
Test case at Transformations/SCCP/2007-05-16-InvokeCrash.ll
llvm-svn: 37185
2007-05-17 22:10:15 +00:00
Devang Patel
8b21d8aa20
New test.
...
llvm-svn: 37184
2007-05-17 22:05:20 +00:00
Chris Lattner
c0709b5819
validation fixes
...
llvm-svn: 37183
2007-05-17 22:03:43 +00:00
Chris Lattner
0b086ea65a
llvm-gcc now supports almost all gcc extensions. The key missing one is
...
builtin_apply.
llvm-svn: 37182
2007-05-17 22:02:24 +00:00
Chris Lattner
966545b7fb
add a section about API changes.
...
llvm-svn: 37181
2007-05-17 21:41:31 +00:00
Dale Johannesen
f66c6b85f1
More effective breakdown of memcpy into repeated load/store. These are now
...
in the order lod;lod;lod;sto;sto;sto which means the load-store optimizer
has a better chance of producing ldm/stm. Ideally you would get cooperation
from the RA as well but this is not there yet.
llvm-svn: 37179
2007-05-17 21:31:21 +00:00
Dan Gohman
98860888df
Correct a name in a comment.
...
llvm-svn: 37178
2007-05-17 21:30:39 +00:00
Chris Lattner
c68a1721c2
silence some "comparison between signed and unsigned integer expressions"
...
warnings
llvm-svn: 37177
2007-05-17 20:01:40 +00:00
Chris Lattner
c963beca3b
minor tweak
...
llvm-svn: 37176
2007-05-17 19:58:57 +00:00
Reid Spencer
fe3fc94a44
Get rid of leading zeros in the output of toString.
...
llvm-svn: 37175
2007-05-17 19:23:02 +00:00
Evan Cheng
c741fd8106
New test case.
...
llvm-svn: 37174
2007-05-17 18:49:50 +00:00
Evan Cheng
1b4af5f975
Fix a bogus check that prevented folding VECTOR_SHUFFLE to UNDEF; add an optimization to fold VECTOR_SHUFFLE to a zero vector.
...
llvm-svn: 37173
2007-05-17 18:45:50 +00:00
Evan Cheng
9c4e69e6e5
Added missing patterns for UNPCKH* and PUNPCKH*.
...
llvm-svn: 37172
2007-05-17 18:44:37 +00:00
Dan Gohman
2340529c17
Fix some sporadic segfaults that are triggered when SmallVector's heap
...
storage lands near the end of the available address space. In the expression
Begin+N > Capacity, the Begin+N was overflowing. Fix this by replacing it
by with an expression that doesn't involve computation of an address
beyond the end of allocated memory.
llvm-svn: 37171
2007-05-17 18:29:01 +00:00
Chris Lattner
5f91019b13
add testcase for 128-bit add/sub
...
llvm-svn: 37170
2007-05-17 18:22:37 +00:00
Chris Lattner
910abfbfd1
disable MaskedValueIsZero, ComputeMaskedBits, and SimplifyDemandedBits for
...
i128 integers. The 64-bit masks are not wide enough to represent the results.
These should be converted to APInt someday.
llvm-svn: 37169
2007-05-17 18:19:23 +00:00
Chris Lattner
d441344214
add expand support for ADDC/SUBC/ADDE/SUBE so we can codegen 128-bit add/sub on 32-bit (or less) targets
...
llvm-svn: 37168
2007-05-17 18:15:41 +00:00
Reid Spencer
1bb031d76d
Regenerate.
...
llvm-svn: 37166
2007-05-17 18:11:03 +00:00
Reid Spencer
b55947eb2d
Make Perl a required dependency and cause configure script to fail if it
...
is not found.
llvm-svn: 37164
2007-05-17 18:06:19 +00:00
Chris Lattner
9a53871650
This is the correct fix for PR1427. This fixes mmx-shuffle.ll and doesn't
...
cause other regressions.
llvm-svn: 37160
2007-05-17 17:13:13 +00:00
Anton Korobeynikov
375cafc275
Revert patch for PR1427. It breaks almost all vector tests.
...
llvm-svn: 37159
2007-05-17 07:50:14 +00:00
Chris Lattner
a18b7d76b3
add support for 128-bit add/sub on ppc64
...
llvm-svn: 37158
2007-05-17 06:52:46 +00:00
Reid Spencer
e22c276c5c
Print integer values as both decimal and hexadecimal for convenience
...
of verifying result values when debugging.
llvm-svn: 37156
2007-05-17 06:47:54 +00:00
Chris Lattner
307a29e831
add support for 128-bit integer add/sub
...
llvm-svn: 37154
2007-05-17 06:35:11 +00:00
Reid Spencer
39e03f53ca
For lshr by 0 bits, just return *this as a short cut. This also prevents
...
undefined behavior when the width > 64 bits.
llvm-svn: 37153
2007-05-17 06:26:29 +00:00
Devang Patel
b81dd9fc45
New test.
...
llvm-svn: 37151
2007-05-17 06:22:12 +00:00
Chris Lattner
f65fe1d931
Fix PR1427 and test/CodeGen/X86/mmx-shuffle.ll
...
llvm-svn: 37141
2007-05-17 03:29:42 +00:00
Chris Lattner
4922cfb5b2
testcase for PR1427
...
llvm-svn: 37140
2007-05-17 03:29:17 +00:00
Evan Cheng
dc9e574073
Remove. Not needed.
...
llvm-svn: 37139
2007-05-17 00:11:35 +00:00
Evan Cheng
4fa2db30d9
Default implementation of TargetInstrInfo::getBlockSize().
...
llvm-svn: 37138
2007-05-16 23:53:44 +00:00
Evan Cheng
3163b77d5e
Add target hook to specify block size limit for if-conversion.
...
llvm-svn: 37134
2007-05-16 23:45:53 +00:00
Tanya Lattner
2fea483052
Merged in both release announcement guts.
...
llvm-svn: 37131
2007-05-16 23:25:46 +00:00
Dale Johannesen
cc99a6fc32
Don't fold bitconvert(load) for preinc/postdec loads. Likewise stores.
...
llvm-svn: 37130
2007-05-16 22:45:30 +00:00
Evan Cheng
ab88e91c81
isBlockPredicable() always ignore terminal instructions; add comments.
...
llvm-svn: 37126
2007-05-16 21:54:37 +00:00
Evan Cheng
b09bf9914f
ARM::tB is also predicable.
...
llvm-svn: 37125
2007-05-16 21:53:43 +00:00
Evan Cheng
973f4a19cb
PredicateInstruction returns true if the operation was successful.
...
llvm-svn: 37124
2007-05-16 21:53:07 +00:00
Evan Cheng
30f3168b7b
Add default implementation of PredicateInstruction().
...
llvm-svn: 37123
2007-05-16 21:20:37 +00:00
Evan Cheng
6f761adecb
Rename M_PREDICATED to M_PREDICABLE; Moved isPredicable() to MachineInstr.
...
llvm-svn: 37121
2007-05-16 20:56:08 +00:00
Evan Cheng
48f230dcb0
Move if-conversion after all passes that may use register scavenger.
...
llvm-svn: 37120
2007-05-16 20:52:46 +00:00
Evan Cheng
f7a017dfa7
Removed isPredicable().
...
llvm-svn: 37119
2007-05-16 20:50:23 +00:00
Evan Cheng
d3f1a259db
Make ARM::B isPredicable; Make Bcc and MOVCC condition option a normal operand so they are not predicable.
...
llvm-svn: 37118
2007-05-16 20:50:01 +00:00
Evan Cheng
0aced52f41
Added isPredicable bit to class Instruction.
...
llvm-svn: 37117
2007-05-16 20:47:01 +00:00
Evan Cheng
ecb8e3dc44
Rename M_PREDICATED to M_PREDICABLE; opcode can be specified isPredicable without having a PredicateOperand.
...
llvm-svn: 37116
2007-05-16 20:45:24 +00:00
Evan Cheng
3b10540b5e
Rename M_PREDICATED to M_PREDICABLE; Move TargetInstrInfo::isPredicatable() to MachineInstr::isPredicable().
...
llvm-svn: 37115
2007-05-16 20:43:42 +00:00
Reid Spencer
1ec1e07949
Fix a bug in the "fromString" method where radix 2,8 and 16 values were
...
not being generated correctly because the shl operator does not mutate its
object but returns a new value. Also, make the distinction between radix
16 and the others more clear.
llvm-svn: 37111
2007-05-16 19:18:22 +00:00
Reid Spencer
65e79ac699
Update for arbitrary precision integer types.
...
llvm-svn: 37109
2007-05-16 18:44:01 +00:00