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30,068 Commits 4 Branches 5 Tags 704 MiB
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Commit Graph

321 Commits

Author SHA1 Message Date
Jim Laskey
41b3ee3c4f Had expand logic backward. 
llvm-svn: 25105
 2006-01-05 01:47:43 +00:00
Jim Laskey
5eddaee9f3 Added initial support for DEBUG_LABEL allowing debug specific labels to be 
inserted in the code.

llvm-svn: 25104
 2006-01-05 01:25:28 +00:00
Evan Cheng
2329411038 DAG based isel call support. 
llvm-svn: 25103
 2006-01-05 00:27:02 +00:00
Chris Lattner
cee6093ca8 Fix a problem duraid pointed out to me compiling kc++ with -enable-x86-fastcc 
llvm-svn: 25024
 2005-12-27 03:02:18 +00:00
Evan Cheng
995503fc91 More X86 floating point patterns. 
llvm-svn: 24990
 2005-12-23 07:31:11 +00:00
Chris Lattner
8e80a247ff make sure bit_convert's are expanded 
llvm-svn: 24979
 2005-12-23 05:15:23 +00:00
Evan Cheng
fb6413e05a * Fix a GlobalAddress lowering bug. 
* Teach DAG combiner about X86ISD::SETCC by adding a TargetLowering hook.

llvm-svn: 24921
 2005-12-21 23:05:39 +00:00
Jim Laskey
d82881490c Disengage DEBUG_LOC from non-PPC targets. 
llvm-svn: 24919
 2005-12-21 20:51:37 +00:00
Evan Cheng
6f15189a77 * Added support for X86 RET with an additional operand to specify number of 
bytes to pop off stack.
* Added support for X86 SETCC.

llvm-svn: 24917
 2005-12-21 20:21:51 +00:00
Evan Cheng
0226113ed5 * Added lowering hook for external weak global address. It inserts a load 
for Darwin.
* Added lowering hook for ISD::RET. It inserts CopyToRegs for the return
  value (or store / fld / copy to ST(0) for floating point value). This
  eliminate the need to write C++ code to handle RET with variable number
  of operands.

llvm-svn: 24888
 2005-12-21 02:39:21 +00:00
Evan Cheng
44e4e6a57f Added a hook to print out names of target specific DAG nodes. 
llvm-svn: 24877
 2005-12-20 06:22:03 +00:00
Evan Cheng
bb34a50cb0 X86 conditional branch support. 
llvm-svn: 24870
 2005-12-19 23:12:38 +00:00
Evan Cheng
a3ff796fda Remove a few lines of dead code. 
llvm-svn: 24768
 2005-12-17 07:18:44 +00:00
Evan Cheng
d51da93a03 X86 lowers SELECT to a cmp / test followed by a conditional move. 
llvm-svn: 24754
 2005-12-17 01:21:05 +00:00
Evan Cheng
43152cb8b6 * Promote all 1 bit entities to 8 bit. 
* Handling extload (1 bit -> 8 bit) and remove C++ code that handle 1 bit
zextload.

llvm-svn: 24726
 2005-12-15 19:49:23 +00:00
Chris Lattner
5df0bce13a X86 doesn't support sextinreg for 8-bit things either. 
llvm-svn: 24631
 2005-12-07 17:59:14 +00:00
Chris Lattner
47feb1ecbb No targets support line number info yet. 
llvm-svn: 24513
 2005-11-29 06:16:21 +00:00
Chris Lattner
d122fc01dd Lower READCYCLECOUNTER correctly, preserving the chain result 
llvm-svn: 24438
 2005-11-20 22:57:19 +00:00
Chris Lattner
f4f66fafd9 use chain operands to ensure the copies don't wander from the rdtsc instruction. 
llvm-svn: 24434
 2005-11-20 22:01:40 +00:00
Andrew Lenharth
a369904fc5 The second patch of X86 support for read cycle counter. 
llvm-svn: 24430
 2005-11-20 21:41:10 +00:00
Chris Lattner
792ac11aee Separate X86ISelLowering stuff out from the X86ISelPattern.cpp file. Patch 
contributed by Evan Cheng.

llvm-svn: 24358
 2005-11-15 00:40:23 +00:00