RPCS3/llvm-mirror
1
0
Fork 0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-10-26 06:22:56 +02:00
Code Issues Projects Releases Wiki Activity
64,907 Commits 4 Branches 5 Tags 704 MiB
11b219e461
Commit Graph

64907 Commits

This Branch
This Branch
All Branches
Author SHA1 Message Date
Chris Lattner
2edbad8a3d convert targets to the new MF.getMachineMemOperand interface. 
llvm-svn: 114391
 2010-09-21 04:39:43 +00:00
Chris Lattner
940c35a3c3 start pushing MachinePointerInfo out through the MachineMemOperand interface 
to the MachineFunction construction methods.

llvm-svn: 114390
 2010-09-21 04:32:08 +00:00
Chris Lattner
7fdf193383 refactor the Value*/offset pair from MachineMemOperand out to a new 
MachinePointerInfo struct, no functionality change.

This also adds an assert to MachineMemOperand::MachineMemOperand
that verifies that the Value* is either null or is an IR pointer type.

llvm-svn: 114389
 2010-09-21 04:23:39 +00:00
Chris Lattner
547aed434e random cruft in my tree. 
llvm-svn: 114387
 2010-09-21 04:03:39 +00:00
Chris Lattner
ecdba24738 fix rdar://8453210, a crash handling a call through a GS relative load. 
For now, just disable folding the load into the call.

llvm-svn: 114386
 2010-09-21 03:37:00 +00:00
Rafael Espindola
93f3fb8aca Revert unrelated change that was accidentally included in the previous commit. 
llvm-svn: 114383
 2010-09-21 00:40:19 +00:00
Rafael Espindola
02af3cdd58 Implement support for .local and its "interesting" interactions with .comm. 
llvm-svn: 114382
 2010-09-21 00:24:38 +00:00
Evan Cheng
1ce02d180e Enable machine sinking critical edge splitting. e.g. 
define double @foo(double %x, double %y, i1 %c) nounwind {
  %a = fdiv double %x, 3.2
  %z = select i1 %c, double %a, double %y
  ret double %z
}

Was:
_foo:
        divsd   LCPI0_0(%rip), %xmm0
        testb   $1, %dil
        jne     LBB0_2
        movaps  %xmm1, %xmm0
LBB0_2:
        ret

Now:
_foo:
        testb   $1, %dil
        je      LBB0_2
        divsd   LCPI0_0(%rip), %xmm0
        ret
LBB0_2:
        movaps  %xmm1, %xmm0
        ret

This avoids the divsd when early exit is taken.
rdar://8454886

llvm-svn: 114372
 2010-09-20 22:52:00 +00:00
Dan Gohman
6eb9263898 Relax this check to silently swallow FE_INEXACT, following directions 
from rdar://8452472. This unbreaks gcc.dg/builtins-17.c.

llvm-svn: 114368
 2010-09-20 22:32:25 +00:00
Owen Anderson
b8811b9ed9 CombinerAA is now reordering these stores. 
llvm-svn: 114354
 2010-09-20 20:56:29 +00:00
Owen Anderson
fc94b337eb When TCO is turned on, it is possible to end up with aliasing FrameIndex's. Therefore, 
CombinerAA cannot assume that different FrameIndex's never alias, but can instead use
MachineFrameInfo to get the actual offsets of these slots and check for actual aliasing.

This fixes CodeGen/X86/2010-02-19-TailCallRetAddrBug.ll and CodeGen/X86/tailcallstack64.ll
when CombinerAA is enabled, modulo a different register allocation sequence.

llvm-svn: 114348
 2010-09-20 20:39:59 +00:00
Jim Grosbach
cf90f8beb1 Simplify ARM callee-saved register handling by removing the distinction 
between the high and low registers for prologue/epilogue code. This was
a Darwin-only thing that wasn't providing a realistic benefit anymore.
Combining the save areas simplifies the compiler code and results in better
ARM/Thumb2 codegen.

For example, previously we would generate code like:
        push    {r4, r5, r6, r7, lr}
        add     r7, sp, #12
        stmdb   sp!, {r8, r10, r11}
With this change, we combine the register saves and generate:
        push    {r4, r5, r6, r7, r8, r10, r11, lr}
        add     r7, sp, #12

rdar://8445635

llvm-svn: 114340
 2010-09-20 19:32:20 +00:00
Rafael Espindola
78fc1f7f66 Produce a R_X86_64_32 when the value is >=0. 
llvm-svn: 114339
 2010-09-20 19:20:47 +00:00
Evan Cheng
1c7f72d0bc Avoid splitting critical edge twice for a set of PHI uses. 
llvm-svn: 114338
 2010-09-20 19:12:55 +00:00
Francois Pichet
53617de15e Fix the "unable to rename temporary" lit test failing on Windows. rename is now copy + delete on Windows. Problem to be revisited for a permanent and clean solution. 
llvm-svn: 114320
 2010-09-20 04:03:07 +00:00
Chris Lattner
aaae01e0d2 fix a bug I introduced back in the hayday of version #2. 
llvm-svn: 114319
 2010-09-20 03:58:32 +00:00
NAKAMURA Takumi
a8d8b5f3c3 test/CodeGen/X86: Add explicit triplet -mtriple=i686-linux to 3 tests incompatible to Win32 codegen. 
r114297 raises 3 failures. They might fail also on mingw.

llvm-svn: 114317
 2010-09-19 21:58:55 +00:00
Owen Anderson
9594834ec1 Revert r114312 while I sort out some issues. 
llvm-svn: 114313
 2010-09-19 21:01:26 +00:00
Owen Anderson
65f23dcf7e Tentatively enabled DAGCombiner Alias Analysis by default. As far as I know, 
r114268 fixed the last of the blockers to enabling it.  I will be monitoring
for failures.

llvm-svn: 114312
 2010-09-19 19:51:55 +00:00
Jakob Stoklund Olesen
8ae6803659 Add one more Core i7 model number. 
llvm-svn: 114310
 2010-09-19 17:54:28 +00:00
Misha Brukman
b7d800dd67 Using regexp-opt for keyword regex declarations makes the word lists more 
readable and easier to edit.

llvm-svn: 114308
 2010-09-19 03:44:22 +00:00
Chris Lattner
3203bf3688 idiom recognition should catch this. 
llvm-svn: 114304
 2010-09-19 00:37:34 +00:00
Chris Lattner
ac0afb0fbe add a readme. 
llvm-svn: 114303
 2010-09-19 00:34:58 +00:00
Chris Lattner
4e80799dbb add corei7, the laptop version. 
llvm-svn: 114302
 2010-09-19 00:31:58 +00:00
NAKAMURA Takumi
a4a0276d4f X86Subtarget.h: Fix Cygwin's TD. 
llvm-svn: 114297
 2010-09-18 19:50:42 +00:00
Eric Christopher
2901b19344 Add the exit instruction to the PTX target. 
Patch by Che-Liang Chiou <clchiou@gmail.com>!

llvm-svn: 114294
 2010-09-18 18:52:28 +00:00
Eric Christopher
8b626a2da9 Handle the odd case where we only have one instruction. 
llvm-svn: 114293
 2010-09-18 18:50:27 +00:00
Michael J. Spencer
3a9b3aae55 Fix build. 
llvm-svn: 114292
 2010-09-18 17:54:37 +00:00
Rafael Espindola
9c3a9bf8aa Make sure the STT_FILE symbol is the first one in the symbol table. 
llvm-svn: 114285
 2010-09-18 15:03:21 +00:00
Benjamin Kramer
89a330c4b9 Unbreak msvc build. 
llvm-svn: 114284
 2010-09-18 14:41:26 +00:00
Gabor Greif
25989ff0b4 restrict dyn_cast_or_null to pointer types, just like cast_or_null; re-commit of r114279, backed out in r114280 
llvm-svn: 114282
 2010-09-18 13:03:32 +00:00
Gabor Greif
01fd81d9e0 back out r114279 as some darwin buildbots get errors compiling clang: 
svn merge -c -114279 llvm/include/llvm/Support/Casting.h

llvm-svn: 114280
 2010-09-18 12:56:47 +00:00
Gabor Greif
de7f1d3c08 restrict dyn_cast_or_null to pointer types, just like cast_or_null 
llvm-svn: 114279
 2010-09-18 12:30:15 +00:00
Gabor Greif
dd1c709af4 do not rely on the implicit-dereference semantics of dyn_cast_or_null 
llvm-svn: 114278
 2010-09-18 11:55:34 +00:00
Gabor Greif
5348c51fbe do not rely on the implicit-dereference semantics of dyn_cast_or_null 
llvm-svn: 114277
 2010-09-18 11:53:39 +00:00
Gabor Greif
356c676d76 remove CallSite::get; it is still present (as protected) in the baseclass, use one of the constructors intead 
llvm-svn: 114275
 2010-09-18 11:48:36 +00:00
Lang Hames
2d87a43549 Fixed non-const iterator error. 
llvm-svn: 114273
 2010-09-18 09:49:08 +00:00
Lang Hames
4a8c999803 Added a separate class (PBQPBuilder) for PBQP Problem construction. This class can be extended to support custom constraints. 
For now the allocator still uses the old (internal) construction mechanism by default. This will be phased out soon assuming 
no issues with the builder system come up.

To invoke the new construction mechanism just pass '-regalloc=pbqp -pbqp-builder' to llc. To provide custom constraints a
Target just needs to extend PBQPBuilder and pass an instance of their derived builder to the RegAllocPBQP constructor.

llvm-svn: 114272
 2010-09-18 09:07:10 +00:00
Michael J. Spencer
37c9ae6c7f docs: Tweak wording. 
llvm-svn: 114271
 2010-09-18 08:32:32 +00:00
Evan Cheng
442cb9c620 Fix code that break critical edges for PHI uses. Watch out for multiple PHIs in different blocks. 
llvm-svn: 114270
 2010-09-18 06:42:17 +00:00
Owen Anderson
015641f659 Invert the logic of reachesChainWithoutSideEffects(). What we want to check is that there is 
NO path to the destination containing side effects, not that SOME path contains no side effects.
In  practice, this only manifests with CombinerAA enabled, because otherwise the chain has little
to no branching, so "any" is effectively equivalent to "all".

llvm-svn: 114268
 2010-09-18 04:45:14 +00:00
Eric Christopher
0c5e912e21 Thumb opcodes for thumb calls. 
llvm-svn: 114263
 2010-09-18 02:32:38 +00:00
Daniel Dunbar
3555832020 lit: Bump version to 0.2.0dev, for no apparent reason. 
llvm-svn: 114262
 2010-09-18 02:28:15 +00:00
Daniel Dunbar
9bf57694be lit: Tweak setup.py. 
llvm-svn: 114261
 2010-09-18 02:28:12 +00:00
Daniel Dunbar
98afc51d08 lit: These TODOs are done(ish). 
llvm-svn: 114260
 2010-09-18 02:28:09 +00:00
Eric Christopher
c9fef312c8 Add addrmode5 fp load support. Swap float/thumb operand adding to handle 
thumb with floating point.

llvm-svn: 114256
 2010-09-18 01:59:37 +00:00
Eric Christopher
b6ce0ab878 Floating point stores have a 3rd addressing mode type. 
llvm-svn: 114254
 2010-09-18 01:23:38 +00:00
Rafael Espindola
32e423fe2b Add test that was missing in my previous commit. 
llvm-svn: 114248
 2010-09-18 00:37:27 +00:00
Jim Grosbach
c909422ee9 factor out a simple helper function to create a label for PC-relative 
instructions (PICADD, PICLDR, et.al.)

llvm-svn: 114243
 2010-09-18 00:05:05 +00:00
Jim Grosbach
a19f7799fb PC-relative pseudo instructions are lowered and printed directly. Any encounter 
with one in the generic printing code is an error.

llvm-svn: 114242
 2010-09-18 00:04:53 +00:00