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Commit Graph

36887 Commits

Author SHA1 Message Date
Rafael Espindola
11d3302464 Delete AArch64II::MO_CONSTPOOL.
A constant pool holding the address of a variable in equivalent to
a got entry. It produces exactly the same instruction sequence as a
got use and unlike a got use this is not uniqued by the linker.

llvm-svn: 271311
2016-05-31 18:31:14 +00:00
Simon Dardis
8d2c8c8209 [mips] Remove tests which should have been deleted.
The two xfail tests for mis32r6 & mips64r6 were supposed
to be removed in r271301.

llvm-svn: 271306
2016-05-31 17:52:29 +00:00
Simon Dardis
fb52d15569 [mips] Enforce compact branch register restrictions
Enforce compact branch register restrictions such as the use of the zero
register, both operands being the same register. Emit clear error in such
cases as the issue is subtle.

For bovc and bnvc, silently fixup such cases when emitting objects directly,
like LLVM started doing in rL269899.

Reviewers: vkalintiris, dsanders

Differential Review: http://reviews.llvm.org/D20475

llvm-svn: 271301
2016-05-31 17:34:42 +00:00
Chris Bieneman
8ed7724342 [obj2yaml][yaml2obj] Support for reading and dumping the MachO export trie
The MachO export trie is a serially encoded trie keyed by symbol name. This code parses the trie and preserves the structure so that it can be dumped again.

llvm-svn: 271300
2016-05-31 17:26:36 +00:00
Erik Eckstein
53b2b8eb9b Fix a crash in MergeFunctions related to ordering of weak/strong functions
The assumption, made in insert() that weak functions are always inserted after strong functions,
is only true in the first round of adding functions.
In subsequent rounds this is no longer guaranteed , because we might remove a strong function from the tree (because it's modified) and add it later,
where an equivalent weak function already exists in the tree.
This change removes the assert in insert() and explicitly enforces a weak->strong order.
This also removes the need of two separate loops in runOnModule().

llvm-svn: 271299
2016-05-31 17:20:23 +00:00
Qin Zhao
0b8d7db8e4 [esan|cfrag] Create the skeleton of cfrag variable for the runtime
Summary:
Creates a global variable containing preliminary information
for the cache-fragmentation tool runtime.

Passes a pointer to the variable (null if no variable is created) to the
compilation unit init and exit routines in the runtime.

Reviewers: aizatsky, bruening

Subscribers: filcab, kubabrecka, bruening, kcc, vitalybuka, eugenis, llvm-commits, zhaoqin

Differential Revision: http://reviews.llvm.org/D20541

llvm-svn: 271298
2016-05-31 17:14:02 +00:00
Rafael Espindola
95d3b4d586 Add a use of shouldAssumeDSOLocal to ARM.
Now this code path knows about position independent executables.

llvm-svn: 271290
2016-05-31 15:31:55 +00:00
Ranjeet Singh
2e252abc9e [ARM] Add backend support for load/store intrinsics.
Added support to map intrinsics
__builtin_arm_{ldc,ldcl,ldc2,ldc2l,stc,stcl,stc2,stc2l}
to their ARM instructions.

Differential Revision: http://reviews.llvm.org/D20564

llvm-svn: 271271
2016-05-31 12:39:30 +00:00
Simon Pilgrim
29a89e51e6 [X86][SSE] Add load-folding patterns for (V)CVTDQ2PD (PR27291)
Added patterns for (V)CVTDQ2PD -> 2f64 loading from a 64-bit source.

llvm-svn: 271269
2016-05-31 12:04:35 +00:00
Simon Dardis
573359788f [mips] bnec/beqc register constraint fix
beqc and bnec cannot have $rs == $rt. Inhibit compact branch creation
if that would occur.

Reviewers: vkalintiris, dsanders

Differential Revision: http://reviews.llvm.org/D20624

llvm-svn: 271260
2016-05-31 09:54:55 +00:00
Igor Breger
dab6232733 [AVX512] Fix intrinsic vcvtps2ph lowering.
Differential Revision: http://reviews.llvm.org/D20788

llvm-svn: 271255
2016-05-31 08:04:21 +00:00
Igor Breger
cc3e7d2dd1 Fix intrinsic vbroadcast{i32|f32}x2 lowering.
Differential Revision: http://reviews.llvm.org/D20780

llvm-svn: 271254
2016-05-31 07:43:39 +00:00
Craig Topper
cb79936a4b [AVX512] Remove masked store intrinsics. Clang now emits generic masked store intrinsics instead.
The intrinsics will be autoupgraded to the same generic masked stores.

llvm-svn: 271245
2016-05-31 01:50:02 +00:00
Saleem Abdulrasool
f85a029a33 X86: permit using SjLj EH on x86 targets as an option
This adds support to the backed to actually support SjLj EH as an exception
model.  This is *NOT* the default model, and requires explicitly opting into it
from the frontend.  GCC supports this model and for MinGW can still be enabled
via the `--using-sjlj-exceptions` options.

Addresses PR27749!

llvm-svn: 271244
2016-05-31 01:48:07 +00:00
Craig Topper
4f195e8edb [X86] Remove SSE/AVX unaligned store intrinsics as clang no longer uses them. Auto upgrade to native unaligned store instructions.
llvm-svn: 271236
2016-05-30 23:15:56 +00:00
Craig Topper
9d8b6d7b31 [X86] Use update_llc_test_checks.py to re-generate a test in preparation for an upcoming commit. NFC
llvm-svn: 271234
2016-05-30 22:54:14 +00:00
Rafael Espindola
f002876001 Fix a crash when producing COFF.
llvm-svn: 271229
2016-05-30 20:18:53 +00:00
Simon Pilgrim
9226b7680f [X86][XOP] Split off auto-upgraded xop intrinsics
llvm-svn: 271228
2016-05-30 19:50:56 +00:00
Simon Pilgrim
5e4ee0eb80 [X86][SSE] Renamed pmovxrm tests
These aren't intrinsics anymore - as discussed on D20686

llvm-svn: 271226
2016-05-30 19:14:37 +00:00
Simon Pilgrim
15ddf25bef [X86][AVX2] Regenerated AVX2 extension tests
llvm-svn: 271224
2016-05-30 18:49:57 +00:00
Simon Pilgrim
83a5e7cad9 [X86][SSE] Updated storeu fast-isel tests to match clang builtin tests
Since rL271214 the headers have no longer used the storeu intrinsic

llvm-svn: 271222
2016-05-30 18:42:51 +00:00
Simon Pilgrim
97b3734c4d [X86][SSE2] Updated _mm_store_pd1/_mm_store1_pd fast-isel tests to match D20617
llvm-svn: 271220
2016-05-30 18:18:44 +00:00
Diana Picus
178ddc2360 [BPF] Remove exit-on-error from tests (PR27768, PR27769)
The exit-on-error flag is necessary to avoid some assertions/unreachables. We
can get past them by creating a few dummy nodes.

Fixes PR27768, PR27769.

Differential Revision: http://reviews.llvm.org/D20726

llvm-svn: 271200
2016-05-30 08:28:34 +00:00
Craig Topper
242c5f7500 [X86] Remove some unnecessary declarations for old intrinsics from a test.
llvm-svn: 271175
2016-05-29 06:37:39 +00:00
Sanjoy Das
40738ba4e6 [IndVars] Eliminate op.with.overflow when possible (re-apply)
Summary:
If we can prove that an op.with.overflow intrinsic does not overflow, we
can get rid of the intrinsic, and replace it with non-wrapping
arithmetic.

This was first checked in at r265913 but reverted in r265950 because it
exposed some issues around how SCEV handled post-inc add recurrences.
Those issues have now been fixed.

Reviewers: atrick, regehr

Subscribers: sanjoy, mcrosier, llvm-commits

Differential Revision: http://reviews.llvm.org/D18685

llvm-svn: 271153
2016-05-29 00:36:25 +00:00
Sanjoy Das
5e3a215bf7 [SCEV] See through op.with.overflow intrinsics (re-apply)
Summary:
This change teaches SCEV to see reduce `(extractvalue
0 (op.with.overflow X Y))` into `op X Y` (with a no-wrap tag if
possible).

This was first checked in at r265912 but reverted in r265950 because it
exposed some issues around how SCEV handled post-inc add recurrences.
Those issues have now been fixed.

Reviewers: atrick, regehr

Subscribers: mcrosier, mzolotukhin, llvm-commits

Differential Revision: http://reviews.llvm.org/D18684

llvm-svn: 271152
2016-05-29 00:34:42 +00:00
Sanjoy Das
9baaae9344 [SCEV] Don't always add no-wrap flags to post-inc add recs
Fixes PR27315.

The post-inc version of an add recurrence needs to "follow the same
rules" as a normal add or subtract expression.  Otherwise we miscompile
programs like

```
int main() {
  int a = 0;
  unsigned a_u = 0;
  volatile long last_value;
  do {
    a_u += 3;
    last_value = (long) ((int) a_u);
    if (will_add_overflow(a, 3)) {
      // Leave, and don't actually do the increment, so no UB.
      printf("last_value = %ld\n", last_value);
      exit(0);
    }
    a += 3;
  } while (a != 46);
  return 0;
}
```

This patch changes SCEV to put no-wrap flags on post-inc add recurrences
only when the poison from a potential overflow will go ahead to cause
undefined behavior.

To avoid regressing performance too much, I've assumed infinite loops
without side effects is undefined behavior to prove poison<->UB
equivalence in more cases.  This isn't ideal, but is not new to LLVM as
a whole, and far better than the situation I'm trying to fix.

llvm-svn: 271151
2016-05-29 00:32:17 +00:00
Sanjoy Das
ad0baa641e [ValueTracking] ICmp instructions propagate poison
This is a stripped down version of D19211, leaving out the questionable
"branching in poison is UB" bit.

llvm-svn: 271150
2016-05-29 00:31:18 +00:00
David Majnemer
14b9271818 Update test to deal with non-zero exit codes
llvm-svn: 271135
2016-05-28 19:02:12 +00:00
Simon Pilgrim
6ec0f7efbc [X86][SSE] (Reapplied) Replace (V)PMOVSX and (V)PMOVZX integer extension intrinsics with generic IR (llvm)
This patch removes the llvm intrinsics VPMOVSX and (V)PMOVZX sign/zero extension intrinsics and auto-upgrades to SEXT/ZEXT calls instead. We already did this for SSE41 PMOVSX sometime ago so much of that implementation can be reused.

Reapplied now that the the companion patch (D20684) removes/auto-upgrade the clang intrinsics has been committed.

Differential Revision: http://reviews.llvm.org/D20686

llvm-svn: 271131
2016-05-28 18:03:41 +00:00
Mehdi Amini
12f0648f10 ValueMapper: fix assertion when null-mapping a constant for linking metadata
Summary:
When RF_NullMapMissingGlobalValues is set, mapValue can return null
for GlobalValue. When mapping the operands of a constant that is
referenced from metadata, we need to handle this case and actually
return null instead of mapping this constant.

Reviewers: dexonsmith, rafael

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D20713

llvm-svn: 271129
2016-05-28 17:26:03 +00:00
Sanjay Patel
2c70238f80 [InstCombine] add tests to show bitcast interference
llvm-svn: 271125
2016-05-28 16:10:37 +00:00
Rafael Espindola
ece382b0af Fix production of R_X86_64_GOTPCRELX/R_X86_64_REX_GOTPCRELX.
We were producing R_X86_64_GOTPCRELX for invalid instructions and
sometimes producing R_X86_64_GOTPCRELX instead of
R_X86_64_REX_GOTPCRELX.

llvm-svn: 271118
2016-05-28 15:51:38 +00:00
Sanjay Patel
a0cd62f38a regenerate checks
llvm-svn: 271117
2016-05-28 15:44:28 +00:00
Sanjay Patel
fe05838f17 join RUN lines; NFC
llvm-svn: 271115
2016-05-28 15:34:05 +00:00
Sanjay Patel
fc1048d379 [x86] avoid printing unnecessary sign bits of hex immediates in asm comments (PR20347)
It would be better to check the valid/expected size of the immediate operand, but this is
generally better than what we print right now.

Differential Revision: http://reviews.llvm.org/D20385

llvm-svn: 271114
2016-05-28 14:58:37 +00:00
Ahmed Bougacha
396b16d3af [X86] Try to zero elts when lowering 256-bit shuffle with PSHUFB.
Otherwise we fallback to a blend of PSHUFBs later on.

Differential Revision: http://reviews.llvm.org/D19661

llvm-svn: 271113
2016-05-28 14:38:04 +00:00
Rafael Espindola
e3a90de4ca Fix default reloc model on ARM.
llvm-svn: 271111
2016-05-28 10:41:15 +00:00
Petr Hosek
0178571895 [MC] Support symbolic expressions in assembly directives
This matches the behavior of GNU assembler which supports symbolic
expressions in absolute expressions used in assembly directives.

Differential Revision: http://reviews.llvm.org/D20752

llvm-svn: 271102
2016-05-28 05:57:48 +00:00
Renato Golin
46dd534f95 Revert "Revert "Map DynamicNoPIC to Static on non-darwin.""
This reverts commit r271096, as reverting it broke even more buildbots!

But that also means I'll break on ARM again... :(

llvm-svn: 271099
2016-05-28 04:47:13 +00:00
Renato Golin
df3d92e4b4 Revert "Map DynamicNoPIC to Static on non-darwin."
This reverts commit r271052, as it broke some ARM buildbots.

llvm-svn: 271096
2016-05-28 04:24:26 +00:00
Sean Silva
533f0584eb Bring back r271090 in a way that doesn't depend on r271089.
llvm-svn: 271092
2016-05-28 04:05:36 +00:00
Sean Silva
9ad95cf045 Revert r271089 and r271090.
It was triggering an msan bot.

Revert "[IRPGO] Set the function entry count metadata."

This reverts commit r271090.

Revert "[IRPGO] Centralize the function attribute inliner hint logic. NFC."

This reverts commit r271089.

llvm-svn: 271091
2016-05-28 03:56:25 +00:00
Sean Silva
ae67ec7d4d [IRPGO] Set the function entry count metadata.
llvm-svn: 271090
2016-05-28 03:02:54 +00:00
Matt Arsenault
24c4ef4e50 AMDGPU: Cleanup vector insert/extract tests
This mostly makes sure that 3-vector dynamic inserts
and extracts are covered.

llvm-svn: 271082
2016-05-28 00:51:06 +00:00
Matt Arsenault
f5367daffc AMDGPU: Add fract intrinsic
Remove broken patterns matching it. This was matching the
unsafe math pattern and expanding the fix for the buggy instruction
from the pattern. The problems are also on CI. Remove the workarounds
and only use fract with unsafe math or from the intrinsic.

llvm-svn: 271078
2016-05-28 00:19:52 +00:00
Xinliang David Li
447355f2eb Fix windows build bot failure
llvm-svn: 271075
2016-05-28 00:03:35 +00:00
Xinliang David Li
3c95a313ea [PM] Port the Sample FDO to new PM (part-2)
llvm-svn: 271072
2016-05-27 23:20:16 +00:00
Evgeny Stupachenko
8323ef30a7 The patch refactors unroll pass.
Summary:
Unroll factor (Count) calculations moved to a new function.
Early exits on pragma and "-unroll-count" defined factor added.
New type of unrolling "Force" introduced (previously used implicitly).
New unroll preference "AllowRemainder" introduced and set "true" by default.
(should be set to false for architectures that suffers from it).

Reviewers: hfinkel, mzolotukhin, zzheng

Differential Revision: http://reviews.llvm.org/D19553

From: Evgeny Stupachenko <evstupac@gmail.com>
llvm-svn: 271071
2016-05-27 23:15:06 +00:00
Andrew Kaylor
bb1fbe49cd Update the stack coloring pass to remove lifetime intrinsics in the optnone/opt-bisect skip case.
Differential Revision: http://reviews.llvm.org/D20453

llvm-svn: 271068
2016-05-27 22:56:49 +00:00