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Commit Graph

18 Commits

Author SHA1 Message Date
Duncan Sands
d1311488fe Add codegen support for vector select (in the IR this means a select
with a vector condition); such selects become VSELECT codegen nodes.
This patch also removes VSETCC codegen nodes, unifying them with SETCC
nodes (codegen was actually often using SETCC for vector SETCC already).
This ensures that various DAG combiner optimizations kick in for vector
comparisons.  Passes dragonegg bootstrap with no testsuite regressions
(nightly testsuite as well as "make check-all").  Patch mostly by
Nadav Rotem.

llvm-svn: 139159
2011-09-06 19:07:46 +00:00
Eric Christopher
67d2fdd4a8 Move the Blackfin port away from getRegClassForInlineAsmConstraint by
creating a few specific register classes.

Part of rdar://9643582

llvm-svn: 134086
2011-06-29 19:30:29 +00:00
Eli Friedman
12e590e760 Make the logic for determining function alignment more explicit. No functionality change.
llvm-svn: 131012
2011-05-06 20:34:06 +00:00
Owen Anderson
bd26993873 Allow targets to specify a the type of the RHS of a shift parameterized on the type of the LHS.
llvm-svn: 126518
2011-02-25 21:41:48 +00:00
John Thompson
6115a7f1d4 Inline asm multiple alternative constraints development phase 2 - improved basic logic, added initial platform support.
llvm-svn: 117667
2010-10-29 17:29:13 +00:00
Dan Gohman
c768525273 Split the SDValue out of OutputArg so that SelectionDAG-independent
code can do calling-convention queries. This obviates OutputArgReg.

llvm-svn: 107786
2010-07-07 15:54:55 +00:00
Dan Gohman
a0f855157e Use const qualifiers with TargetLowering. This eliminates several
const_casts, and it reinforces the design of the Target classes being
immutable.

SelectionDAGISel::IsLegalToFold is now a static member function, because
PIC16 uses it in an unconventional way. There is more room for API
cleanup here.

And PIC16's AsmPrinter no longer uses TargetLowering.

llvm-svn: 101635
2010-04-17 15:26:15 +00:00
Dan Gohman
5c8db5ab3f Move per-function state out of TargetLowering subclasses and into
MachineFunctionInfo subclasses.

llvm-svn: 101634
2010-04-17 14:41:14 +00:00
Evan Cheng
9057fea7ef Revert 95130.
llvm-svn: 95160
2010-02-02 23:55:14 +00:00
Evan Cheng
48375fbf4f Pass callsite return type to TargetLowering::LowerCall and use that to check sibcall eligibility.
llvm-svn: 95130
2010-02-02 21:29:10 +00:00
Evan Cheng
237629e476 Eliminate target hook IsEligibleForTailCallOptimization.
Target independent isel should always pass along the "tail call" property. Change
target hook LowerCall's parameter "isTailCall" into a refernce. If the target
decides it's impossible to honor the tail call request, it should set isTailCall
to false to make target independent isel happy.

llvm-svn: 94626
2010-01-27 00:07:07 +00:00
Sandeep Patel
9c4e094e2a Retype from unsigned to CallingConv::ID accordingly. Approved by Bob Wilson.
llvm-svn: 80773
2009-09-02 08:44:58 +00:00
Owen Anderson
48f2f0ae72 Split EVT into MVT and EVT, the former representing _just_ a primitive type, while
the latter is capable of representing either a primitive or an extended type.

llvm-svn: 78713
2009-08-11 20:47:22 +00:00
Owen Anderson
b4bce99769 Rename MVT to EVT, in preparation for splitting SimpleValueType out into its own struct type.
llvm-svn: 78610
2009-08-10 22:56:29 +00:00
Owen Anderson
dcb47bda67 Start moving TargetLowering away from using full MVTs and towards SimpleValueType, which will simplify the privatization of IntegerType in the future.
llvm-svn: 78584
2009-08-10 18:56:59 +00:00
Jakob Stoklund Olesen
ed8219b3a1 Add support for READCYCLECOUNTER in Blackfin back-end.
llvm-svn: 78506
2009-08-08 21:42:22 +00:00
Dan Gohman
5d566d918b Major calling convention code refactoring.
Instead of awkwardly encoding calling-convention information with ISD::CALL,
ISD::FORMAL_ARGUMENTS, ISD::RET, and ISD::ARG_FLAGS nodes, TargetLowering
provides three virtual functions for targets to override:
LowerFormalArguments, LowerCall, and LowerRet, which replace the custom
lowering done on the special nodes. They provide the same information, but
in a more immediately usable format.

This also reworks much of the target-independent tail call logic. The
decision of whether or not to perform a tail call is now cleanly split
between target-independent portions, and the target dependent portion
in IsEligibleForTailCallOptimization.

This also synchronizes all in-tree targets, to help enable future
refactoring and feature work.

llvm-svn: 78142
2009-08-05 01:29:28 +00:00
Jakob Stoklund Olesen
e7eb74ef39 Analog Devices Blackfin back-end.
Generate code for the Blackfin family of DSPs from Analog Devices:

  http://www.analog.com/en/embedded-processing-dsp/blackfin/processors/index.html
  
We aim to be compatible with the exsisting GNU toolchain found at:

  http://blackfin.uclinux.org/gf/project/toolchain
  
The back-end is experimental.

llvm-svn: 77897
2009-08-02 17:32:10 +00:00