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Author SHA1 Message Date
Evan Cheng
850c8739dc New test case. 
llvm-svn: 42963
 2007-10-14 10:15:03 +00:00
Evan Cheng
90645f30db Unbreak x86-64. 
llvm-svn: 42962
 2007-10-14 10:09:39 +00:00
Evan Cheng
62ee7cd439 When coalescing an EXTRACT_SUBREG and the dst register is a physical register, 
the source register will be coalesced to the super register of the LHS. Properly
merge in the live ranges of the resulting coalesced interval that were part of
the original source interval to the live interval of the super-register.

llvm-svn: 42961
 2007-10-14 10:08:34 +00:00
Evan Cheng
33df6a6bed Revert 42908 for now. 
llvm-svn: 42960
 2007-10-14 05:57:21 +00:00
Dale Johannesen
6c89945eb8 Fix type mismatch error in PPC Altivec (only causes 
a problem when asserts are on).  From vecLib.

llvm-svn: 42959
 2007-10-14 01:58:32 +00:00
Dale Johannesen
4cbce377c6 Disable some compile-time optimizations on PPC 
long double.

llvm-svn: 42958
 2007-10-14 01:56:47 +00:00
Gordon Henriksen
f38341e4a6 Fixing a typo. Found by Kevin André! 
llvm-svn: 42956
 2007-10-14 00:34:53 +00:00
Duncan Sands
bf31a19c62 Clarify that fastcc has a problem with nested function 
trampolines, rather than with nested functions themselves.

llvm-svn: 42955
 2007-10-13 07:38:37 +00:00
Chris Lattner
c146f449b5 Enhance the truncstore optimization code to handle shifted 
values and propagate demanded bits through them in simple cases.

This allows this code:
void foo(char *P) {
   strcpy(P, "abc");
}
to compile to:

_foo:
        ldrb r3, [r1]
        ldrb r2, [r1, #+1]
        ldrb r12, [r1, #+2]!
        ldrb r1, [r1, #+1]
        strb r1, [r0, #+3]
        strb r2, [r0, #+1]
        strb r12, [r0, #+2]
        strb r3, [r0]
        bx lr

instead of:

_foo:
        ldrb r3, [r1, #+3]
        ldrb r2, [r1, #+2]
        orr r3, r2, r3, lsl #8
        ldrb r2, [r1, #+1]
        ldrb r1, [r1]
        orr r2, r1, r2, lsl #8
        orr r3, r2, r3, lsl #16
        strb r3, [r0]
        mov r2, r3, lsr #24
        strb r2, [r0, #+3]
        mov r2, r3, lsr #16
        strb r2, [r0, #+2]
        mov r3, r3, lsr #8
        strb r3, [r0, #+1]
        bx lr

testcase here: test/CodeGen/ARM/truncstore-dag-combine.ll

This also helps occasionally for X86 and other cases not involving 
unaligned load/stores.

llvm-svn: 42954
 2007-10-13 06:58:48 +00:00
Chris Lattner
a7666b08ad new testcase 
llvm-svn: 42953
 2007-10-13 06:56:18 +00:00
Chris Lattner
133baf6012 Add a simple optimization to simplify the input to 
truncate and truncstore instructions, based on the 
knowledge that they don't demand the top bits.

llvm-svn: 42952
 2007-10-13 06:35:54 +00:00
Neil Booth
f3582ac0e0 If the power of 5 is exact, and the reciprocal exact, the error is zero not one half-ulps. This prevents an infinite loop in rare cases. 
llvm-svn: 42950
 2007-10-13 03:34:08 +00:00
Evan Cheng
f5ed18f7d3 Fix test case. 
llvm-svn: 42949
 2007-10-13 03:14:06 +00:00
Evan Cheng
6101e4ffdf New tests. 
llvm-svn: 42948
 2007-10-13 03:10:54 +00:00
Evan Cheng
b9ab88ccd5 Local spiller optimization: 
Turn this:
movswl  %ax, %eax
movl    %eax, -36(%ebp)
xorl    %edi, -36(%ebp)
into
movswl  %ax, %eax
xorl    %edi, %eax
movl    %eax, -36(%ebp)
by unfolding the load / store xorl into an xorl and a store when we know the
value in the spill slot is available in a register. This doesn't change the
number of instructions but reduce the number of times memory is accessed.

Also unfold some load folding instructions and reuse the value when similar
situation presents itself.

llvm-svn: 42947
 2007-10-13 02:50:24 +00:00
Evan Cheng
2e2d6358bc Change unfoldMemoryOperand(). User is now responsible for passing in the 
register used by the unfolded instructions. User can also specify whether to
unfold the load, the store, or both.

llvm-svn: 42946
 2007-10-13 02:35:06 +00:00
Evan Cheng
2262b2a792 Optionally create a MachineInstr without default implicit operands. 
llvm-svn: 42945
 2007-10-13 02:23:01 +00:00
Arnold Schwaighofer
50d2c33530 Correcting the corrections. Bad bad baaad emacs! 
llvm-svn: 42935
 2007-10-12 21:53:12 +00:00
Arnold Schwaighofer
6bcd9e7ec2 Corrected many typing errors. And removed 'nest' parameter handling 
for fastcc from X86CallingConv.td.  This means that nested functions
are not supported for calling convention 'fastcc'.

llvm-svn: 42934
 2007-10-12 21:30:57 +00:00
Dan Gohman
c96f2809ca Fix this test to not depend on the assembly output containing something 
that includes the string "st". This probably fixes the regression on
Darwin.

llvm-svn: 42932
 2007-10-12 20:42:14 +00:00
Devang Patel
f65c028dad Dest type is always i8 *. This allows some simplification. 
Do not filter memmove.

llvm-svn: 42930
 2007-10-12 20:10:21 +00:00
Gordon Henriksen
acf0aac0c1 Fix ocaml bindings for picky linkers. :) 
Thanks to Török Edvin for helping to track this down.

llvm-svn: 42927
 2007-10-12 19:48:13 +00:00
Duncan Sands
d781ed9d21 Due to the new tail call optimization, trampolines can no 
longer be created for fastcc functions.

llvm-svn: 42925
 2007-10-12 19:37:31 +00:00
Dale Johannesen
2f62d5da32 ppc long double. Implement fabs and fneg. 
llvm-svn: 42924
 2007-10-12 19:02:17 +00:00
Evan Cheng
c36fdf163a Update. 
llvm-svn: 42922
 2007-10-12 18:22:55 +00:00
Chris Lattner
18867ab274 don't use intptr_t without including it. 
llvm-svn: 42921
 2007-10-12 18:16:23 +00:00
Chris Lattner
3af877f26a Fix a bug in my patch last night that broke InstCombine/2007-10-12-Crash.ll 
llvm-svn: 42920
 2007-10-12 18:05:47 +00:00
Dale Johannesen
296cc4ca22 Implement i64->ppcf128 conversions. 
llvm-svn: 42919
 2007-10-12 17:52:03 +00:00
Chris Lattner
e80faf3036 Make this compute the correct offset, handling alignment of the element 
pointer correctly.

llvm-svn: 42918
 2007-10-12 17:49:52 +00:00
Evan Cheng
681a96d737 Did mean to leave this in. INSERT_SUBREG isn't being coalesced yet. 
llvm-svn: 42916
 2007-10-12 17:16:50 +00:00
Neil Booth
fb373da5fd Remove duplicate comment. 
llvm-svn: 42913
 2007-10-12 16:05:57 +00:00
Neil Booth
078f455d15 Implement correctly-rounded decimal->binary conversion, i.e. conversion 
from user input strings.

Such conversions are more intricate and subtle than they may appear;
it is unlikely I have got it completely right first time.  I would
appreciate being informed of any bugs and incorrect roundings you
might discover.

llvm-svn: 42912
 2007-10-12 16:02:31 +00:00
Neil Booth
4a0b91bebe Remove a field that was never used. 
llvm-svn: 42911
 2007-10-12 15:35:10 +00:00
Neil Booth
9b83d8be07 If we're trying to be arbitrary precision, unsigned char clearly won't cut it. Needed for dec->bin conversions. 
llvm-svn: 42910
 2007-10-12 15:33:27 +00:00
Neil Booth
39cc673e61 Don't attempt to mask no bits 
llvm-svn: 42909
 2007-10-12 15:31:31 +00:00
Dan Gohman
a75e4a62e6 Change the names used for internal labels to use the current 
function symbol name instead of a codegen-assigned function
number.

Thanks Evan! :-)

llvm-svn: 42908
 2007-10-12 14:53:36 +00:00
Dan Gohman
330b7915da Fix some corner cases with vectors in copyToRegs and copyFromRegs. 
llvm-svn: 42907
 2007-10-12 14:33:11 +00:00
Dan Gohman
b0b156e238 Add support to SplitVectorOp for powi, where the second operand 
is a scalar integer.

llvm-svn: 42906
 2007-10-12 14:13:46 +00:00
Dan Gohman
ad3e823efa Mark vector ctpop, cttz, and ctlz as Expand on x86. 
llvm-svn: 42905
 2007-10-12 14:09:42 +00:00
Dan Gohman
171fb68ae0 Mark vector pow, ctpop, cttz, and ctlz as Expand on PowerPC. 
llvm-svn: 42904
 2007-10-12 14:08:57 +00:00
Evan Cheng
9beb8daf9c Restrict EXTRACT_SUBREG coalescing to avoid negative performance impact. 
llvm-svn: 42903
 2007-10-12 09:15:53 +00:00
Evan Cheng
51791564b0 Doh. 
llvm-svn: 42901
 2007-10-12 09:10:27 +00:00
Evan Cheng
947b4a6c3d EXTRACT_SUBREG test case. 
llvm-svn: 42900
 2007-10-12 09:03:31 +00:00
Evan Cheng
d11cd4a095 EXTRACT_SUBREG coalescing support. The coalescer now treats EXTRACT_SUBREG like 
(almost) a register copy. However, it always coalesced to the register of the
RHS (the super-register). All uses of the result of a EXTRACT_SUBREG are sub-
register uses which adds subtle complications to load folding, spiller rewrite,
etc.

llvm-svn: 42899
 2007-10-12 08:50:34 +00:00
Evan Cheng
8af3000e93 Some clean up. 
llvm-svn: 42898
 2007-10-12 08:45:27 +00:00
Evan Cheng
bfc8d5c279 Cosmetic. 
llvm-svn: 42897
 2007-10-12 08:40:44 +00:00
Evan Cheng
a18e8dc542 Fix typos. 
llvm-svn: 42896
 2007-10-12 08:39:02 +00:00
Evan Cheng
c7b7a3cb74 Fold load / store into MOV32to32_ and MOV16to16_. 
llvm-svn: 42895
 2007-10-12 08:38:01 +00:00
Evan Cheng
f1ead16fd5 Flag MOV32to32_ with EXTRACT_SUBREG. They should not be scheduled apart. 
llvm-svn: 42894
 2007-10-12 07:55:53 +00:00
Arnold Schwaighofer
f1e49dd41d Added missing -march=x86 flag. 
llvm-svn: 42893
 2007-10-12 07:49:48 +00:00