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Commit Graph

13227 Commits

Author SHA1 Message Date
Galina Kistanova
16bd9972fb Changed condition.
llvm-svn: 132834
2011-06-10 03:57:02 +00:00
Chad Rosier
670af01484 Adding a test case for revision 132825.
llvm-svn: 132830
2011-06-10 02:44:19 +00:00
Eli Friedman
96581336e6 Add a simple test which makes sure folding immediate float zero to a memory operand works.
llvm-svn: 132824
2011-06-10 00:30:08 +00:00
Cameron Zwarich
af47f4a117 A CCState was being created without setting whether it is in the Call or Prologue state,
causing an assertion failure downstream. This fixes <rdar://problem/9562908>.

This really seems like it should always be set at CCState creation time, so mistakes like
this can never happen. I'll take a look at doing that.

llvm-svn: 132811
2011-06-09 22:30:07 +00:00
Eli Friedman
14c6ce9041 Change this DAGCombine to build AND of SHR instead of SHR of AND; this matches the ordering we prefer in instcombine. Part of rdar://9562809.
The potential DAGCombine which enforces this more generally messes up some other very fragile patterns, so I'm leaving that alone, at least for now.

llvm-svn: 132809
2011-06-09 22:14:44 +00:00
John McCall
806ec47668 SplitCriticalEdge can sometimes split the edge from an invoke to a landing
pad, separating the exception and selector calls from the new lpad.  Teaching
it not to do that, or to properly adjust the CFG afterwards, is out of
scope because it would require the other edges to the landing pad to be split
as well (effectively).  Instead, just recover from the most likely cases
during inlining.  The best long-term solution is to change the exception
representation and commit to either requiring or not requiring the more
complex edge-splitting logic;  this is just a shorter-term hack.

llvm-svn: 132799
2011-06-09 20:06:24 +00:00
Galina Kistanova
6f214c237a Added dg.exp to run FrontendC ARM-dependent tests; updated inline-asm-multichar.c test per this change.
llvm-svn: 132785
2011-06-09 17:18:37 +00:00
Eric Christopher
24dafa3dbc Speculatively revert 132758 and 132768 to try to fix the Windows buildbots.
llvm-svn: 132777
2011-06-09 16:03:19 +00:00
Eric Christopher
88088d9b8a Recommit r132764 since it didn't cause the windows buildbot failures.
llvm-svn: 132776
2011-06-09 15:39:01 +00:00
Eric Christopher
386e80f51e Temporarily revert 132764 to see if it fixes the Windows buildbot.
llvm-svn: 132771
2011-06-09 06:29:54 +00:00
Akira Hatanaka
33ec063f3b Initial support for inline asm memory operand constraints.
llvm-svn: 132768
2011-06-09 03:31:05 +00:00
Cameron Zwarich
72cd0d1b5b Fix PR10104 by adding a bounds check on a vector element access check. It was
assuming that all offsets are legal vector accesses, and thus trying to access
the float member of { <2 x float>, float } as the 3rd element of the first
member.

llvm-svn: 132766
2011-06-09 01:45:33 +00:00
Eric Christopher
65f7ea8a35 If the alignment of the byval argument is greater than the alignment
of the frame then increase the maximum alignment of the frame to
match.

Fixes PR6965

llvm-svn: 132764
2011-06-09 00:15:19 +00:00
Cameron Zwarich
68f8e98b8e Fix an assymmetry between ConvertScalar_ExtractValue and ConvertScalar_InsertValue. The
former was using the size of the entire alloca, whereas the latter was correctly using
the allocated size of the immediate type being converted (which may differ from the size
of the alloca). This fixes PR10082.

llvm-svn: 132759
2011-06-08 22:08:31 +00:00
Akira Hatanaka
38115eb019 Fix bug in lowering of DYNAMIC_STACKALLOC nodes. The correct offset of the
dynamically allocated stack area was not set.

llvm-svn: 132758
2011-06-08 21:28:09 +00:00
Cameron Zwarich
e7e6bc3a33 Fix an issue where the two-address conversion pass incorrectly rewrites untied
operands to an early clobber register. This fixes <rdar://problem/9566076>.

llvm-svn: 132738
2011-06-07 23:54:00 +00:00
Rafael Espindola
12efa298a0 Fix a silly error I introduce in r131951.
Fixes PR10095.

llvm-svn: 132735
2011-06-07 23:26:45 +00:00
Eric Christopher
dc8fe755e3 Create a new ARM directory for FrontendC tests and use it.
llvm-svn: 132734
2011-06-07 22:20:13 +00:00
Roman Divacky
478976c99b Test that ".byte 1, 2, 3, 4" does the right thing.
Requested by nbjoerg!

llvm-svn: 132716
2011-06-07 17:32:17 +00:00
Stuart Hastings
ddd47ea403 Tweak this test for ARM-hosted 'bot.
llvm-svn: 132711
2011-06-07 15:23:11 +00:00
Nadav Rotem
0f5e672008 Move the legalizer tests to the X86 directory because the test uses the x86
codegen. Thanks Galina.

llvm-svn: 132706
2011-06-07 05:23:58 +00:00
Akira Hatanaka
fbeb14925f Add test case for C++ exception handling and fix the following mistakes in MipsFrameLowering::emitPrologue:
- cfi directives are not inserted at the right location or in the right order.
- The source MachineLocation for the cfi directive that changes the cfa register
  to $fp should be MachineLocation::VirtualFP.
- A PROLOG_LABEL that marks the beginning of cfi_offset directives for
  callee-saved register is emitted even when no callee-saved registers are
  saved.
- When a callee-saved double precision register is saved, two cfi_offset
  directives, one for each of the paired single precision registers, should be
  emitted.
 
 

llvm-svn: 132703
2011-06-07 02:17:21 +00:00
Jakob Stoklund Olesen
cf00a6d764 Simplify local live range splitting's safeguard to fix PR10070.
When local live range splitting creates a live range with the same
number of instructions as the old range, mark it as RS_Local. When such
a range is seen again, require that it be split in a way that reduces
the number of instructions. That guarantees we are making progress while
still being able to perform 3 -> 2+3 splits as required by PR10070.

This also means that the PrevSlot map is no longer needed. This was also
used to estimate new spill weights, but that is no longer necessary
after slotIndexes::insertMachineInstrInMaps() got the extra Late
insertion argument.

llvm-svn: 132697
2011-06-06 23:55:20 +00:00
Stuart Hastings
d044ba7a9f Followup to 132458, omit unnecessary stack copy when x87 input is a
load.  rdar://problem/6373334

llvm-svn: 132696
2011-06-06 23:15:58 +00:00
Nadav Rotem
bfff2bd65a Add methods to support the integer-promotion of vector types. Methods to
legalize SDNodes such as BUILD_VECTOR, EXTRACT_VECTOR_ELT, etc.

llvm-svn: 132689
2011-06-06 20:55:56 +00:00
Nick Lewycky
3e968a27de This directory was missing the dg.exp to cause the tests to run. Some time since
it was added, the test has regressed, so XFAIL it.

llvm-svn: 132686
2011-06-06 20:23:00 +00:00
Stuart Hastings
ecfa8a1a74 Test case for PR10085.
llvm-svn: 132682
2011-06-06 20:03:22 +00:00
Eli Friedman
69da49c53a PR10077: fix fast-isel of extractvalue of aggregate constants.
llvm-svn: 132676
2011-06-06 05:46:34 +00:00
Benjamin Kramer
d15bc54757 Harden tests for windows path separators.
llvm-svn: 132671
2011-06-05 18:20:05 +00:00
Rafael Espindola
f500121fcf Basic support for macros with explicit arguments.
We still don't handle

* default values
* :req
* :vararg
* \()

llvm-svn: 132656
2011-06-05 02:43:45 +00:00
Jakob Stoklund Olesen
d513e33c69 Fix a test that keeps breaking when allocation orders change.
Who said FileCheck couldn't handle arbitrarily complex conditions?

llvm-svn: 132654
2011-06-04 23:34:40 +00:00
Nadav Rotem
5a64a09036 TypeLegalizer: Add support for passing of vector-promoted types in registers (copyFromParts/copyToParts).
llvm-svn: 132649
2011-06-04 20:58:08 +00:00
Nick Lewycky
36e7570fb3 Add support for @GOTPTOFF in i386 mode.
llvm-svn: 132643
2011-06-04 17:38:07 +00:00
Bill Wendling
1da5257929 If the block that we're threading through is jumped to by an indirect branch,
then we don't want to set the destination in the indirect branch to the
destination. This is because the indirect branch needs its destinations to have
had their block addresses taken. This isn't so of the new critical edge that's
split during this process. If it turns out that the destination block has only
one predecessor, and that being a BB with an indirect branch, then it won't be
marked as 'used' and may be removed.
PR10072

llvm-svn: 132638
2011-06-04 09:42:04 +00:00
Dan Gohman
40b6dd6fa2 Add a testcase to demonstrate the problem where phi translation is
ignored for clobbering partial-alias loads.

llvm-svn: 132633
2011-06-04 07:05:05 +00:00
Dan Gohman
aa7c0761db Reapply r131781, now that the GVN bug with partially-aliasing loads
is disabled.

llvm-svn: 132632
2011-06-04 06:50:18 +00:00
Dan Gohman
df07009a9a Disable the main feature of 130180, the elimination of loads that are
redundant with partially-aliasing loads.

When computing what portion of a clobbering load value is needed,
it doesn't consider phi-translation which may have occurred
between the clobbing load and the redundant load.

llvm-svn: 132631
2011-06-04 06:48:50 +00:00
Dan Gohman
c7cda7f467 Remove this test, which should have been reverted along with r131781.
llvm-svn: 132628
2011-06-04 06:21:23 +00:00
Dan Gohman
8fd6804868 Revert r131781 again. Apparently there is more going on here.
llvm-svn: 132625
2011-06-04 05:11:22 +00:00
Jakob Stoklund Olesen
9c97bf91c0 Teach TableGen to evaluate DAG expressions as set operations.
A TableGen backend can define how certain classes can be expanded into
ordered sets of defs, typically by evaluating a specific field in the
record. The SetTheory class can then evaluate DAG expressions that refer
to these named sets.

A number of standard set and list operations are predefined, and the
backend can add more specialized operators if needed. The -print-sets
backend is used by SetTheory.td to provide examples.

This is intended to simplify how register classes are defined:

  def GR32_NOSP : RegisterClass<"X86", [i32], 32, (sub GR32, ESP)>;

llvm-svn: 132621
2011-06-04 04:11:37 +00:00
Dan Gohman
24ef4a0b7d Reapply r131781 (revert r131809), now that some BasicAA shortcomings
it exposed are fixed.

llvm-svn: 132611
2011-06-04 00:46:31 +00:00
Dan Gohman
edaf7c535a Fix BasicAA's recursion detection so that it doesn't pessimize
queries in the case of a DAG, where a query reaches a node
visited earlier, but it's not on a cycle. This avoids
MayAlias results in cases where BasicAA is expected to
return MustAlias or PartialAlias in order to protect TBAA.

llvm-svn: 132609
2011-06-04 00:31:50 +00:00
Stuart Hastings
ea8b49dff3 Reapply 132424 with fixes. This fixes PR10068.
rdar://problem/5993888

llvm-svn: 132606
2011-06-03 23:53:54 +00:00
Jakob Stoklund Olesen
1db0c48cba Fix some tests that depend on register allocation.
llvm-svn: 132602
2011-06-03 22:45:21 +00:00
Eric Christopher
bd0677f8db Another possible bug. Stopgap until we can autogenerate tables and
constraint lengths.

Part of rdar://9037836 and rdar://9119939

llvm-svn: 132598
2011-06-03 22:09:12 +00:00
Eric Christopher
64638793be Testcase for llvm-gcc commit r132591.
Part of rdar://9037836 and rdar://9119939

llvm-svn: 132592
2011-06-03 20:56:31 +00:00
Eric Christopher
51ff48ad30 Fix an off by one error.
Part of rdar://9037836 and rdar://9119939

llvm-svn: 132590
2011-06-03 20:44:52 +00:00
Bill Wendling
f78358d1e7 Remove testcase. It's problematic for the buildbots.
llvm-svn: 132589
2011-06-03 20:43:58 +00:00
Jakob Stoklund Olesen
449aaba5b0 Switch AllocationOrder to using RegisterClassInfo instead of a BitVector
of reserved registers.

Use RegisterClassInfo in RABasic as well. This slightly changes som
allocation orders because RegisterClassInfo puts CSR aliases last.

llvm-svn: 132581
2011-06-03 20:34:53 +00:00
Dan Gohman
6d082aec26 When merging MustAlias and PartialAlias, chose PartialAlias instead
of conservatively choosing MayAlias.

llvm-svn: 132579
2011-06-03 20:17:36 +00:00