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Commit Graph

7560 Commits

Author SHA1 Message Date
Sanjiv Gupta
16ccd693aa XFAIL it while it is being worked on.
llvm-svn: 78275
2009-08-06 02:19:20 +00:00
Bob Wilson
6fb1102b9a Add tests for new NEON vld instructions.
llvm-svn: 78264
2009-08-06 00:38:31 +00:00
Bob Wilson
a12289f373 Convert more Neon tests to FileCheck.
llvm-svn: 78261
2009-08-05 23:51:20 +00:00
Dale Johannesen
33bc4c045e Adjust test for llvm-gcc checkin 78249.
llvm-svn: 78251
2009-08-05 22:18:47 +00:00
Dale Johannesen
89b5932a5c Test for llvm-gcc checkin 78223.
llvm-svn: 78229
2009-08-05 19:10:41 +00:00
Anton Korobeynikov
07ce0611d9 Missed pieces for ARM HardFP ABI.
Patch by Sandeep Patel!

llvm-svn: 78225
2009-08-05 19:04:42 +00:00
Dan Gohman
ac47a4b9ed Enable the new no-SP register classes by default. This is to address
PR4572. A few tests have some minor code regressions due to different
coalescing.

llvm-svn: 78217
2009-08-05 17:40:24 +00:00
Anton Korobeynikov
fceaadd678 Add testcases for reg-mem arithemtics added recently
llvm-svn: 78214
2009-08-05 17:04:32 +00:00
Anton Korobeynikov
81300620cf Convert bswap test to filecheck, add more test entries & convert stuff to filecheck
llvm-svn: 78212
2009-08-05 16:50:53 +00:00
Dan Gohman
dda3c89020 Fix a bug in the PIC16 backend.
llvm-svn: 78211
2009-08-05 16:46:43 +00:00
Dan Gohman
1c75d47e13 Change these tests to use function attributes rather than special llc
command-line options.

llvm-svn: 78204
2009-08-05 16:37:27 +00:00
Chris Lattner
3eba9b1f16 checking in broken testcases is not such a good idea.
llvm-svn: 78201
2009-08-05 16:04:18 +00:00
Sanjiv Gupta
2316b46234 Quite a few tests crashed in llc after 78142. This is just one of them. I hope to add a few more.
llvm-svn: 78198
2009-08-05 15:52:14 +00:00
Evan Cheng
eb8c4db271 Disable stack coloring with register for now. It's not able to set kill markers.
llvm-svn: 78179
2009-08-05 07:26:17 +00:00
Evan Cheng
87e24bb76e Another nasty coalescer bug (is there another kind):
After coalescing reg1027's def and kill are both at the same point:
 %reg1027,0.000000e+00 = [56,814:0)  0@70-(814)

bb5:
60   %reg1027<def> = t2MOVr %reg1027, 14, %reg0, %reg0
68   %reg1027<def> = t2LDRi12 %reg1027<kill>, 8, 14, %reg0
76   t2CMPzri %reg1038<kill,undef>, 0, 14, %reg0, %CPSR<imp-def>
84   %reg1027<def> = t2MOVr %reg1027, 14, %reg0, %reg0
96   t2Bcc mbb<bb5,0x2030910>, 1, %CPSR<kill>

Do not remove the kill marker on t2LDRi12.

llvm-svn: 78178
2009-08-05 07:05:41 +00:00
Dan Gohman
437fedf899 Revert changes accidentally committed along with r78163.
llvm-svn: 78165
2009-08-05 05:38:13 +00:00
Dan Gohman
1110fb6bbd Teach X86FastISel how to handle CCValAssign::BCvt, which is used for
MMX arguments. This fixes PR4684.

llvm-svn: 78163
2009-08-05 05:33:42 +00:00
Andreas Bolka
4d59f26912 ZIV tester for LDA.
llvm-svn: 78157
2009-08-05 04:26:05 +00:00
Andreas Bolka
1532dc3110 Fix LDA testcases.
llvm-svn: 78153
2009-08-05 04:03:29 +00:00
Evan Cheng
6fc78f15fe Turn some insert_subreg, extract_subreg, subreg_to_reg into implicit_defs.
llvm-svn: 78151
2009-08-05 03:53:14 +00:00
Evan Cheng
9b8516d864 One more. Transfer kill of the larger register when lowering an EXTRACT_SUBREG.
llvm-svn: 78145
2009-08-05 02:25:11 +00:00
Evan Cheng
d85e73ca64 One more place where subreg lowering forgot to transfer undefness.
llvm-svn: 78144
2009-08-05 01:57:22 +00:00
Dan Gohman
5d566d918b Major calling convention code refactoring.
Instead of awkwardly encoding calling-convention information with ISD::CALL,
ISD::FORMAL_ARGUMENTS, ISD::RET, and ISD::ARG_FLAGS nodes, TargetLowering
provides three virtual functions for targets to override:
LowerFormalArguments, LowerCall, and LowerRet, which replace the custom
lowering done on the special nodes. They provide the same information, but
in a more immediately usable format.

This also reworks much of the target-independent tail call logic. The
decision of whether or not to perform a tail call is now cleanly split
between target-independent portions, and the target dependent portion
in IsEligibleForTailCallOptimization.

This also synchronizes all in-tree targets, to help enable future
refactoring and feature work.

llvm-svn: 78142
2009-08-05 01:29:28 +00:00
Evan Cheng
3020badc5c If the insert_subreg source is <undef>, insert an implicit_def instead of a copy.
llvm-svn: 78141
2009-08-05 01:29:24 +00:00
Evan Cheng
e366789b50 Fix part 1 of pr4682. PICADD is a 16-bit instruction even in thumb2 mode.
llvm-svn: 78126
2009-08-04 23:47:55 +00:00
Evan Cheng
7963a20a2d Fix test.
llvm-svn: 78113
2009-08-04 22:22:58 +00:00
Bob Wilson
36d2cedfcb Convert more Neon tests to use FileCheck.
llvm-svn: 78111
2009-08-04 22:01:41 +00:00
Bob Wilson
423086a047 Convert a few Neon tests to use FileCheck.
llvm-svn: 78108
2009-08-04 21:33:22 +00:00
Jakob Stoklund Olesen
5edb25cd45 Clean up the handling of two-address operands in RegScavenger.
This fixes PR4528.

llvm-svn: 78107
2009-08-04 21:30:30 +00:00
Evan Cheng
2ec9ab08d8 Enable load / store multiple pass for Thumb2. It's not using ldrd / strd yet.
llvm-svn: 78104
2009-08-04 21:12:13 +00:00
David Goodwin
648590849c Add NEON single-precision FP support for fabs and fneg.
llvm-svn: 78101
2009-08-04 20:39:05 +00:00
Jakob Stoklund Olesen
434f6a8d64 LowerSubregsInstructionPass::LowerExtract should not extend the live range of registers.
When LowerExtract eliminates an EXTRACT_SUBREG with a kill flag, it moves the
kill flag to the place where the sub-register is killed. This can accidentally
overlap with the use of a sibling sub-register, and we have trouble.

In the test case we have this code:

Live Ins: %R0 %R1 %R2
	%R2L<def> = EXTRACT_SUBREG %R2<kill>, 1
	%R2H<def> = LOAD16fi <fi#-1>, 0, Mem:LD(2,4) [FixedStack-1 + 0]
	%R1L<def> = EXTRACT_SUBREG %R1<kill>, 1
	%R0L<def> = EXTRACT_SUBREG %R0<kill>, 1
	%R0H<def> = ADD16 %R2H<kill>, %R2L<kill>, %AZ<imp-def>, %AN<imp-def>, %AC0<imp-def>, %V<imp-def>, %VS<imp-def>

subreg: CONVERTING: %R2L<def> = EXTRACT_SUBREG %R2<kill>, 1
subreg: eliminated!
subreg: killed here: %R0H<def> = ADD16 %R2H, %R2L, %R2<imp-use,kill>, %AZ<imp-def>, %AN<imp-def>, %AC0<imp-def>, %V<imp-def>, %VS<imp-def>

The kill flag on %R2 is moved to the last instruction, and the live range overlaps with the definition of %R2H:

*** Bad machine code: Redefining a live physical register ***
- function:    f
- basic block:  0x18358c0 (#0)
- instruction: %R2H<def> = LOAD16fi <fi#-1>, 0, Mem:LD(2,4) [FixedStack-1 + 0]
Register R2H was defined but already live.

The fix is to replace EXTRACT_SUBREG with IMPLICIT_DEF instead of eliminating
it completely:

subreg: CONVERTING: %R2L<def> = EXTRACT_SUBREG %R2<kill>, 1
subreg: replace by: %R2L<def> = IMPLICIT_DEF %R2<kill>

Note that these IMPLICIT_DEF instructions survive to the asm output. It is
necessary to fix the stack-color-with-reg test case because of that.

llvm-svn: 78093
2009-08-04 20:01:11 +00:00
Evan Cheng
29fe8806d5 In thumb mode, r7 is used as frame register. This fixes pr4681.
llvm-svn: 78086
2009-08-04 18:46:17 +00:00
David Goodwin
5efde448fa Match common pattern for FNMAC. Add NEON SP support.
llvm-svn: 78085
2009-08-04 18:44:29 +00:00
David Goodwin
e034df4626 Improve tests.
llvm-svn: 78083
2009-08-04 18:11:59 +00:00
David Goodwin
99adffe5f2 Initial support for single-precision FP using NEON. Added "neonfp" attribute to enable. Added patterns for some binary FP operations.
llvm-svn: 78081
2009-08-04 17:53:06 +00:00
Evan Cheng
d840bf2eac Fix PR4528. This scavenger assertion is too strict. The two-address value is
killed by another operand.

There is probably a better fix. Either 1) scavenger can look at other operands, or
2) livevariables can be smarter about kill markers. Patches welcome.

llvm-svn: 78072
2009-08-04 16:52:44 +00:00
Chris Lattner
8f9a2d3c85 enhance codegen to put 16-bit character strings into the
__TEXT,__ustring section on darwin.

llvm-svn: 78068
2009-08-04 16:27:13 +00:00
Chris Lattner
41ade57a63 Add support emiting for 2/4 byte mergable strings to the ".rodata.str*"
section on ELF targets.

llvm-svn: 78066
2009-08-04 16:13:09 +00:00
Devang Patel
ada7454774 Use separate ValueList for metadata.
This fixes PR4666.

llvm-svn: 78056
2009-08-04 06:00:18 +00:00
Devang Patel
90df234b2d Revert recent bitcode writer patches.
llvm-svn: 78053
2009-08-04 05:01:35 +00:00
Bill Wendling
3fe8f9af35 llvm-gcc checks the static asm variable is valid in ValidateRegisterVariable. Make this work for PPC.
llvm-svn: 78051
2009-08-04 04:48:31 +00:00
Bill Wendling
03e6a05f0f Fixed now.
llvm-svn: 78042
2009-08-04 03:46:54 +00:00
Rafael Espindola
bca6e956fb Add test for PR4678
llvm-svn: 78040
2009-08-04 03:44:37 +00:00
Bill Wendling
c144416738 XFAIL for the moment.
llvm-svn: 78038
2009-08-04 03:40:47 +00:00
Devang Patel
5312364dd4 Constants and Metadata share ValueList. This means they must be emitted interleaved (using appropriate BLOCK_IDs) otherwise ValuePtrs index gets out of sync.
llvm-svn: 78033
2009-08-04 02:26:56 +00:00
Evan Cheng
817618d570 Emit sub r, #c instead of transforming it to add r, #-c if c fits in 8-bit. This is a bit of pre-mature optimization. 8-bit variant makes it likely it will be narrowed to a 16-bit instruction.
llvm-svn: 78030
2009-08-04 01:41:15 +00:00
Dan Gohman
aba682a290 Add -disable-output. Thanks Bill!
llvm-svn: 78009
2009-08-03 22:24:22 +00:00
Dan Gohman
39f93f6443 Add a new Constant::getIntegerValue helper function, and convert a
few places in InstCombine to use it, to fix problems handling pointer
types. This fixes the recent llvm-gcc bootstrap error.

llvm-svn: 78005
2009-08-03 22:07:33 +00:00
Bob Wilson
eb3b616a7e Lower CONCAT_VECTOR during legalization instead of matching it during isel.
Add a testcase.

llvm-svn: 77992
2009-08-03 20:36:38 +00:00