6 Commits

Author	SHA1	Message	Date
Craig Topper	54ac1d95cd	[X86] Don't use GR64 register 'and with immediate' instructions if the immediate is zero in the upper 33-bits or upper 57-bits. Use GR32 instructions instead. ... Previously the patterns didn't have high enough priority and we would only use the GR32 form if the only the upper 32 or 56 bits were zero. Fixes PR23100. llvm-svn: 234075	2015-04-04 02:08:20 +00:00
Bill Wendling	d1f658563d	This test case: ... long test(long x) { return (x & 123124) | 3; } Currently compiles to: _test: orl $3, %edi movq %rdi, %rax andq $123127, %rax ret This is because instruction and DAG combiners canonicalize (or (and x, C), D) -> (and (or, D), (C | D)) However, this is only profitable if (C & D) != 0. It gets in the way of the 3-addressification because the input bits are known to be zero. llvm-svn: 97616	2010-03-03 00:35:56 +00:00
Dan Gohman	df2896d609	Eliminate more uses of llvm-as and llvm-dis. ... llvm-svn: 81290	2009-09-08 23:54:48 +00:00
Tanya Lattner	8116db05a6	Remove llvm-upgrade and update tests. ... llvm-svn: 47432	2008-02-21 07:42:26 +00:00
Dan Gohman	794fa1f8f7	Convert tests using "| wc -l | grep ..." to use the count script. ... llvm-svn: 41097	2007-08-15 13:36:28 +00:00
Reid Spencer	4572ce85b0	Regression is gone, don't try to find it on clean target. ... llvm-svn: 33296	2007-01-17 07:59:14 +00:00