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Commit Graph

317 Commits

Author SHA1 Message Date
Chris Lattner
3eaaa7bb6c Momentous day: remove the "O" member from AsmPrinter. Now all
"asm printering" happens through MCStreamer.  This also 
Streamerizes PIC16 debug info, which escaped my attention.

This removes a leak from LLVMTargetMachine of the 'legacy'
output stream.

llvm-svn: 100327
2010-04-04 08:18:47 +00:00
Chris Lattner
8fb6be1886 fix an ugly wart in the MCInstPrinter api where the
raw_ostream to print an instruction to had to be specified
at MCInstPrinter construction time instead of being able
to pick at each call to printInstruction.

llvm-svn: 100307
2010-04-04 05:04:31 +00:00
Chris Lattner
e7538fa303 rearrange MCContext ownership. Before LLVMTargetMachine created it
and passing off ownership to AsmPrinter.  Now MachineModuleInfo
creates it and owns it by value.  This allows us to use MCSymbols
more consistently throughout the rest of the code generator, and
simplifies a bit of code.  This also allows MachineFunction to 
keep an MCContext reference handy, and cleans up the TargetRegistry
interfaces for AsmPrinters.

llvm-svn: 98450
2010-03-13 20:55:24 +00:00
Chris Lattner
956582f876 make the mangler take an MCContext instead of an MAI.
No functionality change.

llvm-svn: 98363
2010-03-12 18:44:54 +00:00
Chris Lattner
f4dce6a6d8 remove MAI argument from createAsmStreamer since it
can get it from the context now.

llvm-svn: 98361
2010-03-12 18:28:53 +00:00
Chris Lattner
debc026df2 change MCContext to always have an MCAsmInfo.
llvm-svn: 98293
2010-03-11 22:53:35 +00:00
Daniel Dunbar
687d99cfa8 MC: Provide MCAssembler with a TargetAsmBackend.
llvm-svn: 98222
2010-03-11 01:34:27 +00:00
Evan Cheng
668ceddeec Enable machine cse pass.
llvm-svn: 98132
2010-03-10 03:07:41 +00:00
Evan Cheng
1b43094229 Revert accidental commit.
llvm-svn: 98045
2010-03-09 04:04:38 +00:00
Evan Cheng
8277a90f75 - Make the machine cse dumb coalescer (as opposed to the more awesome simple
coalescer) handle sub-register classes.
- Add heuristics to avoid non-profitable cse. Given the current lack of live
  range splitting, avoid cse when an expression has PHI use and the would be
  new use is in a BB where the expression wasn't already being used.

llvm-svn: 98043
2010-03-09 03:21:12 +00:00
Jakob Stoklund Olesen
1fce28720a We don't really care about correct register liveness information after the
post-ra scheduler has run. Disable the verifier checks that late in the game.

llvm-svn: 97837
2010-03-05 21:49:13 +00:00
Evan Cheng
9b35d553df Run machine licm before machine cse to avoid messing up licm opportunities.
llvm-svn: 97752
2010-03-04 21:28:09 +00:00
Evan Cheng
df8f4b6142 Rename -machine-cse to -enable-machine-cse.
llvm-svn: 97713
2010-03-04 02:08:04 +00:00
Evan Cheng
ae376081d2 Add an option to enable machine cse (it's not doing anything yet.
llvm-svn: 97627
2010-03-03 01:38:35 +00:00
Dan Gohman
4b0dac5a8d Add a flag to addPassesToEmit* to disable the Verifier pass run
after LSR, so that clients can opt in.

llvm-svn: 97357
2010-02-28 00:41:59 +00:00
Bob Wilson
cf20a07501 Remove unused "NoPRE" parameter in GVN and createGVNPass().
llvm-svn: 97235
2010-02-26 18:35:19 +00:00
Bob Wilson
5d66f81412 Besides removing phi cycles that reduce to a single value, also remove dead
phi cycles.  Adjust a few tests to keep dead instructions from being optimized
away.  This (together with my previous change for phi cycles) fixes Apple
radar 7627077.

llvm-svn: 96057
2010-02-13 00:31:44 +00:00
Chris Lattner
946403d05f give MCCodeEmitters access to the current MCContext.
llvm-svn: 96038
2010-02-12 23:12:47 +00:00
Dan Gohman
c40eb525ad Reapply the new LoopStrengthReduction code, with compile time and
bug fixes, and with improved heuristics for analyzing foreign-loop
addrecs.

This change also flattens IVUsers, eliminating the stride-oriented
groupings, which makes it easier to work with.

llvm-svn: 95975
2010-02-12 10:34:29 +00:00
Bob Wilson
2fd80c3d94 Add a new pass on machine instructions to optimize away PHI cycles that
reduce down to a single value.  InstCombine already does this transformation
but DAG legalization may introduce new opportunities.  This has turned out to
be important for ARM where 64-bit values are split up during type legalization:
InstCombine is not able to remove the PHI cycles on the 64-bit values but
the separate 32-bit values can be optimized.  I measured the compile time 
impact of this (running llc on 176.gcc) and it was not significant.

llvm-svn: 95951
2010-02-12 01:30:21 +00:00
Evan Cheng
5541068ad3 Run codegen dce pass for all targets at all optimization levels. Previously it's
only run for x86 with fastisel. I've found it being very effective in
eliminating some obvious dead code as result of formal parameter lowering
especially when tail call optimization eliminated the need for some of the loads
from fixed frame objects. It also shrinks a number of the tests. A couple of
tests no longer make sense and are now eliminated.

llvm-svn: 95493
2010-02-06 09:07:11 +00:00
Chris Lattner
e8811c3222 change addPassesToEmitFile to return true on failure instead of its input,
add -filetype=null for performance testing and remove -filetype=dynlib,
which isn't planned to be implemented.

llvm-svn: 95202
2010-02-03 05:55:08 +00:00
Chris Lattner
7e4c2b183b pass an instprinter into the AsmPrinter if it is available.
llvm-svn: 95168
2010-02-03 00:29:55 +00:00
Chris Lattner
bdd4ae564a make any use of the "O" stream in asmprinter print to
stderr if in filetype=obj mode.  This is a hack, and will
live until dwarf emission and other random stuff that is
not yet going through MCStreamer is upgraded.  It only
impacts filetype=obj mode.

llvm-svn: 95166
2010-02-03 00:22:02 +00:00
Chris Lattner
78f57ac8dc Hook up -filetype=obj through the MachO streamer. Here's a demo:
$ cat t.ll 
@g = global i32 42
$ llc t.ll -o t.o -filetype=obj
$ nm t.o
00000000 D _g

There is still a ton of work left.  Instructions are not being encoded
yet apparently.

llvm-svn: 95162
2010-02-02 23:57:42 +00:00
Chris Lattner
62ba09bb47 use OwningPtr and factor code better.
llvm-svn: 95156
2010-02-02 23:45:17 +00:00
Chris Lattner
643f2f9bc4 refactor code so that LLVMTargetMachine creates the asmstreamer and
mccontext instead of having AsmPrinter do it.  This allows other 
types of MCStreamer's to be passed in.

llvm-svn: 95155
2010-02-02 23:37:42 +00:00
Chris Lattner
9ba7b16a19 simplify getVerboseAsm
llvm-svn: 95153
2010-02-02 22:58:13 +00:00
Chris Lattner
501138c6ad move handling of asm-verbose out of AsmPrinter.cpp into LLVMTargetMachine.cpp with the rest of the command line options.
llvm-svn: 95152
2010-02-02 22:54:51 +00:00
Chris Lattner
7dd4ad3ced Remove a bunch of stuff around the edges of the ELF writer.
Now the only use of the ELF writer is the JIT, which won't be
easy to fix in the short term. :( :(

llvm-svn: 95148
2010-02-02 22:31:11 +00:00
Chris Lattner
7d162688a9 eliminate FileModel::Model, just use CodeGenFileType. The client
of the code generator shouldn't care what object format a target
uses.

llvm-svn: 95124
2010-02-02 21:06:45 +00:00
Chris Lattner
ff8ba8fc79 eliminate all forms of addPassesToEmitMachineCode except
the one used by the JIT.  Remove all forms of
addPassesToEmitFileFinish except the one used by the static
code generator.  Inline the remaining version of
addPassesToEmitFileFinish into its only caller.

llvm-svn: 95109
2010-02-02 19:14:27 +00:00
Chris Lattner
fa04a6e968 Inline addAssemblyEmitter into its one real caller and delete
the -print-emitted-asm option.  The JIT shouldn't have to pull
in the asmprinter.

llvm-svn: 95100
2010-02-02 18:44:12 +00:00
Nate Begeman
4d489ea053 Kill the Mach-O writer, and temporarily make filetype=obj an error.
The MCStreamer based assemblers will take over for this functionality.

llvm-svn: 95033
2010-02-01 23:56:58 +00:00
Dan Gohman
a527ad10cc Revert r94066, which was the patch which added a Verifier pass after
LoopStrengthReduce, as it's causing too much trouble (even with the
old LoopStrengthReduce code).

llvm-svn: 94172
2010-01-22 10:48:28 +00:00
Dan Gohman
45406404b1 Run the verifier after LSR, to help catch use-before-def errors before
they reach codegen.

llvm-svn: 94066
2010-01-21 03:51:36 +00:00
Bob Wilson
3386047bdb Run the pre-register allocation tail duplication pass by default. Remove
the -pre-regalloc-taildup command-line option, and add a new
-disable-early-taildup option.

llvm-svn: 93597
2010-01-16 00:29:50 +00:00
Nate Begeman
b6c8d75f62 Hook up llc's -filetype=obj to use MCStreamer if an MCCodeEmitter is available.
Remove most of old Mach-O Writer support, it has been replaced by MCMachOStreamer

Further refactoring to completely remove MachOWriter and drive the object file
writer with the AsmPrinter MCInst/MCSection logic is forthcoming.

llvm-svn: 93527
2010-01-15 18:51:18 +00:00
Jim Grosbach
fb10749b6d Add comment explaining the necessity of r93456
llvm-svn: 93459
2010-01-14 21:38:31 +00:00
Jim Grosbach
d3d283dc19 Dwarf EH prepare needs to be run after SjLj prepare. Otherwise,
catch info can get misplaced when a selector ends up more than one block
removed from the parent invoke(s). This could happen when a landing pad is
shared by multiple invokes and is also a target of a normal edge from
elsewhere.

llvm-svn: 93456
2010-01-14 21:22:16 +00:00
Evan Cheng
2afc417122 Re-enable extension optimization pass.
llvm-svn: 93313
2010-01-13 08:45:40 +00:00
Evan Cheng
973fceab0c Disable opt-ext pass to unbreak the build for now.
llvm-svn: 93286
2010-01-13 01:51:43 +00:00
Evan Cheng
7fcebf982c Remove debug option I accidentally left in.
llvm-svn: 93285
2010-01-13 01:43:20 +00:00
Evan Cheng
76db3bb18e Add a quick pass to optimize sign / zero extension instructions. For targets where the pre-extension values are available in the subreg of the result of the extension, replace the uses of the pre-extension value with the result + extract_subreg.
For now, this pass is fairly conservative. It only perform the replacement when both the pre- and post- extension values are used in the block. It will miss cases where the post-extension values are live, but not used.

llvm-svn: 93278
2010-01-13 00:30:23 +00:00
Jakob Stoklund Olesen
b90023e707 Allow double defs after tail duplication.
llvm-svn: 92874
2010-01-06 23:52:46 +00:00
David Greene
593fd246ac Change errs() to dbgs().
llvm-svn: 92524
2010-01-04 22:33:16 +00:00
Eric Christopher
5c812e2396 Fix setting and default setting of code model for jit. Do this
by allowing backends to override routines that will default
the JIT and Static code generation to an appropriate code model
for the architecture.

Should fix PR 5773.

llvm-svn: 91824
2009-12-21 08:15:29 +00:00
Evan Cheng
d6b6eaa734 Remove debugging code.
llvm-svn: 91604
2009-12-17 18:03:12 +00:00
Evan Cheng
18e334195d Revert 91280-91283, 91286-91289, 91291, 91293, 91295-91296. It apparently introduced a non-deterministic behavior in the optimizer somewhere.
llvm-svn: 91598
2009-12-17 09:39:49 +00:00
Evan Cheng
0b005cade5 Add a pre-regalloc tail duplication pass.
llvm-svn: 90567
2009-12-04 09:42:45 +00:00
Bob Wilson
c029183683 Rename new TailDuplicationPass to avoid name conflict with the old one.
llvm-svn: 89968
2009-11-26 21:38:41 +00:00
Bob Wilson
de012efdba Split tail duplication into a separate pass. This is needed to avoid
running tail duplication when doing branch folding for if-conversion, and
we also want to be able to run tail duplication earlier to fix some
reg alloc problems.  Move the CanFallThrough function from BranchFolding
to MachineBasicBlock so that it can be shared by TailDuplication.

llvm-svn: 89904
2009-11-26 00:32:21 +00:00
Devang Patel
9cd7c1ab8e Remove DebugLabelFolder pass. It is not used by dwarf writer anymore.
llvm-svn: 89790
2009-11-24 19:37:07 +00:00
Dan Gohman
1c98078e57 Add an experimental option to run gep-splitting and no-load GVN
just before codegen.

llvm-svn: 89439
2009-11-20 02:03:44 +00:00
Evan Cheng
52dedf7dfe Now that code placement optimization pass is run for JIT, make sure it's before pre-emit passes.
llvm-svn: 86092
2009-11-05 01:16:59 +00:00
Eric Christopher
f20f6980cb Add some options to disable various code gen optimizations.
llvm-svn: 86044
2009-11-04 19:57:50 +00:00
Dan Gohman
de460ebecb Factor out more code into addCommonCodeGenPasses. The JIT wasn't
previously running CodePlacementOpt. Also print headers before
each dump in -print-machineinstrs mode, so that it's clear which
dump is which.

llvm-svn: 85681
2009-10-31 20:17:39 +00:00
Dan Gohman
04c536dff6 Remove CodeGenLICM. It's largely obsoleted by MachineLICM's new ability
to unfold loop-invariant loads.

llvm-svn: 85657
2009-10-31 14:35:41 +00:00
Bill Wendling
58923e365d Don't put in these EH changes.
llvm-svn: 85460
2009-10-29 00:37:35 +00:00
Bill Wendling
784d38511f Reverting r85338 for now. It's causing a bootstrap failure on PPC darwin9.
--- Reverse-merging r85338 into '.':
U    lib/CodeGen/SimpleRegisterCoalescing.cpp
U    lib/CodeGen/SimpleRegisterCoalescing.h

llvm-svn: 85454
2009-10-29 00:22:16 +00:00
Bob Wilson
fc1194919b Revert r85346 change to control tail merging by CodeGenOpt::Level.
I'm going to redo this using the OptimizeForSize function attribute.

llvm-svn: 85426
2009-10-28 20:46:46 +00:00
Bob Wilson
98c9fb94ab Record CodeGen optimization level in the BranchFolding pass so that we can
use it to control tail merging when there is a tradeoff between performance
and code size.  When there is only 1 instruction in the common tail, we have
been merging.  That can be good for code size but is a definite loss for
performance.  Now we will avoid tail merging in that case when the
optimization level is "Aggressive", i.e., "-O3".  Radar 7338114.

Since the IfConversion pass invokes BranchFolding, it too needs to know
the optimization level.  Note that I removed the RegisterPass instantiation
for IfConversion because it required a default constructor.  If someone
wants to keep that for some reason, we can add a default constructor with
a hard-wired optimization level.

llvm-svn: 85346
2009-10-27 23:49:38 +00:00
Evan Cheng
e1fbdc5244 Change createPostRAScheduler so it can be turned off at llc -O1.
llvm-svn: 84273
2009-10-16 21:06:15 +00:00
Evan Cheng
bb0561f2dd Add a target hook to add pre- post-regalloc scheduling passes.
llvm-svn: 83144
2009-09-30 08:49:50 +00:00
David Goodwin
a282690f82 Remove -post-RA-schedule flag and add a TargetSubtarget method to enable post-register-allocation scheduling. By default it is off. For ARM, enable/disable with -mattr=+/-postrasched. Enable by default for cortex-a8.
llvm-svn: 83122
2009-09-30 00:10:16 +00:00
Evan Cheng
ac17fbc5fe Flip -disable-post-RA-scheduler to -post-RA-scheduler.
llvm-svn: 82803
2009-09-25 21:38:11 +00:00
Dan Gohman
752227ef24 Add a new pass for doing late hoisting of floating-point and vector
constants out of loops. These aren't covered by the regular LICM
pass, because in LLVM IR constants don't require separate
instructions. They're not always covered by the MachineLICM pass
either, because it doesn't know how to unfold folded constant-pool
loads. This is somewhat experimental at this point, and off by
default.

llvm-svn: 82076
2009-09-16 20:25:11 +00:00
Dan Gohman
cd6a67f749 -fast is now -O0. -fast-isel is no longer experimental.
llvm-svn: 80104
2009-08-26 15:57:57 +00:00
Chris Lattner
9a542aae19 remove std::ostream versions of printing stuff for MBB and MF,
upgrading a few things to use raw_ostream

llvm-svn: 79811
2009-08-23 03:13:20 +00:00
Chris Lattner
5d8af49626 Rename TargetAsmInfo (and its subclasses) to MCAsmInfo.
llvm-svn: 79763
2009-08-22 20:48:53 +00:00
Jim Grosbach
4643e96d36 Move the sjlj exception handling conversions to a back-end pass where they
more properly belong. This allows removing the front-end conditionalized
SJLJ code, and cleans up the generated IR considerably. All of the
infrastructure code (calling _Unwind_SjLj_Register/Unregister, etc) is
added by the SjLjEHPrepare pass.

llvm-svn: 79250
2009-08-17 16:41:22 +00:00
Jakob Stoklund Olesen
db3f862b6f Allow double defs in the machine code verifier after the addPreRegAlloc passes.
llvm-svn: 79095
2009-08-15 13:10:15 +00:00
Daniel Dunbar
eab68eaec4 TargetRegistry: Change AsmPrinter constructor to be typed as returning an
AsmPrinter instance (instead of just a FunctionPass)

llvm-svn: 78962
2009-08-13 23:48:47 +00:00
Daniel Dunbar
62eec42595 TargetRegistry: Reorganize AsmPrinter construction so that clients pass in the
TargetAsmInfo. This eliminates a dependency on TargetMachine.h from
TargetRegistry.h, which technically was a layering violation.
 - Clients probably can only sensibly pass in the same TargetAsmInfo as the
   TargetMachine has, but there are only limited clients of this API.

llvm-svn: 78928
2009-08-13 19:38:51 +00:00
Chris Lattner
55df534293 Change TargetAsmInfo to be constructed via TargetRegistry from a Target+Triple
pair instead of from a virtual method on TargetMachine.  This cuts the final
ties of TargetAsmInfo to TargetMachine, meaning that MC can now use 
TargetAsmInfo.

llvm-svn: 78802
2009-08-12 07:22:17 +00:00
Dan Gohman
24939b2c4f Tidy #includes.
llvm-svn: 78677
2009-08-11 16:02:12 +00:00
Jim Grosbach
c9a1dd9291 SjLj based exception handling unwinding support. This patch is nasty, brutish
and short. Well, it's kinda short. Definitely nasty and brutish.

The front-end generates the register/unregister calls into the SjLj runtime,
call-site indices and landing pad dispatch. The back end fills in the LSDA
with the call-site information provided by the front end. Catch blocks are
not yet implemented.

Built on Darwin and verified no llvm-core "make check" regressions.

llvm-svn: 78625
2009-08-11 00:09:57 +00:00
Evan Cheng
eb8c4db271 Disable stack coloring with register for now. It's not able to set kill markers.
llvm-svn: 78179
2009-08-05 07:26:17 +00:00
Dan Gohman
f28b3bb262 Reapply r77654 with a fix: MachineFunctionPass's getAnalysisUsage
shouldn't do AU.setPreservesCFG(), because even though CodeGen passes
don't modify the LLVM IR CFG, they may modify the MachineFunction CFG,
and passes like MachineLoop are registered with isCFGOnly set to true.

llvm-svn: 77691
2009-07-31 18:16:33 +00:00
Daniel Dunbar
60d71a790c Revert r77654, it appears to be causing llvm-gcc bootstrap failures, and many
failures when building assorted projects with clang.

--- Reverse-merging r77654 into '.':
U    include/llvm/CodeGen/Passes.h
U    include/llvm/CodeGen/MachineFunctionPass.h
U    include/llvm/CodeGen/MachineFunction.h
U    include/llvm/CodeGen/LazyLiveness.h
U    include/llvm/CodeGen/SelectionDAGISel.h
D    include/llvm/CodeGen/MachineFunctionAnalysis.h
U    include/llvm/Function.h
U    lib/Target/CellSPU/SPUISelDAGToDAG.cpp
U    lib/Target/PowerPC/PPCISelDAGToDAG.cpp
U    lib/CodeGen/LLVMTargetMachine.cpp
U    lib/CodeGen/MachineVerifier.cpp
U    lib/CodeGen/MachineFunction.cpp
U    lib/CodeGen/PrologEpilogInserter.cpp
U    lib/CodeGen/MachineLoopInfo.cpp
U    lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
D    lib/CodeGen/MachineFunctionAnalysis.cpp
D    lib/CodeGen/MachineFunctionPass.cpp
U    lib/CodeGen/LiveVariables.cpp

llvm-svn: 77661
2009-07-31 03:02:41 +00:00
Dan Gohman
645f1122c0 Manage MachineFunctions with an analysis Pass instead of the Annotable
mechanism. To support this, make MachineFunctionPass a little more
complete.

llvm-svn: 77654
2009-07-31 01:52:50 +00:00
Daniel Dunbar
19efed84cc We don't need to use llvm_report_error, this interface can deal with errors
(although we don't get a very good error message).

llvm-svn: 75864
2009-07-15 23:54:01 +00:00
Daniel Dunbar
5f443ecde8 Add missing includes.
llvm-svn: 75862
2009-07-15 23:48:37 +00:00
Daniel Dunbar
4771afe104 Lift addAssemblyEmitter into LLVMTargetMachine.
- No functionality change.

llvm-svn: 75859
2009-07-15 23:34:19 +00:00
Daniel Dunbar
d85e8b6334 Lift DumpAsm / -print-emitted-asm functionality into LLVMTargetMachine.
- No intended functionality change.

llvm-svn: 75848
2009-07-15 22:33:19 +00:00
David Greene
9c8a1b9b90 Have asm printers use formatted_raw_ostream directly to avoid a
dynamic_cast<>.

llvm-svn: 75670
2009-07-14 20:18:05 +00:00
Evan Cheng
7c051b0c6f Revert an accidental commit.
llvm-svn: 75553
2009-07-13 23:44:01 +00:00
Bruno Cardoso Lopes
38373542a1 Add the Object Code Emitter class. Original patch by Aaron Gray, I did some
cleanup, removed some #includes and moved Object Code Emitter out-of-line.

llvm-svn: 74813
2009-07-06 05:09:34 +00:00
Evan Cheng
d0a66e438f Add a ARM specific pre-allocation pass that re-schedule loads / stores from
consecutive addresses togther. This makes it easier for the post-allocation pass
to form ldm / stm.

This is step 1. We are still missing a lot of ldm / stm opportunities because
of register allocation are not done in the desired order. More enhancements
coming.

llvm-svn: 73291
2009-06-13 09:12:55 +00:00
Bruno Cardoso Lopes
4da7e7af43 First patch in the direction of splitting MachineCodeEmitter in two subclasses:
JITCodeEmitter and ObjectCodeEmitter. No functional changes yet. Patch by Aaron Gray

llvm-svn: 72631
2009-05-30 20:51:52 +00:00
Duncan Sands
bbd03677ee Add a new codegen pass that normalizes dwarf exception handling
code in preparation for code generation.  The main thing it does
is handle the case when eh.exception calls (and, in a future
patch, eh.selector calls) are far away from landing pads.  Right
now in practice you only find eh.exception calls close to landing
pads: either in a landing pad (the common case) or in a landing
pad successor, due to loop passes shifting them about.  However
future exception handling improvements will result in calls far
from landing pads:
(1) Inlining of rewinds.  Consider the following case:
In function @f:
...
  invoke @g to label %normal unwind label %unwinds
...
unwinds:
  %ex = call i8* @llvm.eh.exception()
...

In function @g:
...
  invoke @something to label %continue unwind label %handler
...
handler:
  %ex = call i8* @llvm.eh.exception()
... perform cleanups ...
  "rethrow exception"

Now inline @g into @f.  Currently this is turned into:
In function @f:
...
  invoke @something to label %continue unwind label %handler
...
handler:
  %ex = call i8* @llvm.eh.exception()
... perform cleanups ...
  invoke "rethrow exception" to label %normal unwind label %unwinds
unwinds:
  %ex = call i8* @llvm.eh.exception()
...

However we would like to simplify invoke of "rethrow exception" into
a branch to the %unwinds label.  Then %unwinds is no longer a landing
pad, and the eh.exception call there is then far away from any landing
pads.

(2) Using the unwind instruction for cleanups.
It would be nice to have codegen handle the following case:
  invoke @something to label %continue unwind label %run_cleanups
...
handler:
... perform cleanups ...
  unwind

This requires turning "unwind" into a library call, which
necessarily takes a pointer to the exception as an argument
(this patch also does this unwind lowering).  But that means
you are using eh.exception again far from a landing pad.

(3) Bugpoint simplifications.  When bugpoint is simplifying
exception handling code it often generates eh.exception calls
far from a landing pad, which then causes codegen to assert.
Bugpoint then latches on to this assertion and loses sight
of the original problem.

Note that it is currently rare for this pass to actually do
anything.  And in fact it normally shouldn't do anything at
all given the code coming out of llvm-gcc!  But it does fire
a few times in the testsuite.  As far as I can see this is
almost always due to the LoopStrengthReduce codegen pass
introducing pointless loop preheader blocks which are landing
pads and only contain a branch to another block.  This other
block contains an eh.exception call.  So probably by tweaking
LoopStrengthReduce a bit this can be avoided.

llvm-svn: 72276
2009-05-22 20:36:31 +00:00
Jakob Stoklund Olesen
94c30c8409 Pass to verify generated machine code.
The following is checked:

* Operand counts: All explicit operands must be present.

* Register classes: All physical and virtual register operands must be
  compatible with the register class required by the instruction descriptor.

* Register live intervals: Registers must be defined only once, and must be
  defined before use.

The machine code verifier is enabled with the command-line option
'-verify-machineinstrs', or by defining the environment variable
LLVM_VERIFY_MACHINEINSTRS to the name of a file that will receive all the
verifier errors.

llvm-svn: 71918
2009-05-16 00:33:53 +00:00
Evan Cheng
d6e3e4d746 Fixed a stack slot coloring with reg bug: do not update implicit use / def when doing forward / backward propagation.
llvm-svn: 71574
2009-05-12 18:31:57 +00:00
Evan Cheng
1b99da6e30 Rename "loop aligner" pass to "code placement optimization" pass.
llvm-svn: 71150
2009-05-07 05:42:24 +00:00
Bill Wendling
6edd6ef74f Just turn aggressive stack coloring off at -O3.
llvm-svn: 71140
2009-05-07 01:33:38 +00:00
Bill Wendling
7c50dcd02e Temporarily revert r71010. It was causing massive failures during self-hosting.
llvm-svn: 71138
2009-05-07 01:27:25 +00:00
Evan Cheng
984da04cd0 Enable stack coloring with regs at -O3.
llvm-svn: 71010
2009-05-05 20:30:36 +00:00
Bill Wendling
40a162f75f Instead of passing in an unsigned value for the optimization level, use an enum,
which better identifies what the optimization is doing. And is more flexible for
future uses.

llvm-svn: 70440
2009-04-29 23:29:43 +00:00
Bill Wendling
7546bed590 Second attempt:
Massive check in. This changes the "-fast" flag to "-O#" in llc. If you want to
use the old behavior, the flag is -O0. This change allows for finer-grained
control over which optimizations are run at different -O levels.

Most of this work was pretty mechanical. The majority of the fixes came from
verifying that a "fast" variable wasn't used anymore. The JIT still uses a
"Fast" flag. I'll change the JIT with a follow-up patch.

llvm-svn: 70343
2009-04-29 00:15:41 +00:00
Bill Wendling
ef47ace92f r70270 isn't ready yet. Back this out. Sorry for the noise.
llvm-svn: 70275
2009-04-28 01:04:53 +00:00
Bill Wendling
2799e916c3 Massive check in. This changes the "-fast" flag to "-O#" in llc. If you want to
use the old behavior, the flag is -O0. This change allows for finer-grained
control over which optimizations are run at different -O levels.

Most of this work was pretty mechanical. The majority of the fixes came from
verifying that a "fast" variable wasn't used anymore. The JIT still uses a
"Fast" flag. I'm not 100% sure if it's necessary to change it there...

llvm-svn: 70270
2009-04-28 00:21:31 +00:00
Evan Cheng
3a7489a4cc CodeGen still defaults to non-verbose asm, but llc now overrides it and default to verbose.
llvm-svn: 67668
2009-03-25 01:47:28 +00:00
Evan Cheng
3f98669da2 Re-enable machine sinking pass now that the coalescer bugs and the AnalyzeBrnach bug are fixed.
llvm-svn: 64126
2009-02-09 08:45:39 +00:00
Bill Wendling
4ed0306d6f Revert r63999. It was breaking self-hosting builds.
llvm-svn: 64062
2009-02-08 00:58:05 +00:00
Evan Cheng
62694a52fe Enable machine sinking pass in non-fast mode.
llvm-svn: 63999
2009-02-07 01:57:46 +00:00
Evan Cheng
b36e3e34e7 Turn on machine LICM in non-fast mode.
llvm-svn: 63855
2009-02-05 08:46:33 +00:00
Dan Gohman
6b4f972c9f Move post-RA scheduling before branch folding for now, because branch
folding's tail merging doesn't currently preserve liveness information
which post-RA scheduling requires.

llvm-svn: 61183
2008-12-18 01:36:42 +00:00
Dan Gohman
dcc6608aa6 Run post-RA scheduling after branch folding, as it tends to
obscure tail-merging opportunities.

llvm-svn: 59967
2008-11-24 17:22:52 +00:00
Dan Gohman
3b3afa49f8 Add another machine-code printing pass when post-pass scheduling is run.
llvm-svn: 59746
2008-11-20 19:54:21 +00:00
Bill Wendling
f5b264a64b Implement stack protectors as function attributes: "ssp" and "sspreq".
llvm-svn: 59202
2008-11-13 01:02:14 +00:00
Bill Wendling
ae168b2c83 Update in response to feedback from Chris:
- Use enums instead of magic numbers.

- Rework algorithm to use the bytes size from the target to determine when to
  emit stack protectors.

- Get rid of "propolice" in any comments.

- Renamed an option to its expanded form.

- Other miscellanenous changes.

More changes will come after this.

llvm-svn: 58723
2008-11-04 21:53:09 +00:00
Bill Wendling
0f3f36688b Initial checkin for stack protectors. Here's what it does:
* The prologue is modified to read the __stack_chk_guard global and insert it
  onto the stack.

* The epilogue is modified to read the stored guard from the stack and compare
  it to the original __stack_chk_guard value. If they differ, then the
  __stack_chk_fail() function is called.

* The stack protector needs to be first on the stack (after the parameters) to
  catch any stack-smashing activities.

Front-end support will follow after a round of beta testing.

llvm-svn: 58673
2008-11-04 02:10:20 +00:00
Dan Gohman
66e878f316 Move the code that adds the DeadMachineInstructionElimPass from
target-independent code to target-specific code. This prevents it
from running on targets that aren't using fast-isel.

In addition to saving compile time, this addresses the problem
that not all targets are prepared for it. In order to use this
pass, all instructions must declare all their fixed uses and
defs of physical registers.

llvm-svn: 58144
2008-10-25 17:46:52 +00:00
Daniel Dunbar
d1169ccaf2 Move Print*Pass to use raw_ostream.
llvm-svn: 57946
2008-10-22 03:25:22 +00:00
Daniel Dunbar
919ce3c16a Privatize PrintModulePass and PrintFunctionPass and add
createPrintModulePass and createPrintFunctionPass.
 - So clients who compile w/o RTTI can use them.

llvm-svn: 57933
2008-10-21 23:33:38 +00:00
Dan Gohman
08e60cee90 Remove -disable-fast-isel. Use cl::boolOrDefault with -fast-isel
instead.

So now: -fast-isel or -fast-isel=true enable fast-isel, and
-fast-isel=false disables it. Fast-isel is also on by default
with -fast, and off by default otherwise.

llvm-svn: 57270
2008-10-07 23:00:56 +00:00
Devang Patel
a5cda569d3 Remove OptimizeForSize global. Use function attribute optsize.
llvm-svn: 56937
2008-10-01 23:18:38 +00:00
Dan Gohman
cd111d96c6 Enable FastISel by default (on x86 and x86-64) with the -fast option.
llvm-svn: 56930
2008-10-01 20:39:19 +00:00
Dan Gohman
ed3216739e Enable DeadMachineInstructionElim when Fast-ISel is enabled.
llvm-svn: 56604
2008-09-25 01:14:49 +00:00
Dan Gohman
57dc5e1698 Refactor the code that adds standard LLVM codegen passes into
a separate function, eliminating duplication between the
add-passes-for-file and add-passes-for-machine-code code.

llvm-svn: 56599
2008-09-25 00:37:07 +00:00
Owen Anderson
2c1d54952b Use raw_ostream throughout the AsmPrinter.
llvm-svn: 55092
2008-08-21 00:14:44 +00:00
Gordon Henriksen
2cc861a6c1 Rename some GC classes so that their roll will hopefully be clearer.
In particular, Collector was confusing to implementors. Several
thought that this compile-time class was the place to implement
their runtime GC heap. Of course, it doesn't even exist at runtime.
Specifically, the renames are:

  Collector               -> GCStrategy
  CollectorMetadata       -> GCFunctionInfo
  CollectorModuleMetadata -> GCModuleInfo
  CollectorRegistry       -> GCRegistry
  Function::getCollector  -> getGC (setGC, hasGC, clearGC)

Several accessors and nested types have also been renamed to be
consistent. These changes should be obvious.

llvm-svn: 54899
2008-08-17 18:44:35 +00:00
Gordon Henriksen
e51c9eb75e Factor GC metadata table assembly generation out of Collector in preparation for splitting AsmPrinter into its own library.
llvm-svn: 54881
2008-08-17 12:56:54 +00:00
Evan Cheng
488fdf516f Don't run stack slot coloring if -fast.
llvm-svn: 52933
2008-06-30 22:33:16 +00:00
Evan Cheng
d919d1ecd8 Enable stack coloring by default.
llvm-svn: 52057
2008-06-06 19:52:44 +00:00
Evan Cheng
a9cf0ff766 Oops. Should not be enabled by default.
llvm-svn: 51953
2008-06-04 18:09:20 +00:00
Evan Cheng
2fc7954878 Add a stack slot coloring pass. Not yet enabled.
llvm-svn: 51934
2008-06-04 09:18:41 +00:00
Evan Cheng
cbb64ece8a Do not run loop-aligner at -fast (e.g. -O0).
llvm-svn: 51898
2008-06-03 06:56:08 +00:00
Evan Cheng
ee4a0719c0 Fix indentation.
llvm-svn: 51793
2008-05-30 22:39:32 +00:00
Anton Korobeynikov
74178d02d1 Unbreak JIT
llvm-svn: 50173
2008-04-23 18:26:03 +00:00
Anton Korobeynikov
b1ad6979dc Add facility for pre-RA passes
llvm-svn: 50165
2008-04-23 18:22:28 +00:00
Dale Johannesen
79633a914f Recommitting EH patch; this should answer most of the
review feedback.
-enable-eh is still accepted but doesn't do anything.
EH intrinsics use Dwarf EH if the target supports that,
and are handled by LowerInvoke otherwise.
The separation of the EH table and frame move data is,
I think, logically figured out, but either one still
causes full EH info to be generated (not sure how to
split the metadata correctly).
MachineModuleInfo::needsFrameInfo is no longer used and
is removed.

llvm-svn: 49064
2008-04-02 00:25:04 +00:00
Dale Johannesen
8813206b7f Revert 49006 for the moment.
llvm-svn: 49046
2008-04-01 20:00:57 +00:00
Dale Johannesen
fa4433be71 Emit exception handling info for functions which are
not marked nounwind, or for all functions when -enable-eh
is set, provided the target supports Dwarf EH.

llvm-gcc generates nounwind in the right places; other FEs
will need to do so also.  Given such a FE, -enable-eh should
no longer be needed.

llvm-svn: 49006
2008-03-31 23:40:23 +00:00
Dan Gohman
e7be9eea10 Avoid outputing spaces at the ends of lines.
llvm-svn: 48797
2008-03-25 21:38:12 +00:00
Devang Patel
0cfc278311 Do not align loops if optimizing for size.
llvm-svn: 48794
2008-03-25 21:03:02 +00:00
Dan Gohman
8e3c88c4e9 Use PassManagerBase instead of FunctionPassManager for functions
that merely add passes. This allows them to be used with either
FunctionPassManager or PassManager, or even with a custom new
kind of pass manager.

llvm-svn: 48256
2008-03-11 22:29:46 +00:00
Evan Cheng
ea1f2d1110 Added option -align-loops=<true/false> to disable loop aligner pass.
llvm-svn: 47736
2008-02-28 23:29:57 +00:00
Nicolas Geoffray
72fa78e195 Enable exception handling int JIT
llvm-svn: 47079
2008-02-13 18:39:37 +00:00
Chris Lattner
b067edf1b3 don't create the post-ra scheduler unless it is enabled.
llvm-svn: 45972
2008-01-14 19:00:06 +00:00
Gordon Henriksen
759ed9d805 Ammending r45669 with a missing file.
llvm-svn: 45671
2008-01-07 01:33:09 +00:00
Chris Lattner
9428a7d97f allow sinking to be enabled for the jit
llvm-svn: 45624
2008-01-05 06:14:16 +00:00
Bill Wendling
13eb1bfc08 Move option to enable machine LICM into LLVMTargetMachine.cpp.
llvm-svn: 45572
2008-01-04 08:11:03 +00:00
Chris Lattner
f4972fa569 Add a really quick hack at a machine code sinking pass, enabled with --enable-sinking.
It is missing validity checks, so it is known broken.  However, it is powerful enough
to compile this contrived code:

void test1(int C, double A, double B, double *P) {
  double Tmp = A*A+B*B;
  *P = C ? Tmp : A;
}

into:

_test1:
	movsd	8(%esp), %xmm0
	cmpl	$0, 4(%esp)
	je	LBB1_2	# entry
LBB1_1:	# entry
	movsd	16(%esp), %xmm1
	mulsd	%xmm1, %xmm1
	mulsd	%xmm0, %xmm0
	addsd	%xmm1, %xmm0
LBB1_2:	# entry
	movl	24(%esp), %eax
	movsd	%xmm0, (%eax)
	ret

instead of:

_test1:
	movsd	16(%esp), %xmm0
	mulsd	%xmm0, %xmm0
	movsd	8(%esp), %xmm1
	movapd	%xmm1, %xmm2
	mulsd	%xmm2, %xmm2
	addsd	%xmm0, %xmm2
	cmpl	$0, 4(%esp)
	je	LBB1_2	# entry
LBB1_1:	# entry
	movapd	%xmm2, %xmm1
LBB1_2:	# entry
	movl	24(%esp), %eax
	movsd	%xmm1, (%eax)
	ret

woo.

llvm-svn: 45570
2008-01-04 07:36:53 +00:00
Chris Lattner
ad9a6ccb83 Remove attribution from file headers, per discussion on llvmdev.
llvm-svn: 45418
2007-12-29 20:36:04 +00:00
Bill Wendling
c08dedb060 Initial commit of the machine code LICM pass. It successfully hoists this:
_foo:
        li r2, 0
LBB1_1: ; bb
        li r5, 0
        stw r5, 0(r3)
        addi r2, r2, 1
        addi r3, r3, 4
        cmplw cr0, r2, r4
        bne cr0, LBB1_1 ; bb
LBB1_2: ; return
        blr 

to:

_foo:
        li r2, 0
        li r5, 0
LBB1_1: ; bb
        stw r5, 0(r3)
        addi r2, r2, 1
        addi r3, r3, 4
        cmplw cr0, r2, r4
        bne cr0, LBB1_1 ; bb
LBB1_2: ; return
        blr

ZOMG!! :-)

Moar to come...

llvm-svn: 44687
2007-12-07 21:42:31 +00:00
Christopher Lamb
55a1e36013 Move subreg lowering pass to be right after regalloc, per feedback.
llvm-svn: 40548
2007-07-27 07:36:14 +00:00
Christopher Lamb
258dab5389 Add a MachineFunction pass, which runs post register allocation, that turns subreg insert/extract instruction into register copies. This ensures correct code gen if the coalescer isn't able to remove all subreg instructions.
llvm-svn: 40521
2007-07-26 08:18:32 +00:00
Evan Cheng
cdb4e7949f Added -print-emitted-asm to print out JIT generated asm to cerr.
llvm-svn: 40123
2007-07-20 21:56:13 +00:00
Dale Johannesen
1a9d304c35 Modify previous patch per review comments.
llvm-svn: 39817
2007-07-13 17:31:29 +00:00
Dale Johannesen
469ed8e17e Skeleton of post-RA scheduler; doesn't do anything yet.
Change name of -sched option and DEBUG_TYPE to
pre-RA-sched; adjust testcases.

llvm-svn: 39816
2007-07-13 17:13:54 +00:00
Duncan Sands
bfbe683782 Exception handling has been implemented.
llvm-svn: 39732
2007-07-11 16:59:20 +00:00
Chris Lattner
653c0ccfbe document and hide two options.
llvm-svn: 37651
2007-06-19 05:47:49 +00:00
Dale Johannesen
738f94210c name change requested by review of previous patch
llvm-svn: 37289
2007-05-22 18:31:04 +00:00
Dale Johannesen
fe0fe14411 Make tail merging the default, except on powerPC. There was no prior art
for a target-dependent default with a command-line override; this way
should be generally usable.

llvm-svn: 37285
2007-05-22 17:14:46 +00:00
Chris Lattner
f01b0a800b move a bunch of code out of the sdisel pass into its own opt pass "codegenprepare".
llvm-svn: 35529
2007-03-31 04:18:03 +00:00
Chris Lattner
330464a91c Add a -print-lsr-output option to LLC, to print the output of the LSR pass.
llvm-svn: 35522
2007-03-31 00:24:43 +00:00
Devang Patel
0b82378a28 Now LoopStrengthReduce is a LoopPass.
llvm-svn: 34984
2007-03-06 21:14:09 +00:00
Jim Laskey
25993e18e6 Use exception flag.
llvm-svn: 34496
2007-02-22 16:22:15 +00:00
Bill Wendling
ccf772cc6b Split the addPassesToEmitFile method up into two. This is so that we can
do some common stuff, then on our own add an object file writer (by calling
a concrete function), and then do some finishing stuff, if need be.

llvm-svn: 34032
2007-02-08 01:36:53 +00:00
Bill Wendling
4d1444725b Removed more <iostream> includes
llvm-svn: 32321
2006-12-07 20:28:15 +00:00
Chris Lattner
0d40275b0e enable the branch folding pass for the JIT.
llvm-svn: 31777
2006-11-16 01:00:07 +00:00
Jim Laskey
7e0f0b2d24 1. Add a pass to fold debug label instructions so a debug info client can detect
empty ranges.

2. Reorg how MachineDebugInfo maintains changes to debug labels.

3. Have dwarf writer use debug label info to simplify scopes and source line
coorespondence.

4. Revert the merging of compile units until I can get the bugs ironed out.

llvm-svn: 31507
2006-11-07 19:33:46 +00:00
Jim Laskey
55d57252c3 Don't do dead block elimination in fast mode.
llvm-svn: 31155
2006-10-24 16:11:49 +00:00
Chris Lattner
87d16e0ed9 add the branch folding pass as a late cleanup pass for all targets. For now
it just deletes empty MBB's.  Soon it will do more :)

llvm-svn: 30941
2006-10-13 20:45:56 +00:00
Duraid Madina
51396ffd3e add setJumpBufSize() and setJumpBufAlignment() to target-lowering.
Call these from your backend to enjoy setjmp/longjmp goodness, see
lib/Target/IA64/IA64ISelLowering.cpp for an example

llvm-svn: 30095
2006-09-04 06:21:35 +00:00
Chris Lattner
93ed29cb5d new file
llvm-svn: 30082
2006-09-04 04:16:09 +00:00