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185b548b07
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11088 Commits

Author SHA1 Message Date
Bill Wendling
185b548b07 Add encodings for VDIV and VMUL. 
llvm-svn: 116370
 2010-10-12 23:22:27 +00:00
Jim Grosbach
0038f2eec6 Be nitpicky and line up the comments. 
llvm-svn: 116365
 2010-10-12 23:14:03 +00:00
Bill Wendling
cd3cb8da45 Add encoding for VSUB and VCMP. 
Fear not! I'm going to try a refactoring right now. :)

llvm-svn: 116359
 2010-10-12 22:55:35 +00:00
Bill Wendling
fad2800dbd Don't need to specify calling convention. Add 'readnone' to functions. 
llvm-svn: 116354
 2010-10-12 22:24:10 +00:00
Bill Wendling
33a26354c1 Encoding for VADDD. Plus a test for the VFP instructions. 
llvm-svn: 116348
 2010-10-12 22:08:41 +00:00
Jim Grosbach
10d9bbe0ca Add encoding information for the remainder of the generic arithmetic 
ARM instructions.

llvm-svn: 116313
 2010-10-12 17:11:26 +00:00
Dan Gohman
8dc9781a91 Add a simple testcase for tbaa. 
llvm-svn: 116272
 2010-10-11 23:54:13 +00:00
Jim Grosbach
29ef87e765 MC machine encoding for simple aritmetic instructions that use a shifted 
register operand.

llvm-svn: 116259
 2010-10-11 23:16:21 +00:00
Andrew Trick
5361f35978 PR8297 
llvm-svn: 116223
 2010-10-11 21:08:42 +00:00
Jakob Stoklund Olesen
a0a5015a35 PowerPC varargs functions store live-in registers on the stack. Make sure we use 
virtual registers for those stores since RegAllocFast requires that each live
physreg only be used once.

This fixes PR8357.

llvm-svn: 116222
 2010-10-11 20:43:09 +00:00
Eric Christopher
fa961e31b1 Found a bug turning this on by default. Disable again for now. 
llvm-svn: 116220
 2010-10-11 20:26:21 +00:00
Eric Christopher
b477aa7c6f Remove now non-existent option. 
llvm-svn: 116219
 2010-10-11 20:21:21 +00:00
Andrew Trick
5704a15e36 Fixes bug 8297: i386 cmpxchg8b, missing MachineMemOperand 
llvm-svn: 116214
 2010-10-11 19:02:04 +00:00
Chris Lattner
c9709f154d Per discussion with Sanjiv, remove the PIC16 target from mainline. When/if 
it comes back, it will be largely a rewrite, so keeping the old codebase
in tree isn't helping anyone.

llvm-svn: 116190
 2010-10-11 05:44:40 +00:00
Michael J. Spencer
8f7251a0e9 X86: MinGW should always use libgcc on Windows. 
llvm-svn: 116177
 2010-10-10 23:11:06 +00:00
Michael J. Spencer
b13cb4dd72 X86: Call _alldiv instead of __divdi3 on Windows (excluding cygwin). 
llvm-svn: 116174
 2010-10-10 22:04:34 +00:00
Chris Lattner
307552613d force a triple, varargs isn't supported with the SVR4 ABI the buildbot tells me. 
llvm-svn: 116170
 2010-10-10 18:59:01 +00:00
Chris Lattner
2b428a0ab8 fix the expansion of va_arg instruction on PPC to know the arg 
alignment for PPC32/64, avoiding some masking operations.

llvm-gcc expands vaarg inline instead of using the instruction
so it has never hit this.

llvm-svn: 116168
 2010-10-10 18:34:00 +00:00
Kenneth Uildriks
e9771f15f7 Now using a variant of the existing inlining heuristics to decide whether to create a given specialization of a function in PartialSpecialization. If the total performance bonus across all callsites passing the same constant exceeds the specialization cost, we create the specialization. 
llvm-svn: 116158
 2010-10-09 22:06:36 +00:00
Michael J. Spencer
56d81e7eae MC-COFF: Fix .bss section size. Fixes PR8335. Patch by NAKAMUTA Takumi! 
llvm-svn: 116155
 2010-10-09 16:04:45 +00:00
Benjamin Kramer
f2d65aee82 Don't test a removed function. 
llvm-svn: 116154
 2010-10-09 15:53:25 +00:00
Michael J. Spencer
4dc462314c MC-COFF: Implement InitSections. Fixes PR8335. 
llvm-svn: 116151
 2010-10-09 15:44:27 +00:00
Michael J. Spencer
9e8793d7d6 MC-COFF: Add COFFAsmParser. Completes PR8343. 
llvm-svn: 116150
 2010-10-09 11:01:07 +00:00
Evan Cheng
15fc769cf2 Correct some load / store instruction itinerary mistakes: 
1. Cortex-A8 load / store multiplies can only issue on ALU0.
2. Eliminate A8_Issue, A8_LSPipe will correctly limit the load / store issues.
3. Correctly model all vld1 and vld2 variants.

llvm-svn: 116134
 2010-10-09 01:03:04 +00:00
Bill Wendling
59895ff813 Simplify test and move into a generic "crash" ll file. 
llvm-svn: 116130
 2010-10-09 00:29:04 +00:00
Bill Wendling
ba58fb0f42 Check to make sure that the iterator isn't at the beginning of the basic block 
before decrementing. <rdar://problem/8529919>

llvm-svn: 116126
 2010-10-09 00:03:48 +00:00
Jim Grosbach
3075d28c15 Implement a few more binary encoding bits. Still very early stage proof-of- 
concept level stuff at this point, but it is generally working for those
instructions that know how to map the operands.

This patch fills in the register operands for add/sub/or/etc instructions
and adds the conditional execution predicate encoding.

llvm-svn: 116112
 2010-10-08 21:45:55 +00:00
Rafael Espindola
bfd3c31acf Call InitSections in llc and clang so that the binaries produced by them 
are easier to diff with those produced by llvm-mc.

llvm-svn: 116095
 2010-10-08 19:37:38 +00:00
Cameron Esfahani
664317d6cd Recommit 116056, now with the missing file... 
llvm-svn: 116083
 2010-10-08 19:24:18 +00:00
Andrew Trick
0d8a3d67e0 reverting 116056: win64_params.ll may need to be conditionalized? 
llvm-svn: 116063
 2010-10-08 17:22:42 +00:00
Cameron Esfahani
a9f8bb1356 Small patch to restore home register stack space allocation for the Win64 case. Add test case. This code eventually needs to be tighter, since it's always allocating it, even in leaf routines. 
llvm-svn: 116056
 2010-10-08 10:31:30 +00:00
Bob Wilson
8689a52c10 Change register allocation order for ARM VFP and NEON registers to put the 
callee-saved registers at the end of the lists.  Also prefer to avoid using
the low registers that are in register subclasses required by certain
instructions, so that those registers will more likely be available when needed.
This change makes a huge improvement in spilling in some cases.  Thanks to
Jakob for helping me realize the problem.

Most of this patch is fixing the testsuite.  There are quite a few places
where we're checking for specific registers.  I changed those to wildcards
in places where that doesn't weaken the tests.  The spill-q.ll and
thumb2-spill-q.ll tests stopped spilling with this change, so I added a bunch
of live values to force spills on those tests.

llvm-svn: 116055
 2010-10-08 06:15:13 +00:00
Chris Lattner
761f40f7ee testcase that goes with r116053 
llvm-svn: 116054
 2010-10-08 05:12:30 +00:00
Chris Lattner
c77216343c rename test 
llvm-svn: 116052
 2010-10-08 05:05:06 +00:00
Chris Lattner
c694d80729 merge tests 
llvm-svn: 116051
 2010-10-08 05:04:58 +00:00
Chris Lattner
79fbe67839 filecheckize. 
llvm-svn: 116050
 2010-10-08 05:02:29 +00:00
Chris Lattner
82ce325f16 reapply: Use the new TB_NOT_REVERSABLE flag instead of special 
reapply: reimplement the second half of the or/add optimization.  We should now

with no changes.  Turns out that one missing "Defs = [EFLAGS]" can upset things
a bit.

llvm-svn: 116040
 2010-10-08 03:57:25 +00:00
Michael J. Spencer
3725cf3d21 Fix Formatting. 
llvm-svn: 116038
 2010-10-08 03:17:21 +00:00
Michael J. Spencer
bdf3b8770f MC-COFF: Fix Simple and Complex type. Fixes PR8320. 
llvm-svn: 116037
 2010-10-08 03:17:11 +00:00
Daniel Dunbar
983fae5a86 Revert "reimplement the second half of the or/add optimization. We should now", 
which depends on r116007, which I am about to revert.

llvm-svn: 116031
 2010-10-08 02:07:26 +00:00
Chris Lattner
7577cb7b49 reimplement the second half of the or/add optimization. We should now 
only end up emitting LEA instead of OR.  If we aren't able to promote
something into an LEA, we should never be emitting it as an ADD.

Add some testcases that we emit "or" in cases where we used to produce
an "add".

llvm-svn: 116026
 2010-10-08 01:05:10 +00:00
Jim Grosbach
edbbf33203 Add test file for simple ARM binary encodings with MC 
llvm-svn: 116024
 2010-10-08 00:47:59 +00:00
Michael J. Spencer
452789b5c0 MC-COFF: Add test for my last commit. 
llvm-svn: 116015
 2010-10-08 00:00:28 +00:00
Devang Patel
35201e0fd6 Remove LoopIndexSplit pass. It is neither maintained nor used by anyone. 
llvm-svn: 116004
 2010-10-07 23:29:37 +00:00
Chris Lattner
bd89233607 convert cmp to use a multipattern 
llvm-svn: 115978
 2010-10-07 20:56:25 +00:00
Evan Cheng
7c89d70f27 Canonicalize X86ISD::MOVDDUP nodes to v2f64 to make sure all cases match. Also eliminate unneeded isel patterns. rdar://8520311 
llvm-svn: 115977
 2010-10-07 20:50:20 +00:00
Michael J. Spencer
85094f7689 MC-COFF: Fix symbol aliases. Fixes PR8251. 
llvm-svn: 115909
 2010-10-07 06:29:33 +00:00
Michael J. Spencer
b6c9623247 test: Fix binary stdin issues with coff-dump on Windows. 
llvm-svn: 115908
 2010-10-07 06:29:21 +00:00
Jim Grosbach
1e2566c20d Allow use of the 16-bit literal move instruction in CMOVs for ARM mode. 
llvm-svn: 115884
 2010-10-07 00:42:42 +00:00
Rafael Espindola
ed469a30f0 Get binding and visibility info from the the alias, but Type from the symbol 
being aliased.

llvm-svn: 115836
 2010-10-06 21:02:29 +00:00