RPCS3/llvm-mirror
1
0
Fork 0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-10-29 23:12:55 +01:00
Code Issues Projects Releases Wiki Activity
22,345 Commits 4 Branches 5 Tags 704 MiB
186b5f0887
Commit Graph

461 Commits

Author SHA1 Message Date
Chris Lattner
769e683663 treat conditional branches the same way as conditional moves (giving them 
an operand that contains the condcode), making things significantly simpler.

llvm-svn: 25840
 2006-01-31 06:56:30 +00:00
Chris Lattner
a999c688d5 compactify all of the integer conditional moves into one instruction that takes 
a CC as an operand.  Much smaller, much happier.

llvm-svn: 25839
 2006-01-31 06:49:09 +00:00
Chris Lattner
5aade7535c Add immediate forms of integer cmovs 
llvm-svn: 25838
 2006-01-31 06:24:29 +00:00
Chris Lattner
c1b80cb2fe Shrinkify 
llvm-svn: 25837
 2006-01-31 06:18:16 +00:00
Chris Lattner
fcd00875a9 Add the full complement of conditional moves of integer registers. 
llvm-svn: 25834
 2006-01-31 05:26:36 +00:00
Chris Lattner
9d29548015 Compile this: 
void %X(int %A) {
        %C = setlt int %A, 123          ; <bool> [#uses=1]
        br bool %C, label %T, label %F

T:              ; preds = %0
        call int %main( int 0 )         ; <int>:0 [#uses=0]
        ret void

F:              ; preds = %0
        ret void
}

to this:

X:
        save -96, %o6, %o6
        subcc %i0, 122, %l0
        bg .LBBX_2      ! F
        nop
...

not this:

X:
        save -96, %o6, %o6
        sethi 0, %l0
        or %g0, 1, %l1
        subcc %i0, 122, %l2
        bg .LBBX_4      !
        nop
.LBBX_3:        !
        or %g0, %l0, %l1
.LBBX_4:        !
        subcc %l1, 0, %l0
        bne .LBBX_2     ! F
        nop

llvm-svn: 25833
 2006-01-31 05:05:52 +00:00
Chris Lattner
213a7b78fb I don't see why this optimization isn't safe, but it isn't, so disable it 
llvm-svn: 25829
 2006-01-31 02:45:52 +00:00
Chris Lattner
3ae06dac75 Fix FP constants, and the SparcV8/2006-01-22-BitConvertLegalize.ll failure from last night 
llvm-svn: 25819
 2006-01-30 22:20:49 +00:00
Chris Lattner
baa47e9a6e Revamp the ICC/FCC reading instructions to be parameterized in terms of the 
SPARC condition codes, not in terms of the DAG condcodes.  This allows us to
write nice clean patterns for cmovs/branches.

llvm-svn: 25815
 2006-01-30 07:43:04 +00:00
Chris Lattner
7925da8b3b Compile: 
uint %test(uint %X) {
        %Y = call uint %llvm.ctpop.i32(uint %X)
        ret uint %Y
}

to:

test:
        save -96, %o6, %o6
        sll %i0, 0, %l0
        popc %l0, %i0
        restore %g0, %g0, %g0
        retl
        nop

instead of to 40 logical ops.  Note the shift-by-zero that clears the top
part of the 64-bit V9 register.

Testcase here: CodeGen/SparcV8/ctpop.ll

llvm-svn: 25814
 2006-01-30 06:14:02 +00:00
Chris Lattner
0c7df7e9d1 If the target has V9 instructions, this pass is a noop, don't bother 
running it.

llvm-svn: 25811
 2006-01-30 05:51:14 +00:00
Chris Lattner
69658ab9a8 When in v9 mode, emit fabsd/fnegd/fmovd 
llvm-svn: 25810
 2006-01-30 05:48:37 +00:00
Chris Lattner
98667e5f6a First step towards V9 instructions in the V8 backend, two conditional move 
patterns.  This allows emission of this code:

t1:
        save -96, %o6, %o6
        subcc %i0, %i1, %l0
        move %icc, %i0, %i2
        or %g0, %i2, %i0
        restore %g0, %g0, %g0
        retl
        nop

instead of this:

t1:
        save -96, %o6, %o6
        subcc %i0, %i1, %l0
        be .LBBt1_2     !
        nop
.LBBt1_1:       !
        or %g0, %i2, %i0
.LBBt1_2:       !
        restore %g0, %g0, %g0
        retl
        nop

for this:

int %t1(int %a, int %b, int %c) {
        %tmp.2 = seteq int %a, %b
        %tmp3 = select bool %tmp.2, int %a, int %c
        ret int %tmp3
}

llvm-svn: 25809
 2006-01-30 05:35:57 +00:00
Chris Lattner
8b5958a832 Two changes: 
1. Default to having V9 instructions, instead of just V8.
2. unless -enable-sparc-v9-insts is passed, disable V9 (for use with llcbeta)

llvm-svn: 25807
 2006-01-30 04:57:43 +00:00
Chris Lattner
f0ea60bc01 When lowering SELECT_CC, see if the input is a lowered SETCC. If so, fold 
the two operations together.  This allows us to compile this:

void %two(int %a, int* %b) {
        %tmp.2 = seteq int %a, 0
        %tmp.0.0 = select bool %tmp.2, int 10, int 20
        store int %tmp.0.0, int* %b
        ret void
}

into:

two:
        save -96, %o6, %o6
        or %g0, 20, %l0
        or %g0, 10, %l1
        subcc %i0, 0, %l2
        be .LBBtwo_2    ! entry
        nop
.LBBtwo_1:      ! entry
        or %g0, %l0, %l1
.LBBtwo_2:      ! entry
        st %l1, [%i1]
        restore %g0, %g0, %g0
        retl
        nop

instead of:

two:
        save -96, %o6, %o6
        sethi 0, %l0
        or %g0, 1, %l1
        or %g0, 20, %l2
        or %g0, 10, %l3
        subcc %i0, 0, %l4
        be .LBBtwo_2    ! entry
        nop
.LBBtwo_1:      ! entry
        or %g0, %l0, %l1
.LBBtwo_2:      ! entry
        subcc %l1, 0, %l0
        bne .LBBtwo_4   ! entry
        nop
.LBBtwo_3:      ! entry
        or %g0, %l2, %l3
.LBBtwo_4:      ! entry
        st %l3, [%i1]
        restore %g0, %g0, %g0
        retl
        nop

llvm-svn: 25806
 2006-01-30 04:34:44 +00:00
Chris Lattner
a44182300b Move MaskedValueIsZero from the DAGCombiner to the TargetLowering interface,making isMaskedValueZeroForTargetNode simpler, and useable from other partsof the compiler. 
llvm-svn: 25803
 2006-01-30 04:09:27 +00:00
Chris Lattner
354340b1b1 Implement isMaskedValueZeroForTargetNode for the various v8 selectcc nodes, 
allowing redundant and's to be eliminated by the dag combiner.

llvm-svn: 25800
 2006-01-30 03:51:45 +00:00
Chris Lattner
ab3ad7d4ef Use V8ISD::CALL instead of ISD::CALL 
llvm-svn: 25716
 2006-01-27 23:30:03 +00:00
Chris Lattner
c245c32022 initialize member vars 
llvm-svn: 25712
 2006-01-27 22:38:36 +00:00
Nate Begeman
d2c6fbef4a Remove TLI.LowerReturnTo, and just let targets custom lower ISD::RET for 
the same functionality.  This addresses another piece of bug 680.  Next,
on to fixing Alpha VAARG, which I broke last time.

llvm-svn: 25696
 2006-01-27 21:09:22 +00:00
Evan Cheng
77885c204d Subtarget feature can now set any variable to any value 
llvm-svn: 25678
 2006-01-27 08:09:42 +00:00
Chris Lattner
20d4194a0d PHI and INLINEASM are now built-in instructions provided by Target.td 
llvm-svn: 25674
 2006-01-27 01:46:15 +00:00
Chris Lattner
0204d70798 Rest of subtarget support, remove references to ppc 
llvm-svn: 25642
 2006-01-26 07:22:22 +00:00
Chris Lattner
eb424bfbca Add trivial subtarget support 
llvm-svn: 25641
 2006-01-26 06:51:21 +00:00
Evan Cheng
7da6daadc7 Set SchedulingForLatency to be the default scheduling preference for all. 
llvm-svn: 25607
 2006-01-25 18:52:42 +00:00
Nate Begeman
c29fac7fce First part of bug 680: 
Remove TLI.LowerVA* and replace it with SDNodes that are lowered the same
way as everything else.

llvm-svn: 25606
 2006-01-25 18:21:52 +00:00
Evan Cheng
c368fb710f Default scheduling preference is SchedulingForLatency. 
llvm-svn: 25603
 2006-01-25 09:15:54 +00:00
Chris Lattner
39bdbf2ad2 remove the V8 simple isel 
llvm-svn: 25534
 2006-01-23 07:20:15 +00:00
Chris Lattner
aafc339b4e Add explicit #includes of <iostream> 
llvm-svn: 25515
 2006-01-22 23:41:00 +00:00
Chris Lattner
adff158fbd Add explicit #includes of <iostream> 
llvm-svn: 25509
 2006-01-22 22:53:01 +00:00
Chris Lattner
b15de45374 implement support for f32 arguments past the first 6 words 
llvm-svn: 25450
 2006-01-19 07:22:29 +00:00
Chris Lattner
1a1c43d70c Silly Sparc is big endian. If we have to load args out of incoming stack slots 
that are smaller than an int, make sure to adjust the frame pointer to take
this into consideration.

llvm-svn: 25351
 2006-01-16 01:40:00 +00:00
Chris Lattner
f71df454df Make sure that bool,byte and short arguments are the right type when loaded 
from memory.

llvm-svn: 25346
 2006-01-15 22:22:01 +00:00
Chris Lattner
9ab5b7adad Disable a broken optimization 
llvm-svn: 25340
 2006-01-15 19:15:46 +00:00
Chris Lattner
a91c75e676 Don't print a label for the first MBB in a function. 
Compile this:

%_2E_str_8 = external global [75 x sbyte]
implementation   ; Functions:
declare int %printf(sbyte*, ...)
void %test()
        %tmp.101 = call int (sbyte*, ...)* %printf( sbyte* getelementptr ([75 x sbyte]* %_2E_str_8, int 0, int 0) )             ; <int> [#uses=0]
        unreachable
}

to this:

main_endif_2E_8:
        save -96, %o6, %o6
        sethi %hi(_2E_str_8), %l0
        add %l0, %lo(_2E_str_8), %o0
        call printf
        nop

instead of this:

main_endif_2E_8:
        save -96, %o6, %o6
        sethi %hi(_2E_str_8), %l0
        or %g0, %lo(_2E_str_8), %l1   ;; extra instruction
        add %l1, %l0, %o0
        call printf
        nop

llvm-svn: 25335
 2006-01-15 09:26:27 +00:00
Chris Lattner
ada619f3b6 Have legalize take care of DYNAMIC_STACKALLOC for us, implement llvm.stacksave/stackrestore. 
llvm-svn: 25332
 2006-01-15 08:55:25 +00:00
Chris Lattner
d8711c673d Implement DYNAMIC_STACKALLOC for V8 
llvm-svn: 25330
 2006-01-15 08:43:57 +00:00
Chris Lattner
241b08f64d reorder passes 
llvm-svn: 25326
 2006-01-15 07:19:53 +00:00
Nate Begeman
85b2dc0c4e bswap implementation 
llvm-svn: 25312
 2006-01-14 03:14:10 +00:00
Chris Lattner
80fed2d66e expand unsupported stacksave/stackrestore nodes 
llvm-svn: 25272
 2006-01-13 02:42:53 +00:00
Chris Lattner
1f1d6eb6a9 Fix branches on FP compares 
llvm-svn: 25249
 2006-01-12 17:05:32 +00:00
Chris Lattner
03fcd99728 fix a bug in my previous checkin 
llvm-svn: 25244
 2006-01-12 07:38:04 +00:00
Chris Lattner
07bdb6319b Give V8ISD nodes symbolic names in dumps 
llvm-svn: 25243
 2006-01-12 07:31:15 +00:00
Chris Lattner
7592fe2d86 invert the sense of this switch and its name 
llvm-svn: 25234
 2006-01-12 01:28:56 +00:00
Nate Begeman
cff96008ac Add bswap, rotl, and rotr nodes 
Add dag combiner code to recognize rotl, rotr
Add ppc code to match rotl

Targets should add rotl/rotr patterns if they have them

llvm-svn: 25222
 2006-01-11 21:21:00 +00:00
Chris Lattner
8dd97ae338 This is no longer needed 
llvm-svn: 25219
 2006-01-11 19:52:46 +00:00
Chris Lattner
1ffbbc9ebc Use Evan's outflag stuff to implement V8cmpicc. This allows us to write a 
pattern for SUBCCrr, and makes it trivial to add support for SUBCCri, eliminating
an instruction in the common "setcc X, imm" case.

llvm-svn: 25212
 2006-01-11 07:49:38 +00:00
Chris Lattner
c2bd047226 Fix a bug in i32->f64 conversion lowering 
llvm-svn: 25211
 2006-01-11 07:27:40 +00:00
Chris Lattner
34c4cddb14 Unbreak ret void :-/ 
llvm-svn: 25210
 2006-01-11 07:15:43 +00:00
Chris Lattner
d9b3f6a3df Write this pattern in canonical form, allowing more patterns to match. 
This implements Regression/CodeGen/SparcV8/xnor.ll

llvm-svn: 25209
 2006-01-11 07:14:01 +00:00