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Commit Graph

3120 Commits

Author SHA1 Message Date
Alp Toker
f3e1a22860 Fix typos
llvm-svn: 202107
2014-02-25 04:21:15 +00:00
Saleem Abdulrasool
e129b591f0 Asm Parser: support .error directive
The .error directive is similar to .err in that it will halt assembly if it is
evaluated for assembly.  However, it permits a user supplied message to be
rendered.

llvm-svn: 201999
2014-02-23 23:02:23 +00:00
Saleem Abdulrasool
72c71c83fc AsmParser: support .ifeqs directive
The .ifeqs directive assembles the following code if the quoted string
parameters are equal.  The strings must be quoted using double quotes.

llvm-svn: 201998
2014-02-23 23:02:18 +00:00
Saleem Abdulrasool
05ca7814d9 ARM IAS: support .align without parameters
.align is handled specially on certain targets.  .align without any parameters
on ARM indicates a default alignment (4).  Handle the special case in the target
parser, but fall back to the generic parser for the normal version.

llvm-svn: 201988
2014-02-23 17:45:32 +00:00
Saleem Abdulrasool
d5860dd600 MCAsmParser: support .ifne
The .ifne directive assembles the following section of code if the argument
expression is non-zero.  Effectively, it is equivalent to if.

llvm-svn: 201986
2014-02-23 15:53:41 +00:00
Saleem Abdulrasool
17ad744c96 MCAsmParser: handle space properly for .ifc/.ifnc
If the strings are not quoted, the first string stops at the first comma, and
the second string stops at the end of the line.  Strings which contain
whitespace should be quoted.  Unquoted space is to be discarded.

llvm-svn: 201985
2014-02-23 15:53:36 +00:00
Saleem Abdulrasool
e868833740 MCAsmParser: add support for .err directive
The .err directive produces an error whenever it is assembled.  This can be
useful for preventing assembly when an unexpected condition occurs.

llvm-svn: 201984
2014-02-23 15:53:30 +00:00
Saleem Abdulrasool
39ff879a52 ARM IAS: support .short and .hword
This adds support for the .short and its alias .hword for adding literal values
into the object file.  This is similar to the .word directive, however, rather
than inserting a value of 4 bytes, adds a 2-byte value.

llvm-svn: 201968
2014-02-23 06:22:09 +00:00
Nico Rieck
f53974774a MC: Support COFF string tables larger than 10MB
Offsets past the range of single-slash encoding are encoded as base64,
padded to 6 characters, and prefixed with two slashes. This encoding is
undocumented but used by MSVC.

llvm-svn: 201940
2014-02-22 16:12:20 +00:00
Daniel Sanders
1f73ab934b [mips] Make it impossible to have UnknownABI in CodeGen and Integrated Assembler.
Summary:
This removes the need to coerce UnknownABI to the default ABI (O32 for
MIPS32, N64 for MIPS64 [*]) in both MipsSubtarget and MipsAsmParser.

Clang has been updated to disable both possible default ABI's before enabling
the ABI it intends to use.

[*] N64 being the default for MIPS64 is not actually correct.
    However N32 is not fully implemented/tested yet.

Depends on: D2830

Reviewers: jacksprat, matheusalmeida

Reviewed By: matheusalmeida

Differential Revision: http://llvm-reviews.chandlerc.com/D2832
Differential Revision: http://llvm-reviews.chandlerc.com/D2846

llvm-svn: 201792
2014-02-20 14:58:19 +00:00
Benjamin Kramer
6492a4878f AsmParser: Disable Darwin-style macro argument expansion on non-darwin targets.
There is code in the wild that relies on $0 not being expanded.

llvm-svn: 201784
2014-02-20 13:36:32 +00:00
Elena Demikhovsky
af8e1ef280 AVX-512: Assembly parsing of broadcast semantic in AVX-512; imlemented by Nis Zinovy (zinovy.y.nis@intel.com)
Fixed truncate i32 to i1; a test will be provided in the next commit.

llvm-svn: 201757
2014-02-20 06:34:39 +00:00
Daniel Sanders
b0b9c3767b [mips] Add explicit N32 and N64 tests to nabi-regs.s test
llvm-svn: 201684
2014-02-19 15:30:54 +00:00
Craig Topper
de3c74571e Remove special FP opcode maps and instead add enough MRM_XX formats to handle all the FP operations. This increases format by 1 bit, but decreases opcode map by 1 bit so the TSFlags size doesn't change.
llvm-svn: 201649
2014-02-19 08:25:02 +00:00
Craig Topper
5b20c52fcc Remove A6/A7 opcode maps. They can all be handled with a TB map, opcode of 0xa6/0xa7, and adding MRM_C0/MRM_E0 forms. Removes 376K from the disassembler tables.
llvm-svn: 201641
2014-02-19 05:34:21 +00:00
Saleem Abdulrasool
27ee2a5853 MCAsmParser: support required parameters
This enhances the macro parser to parse and handle parameter qualifications,
which is needed to support required formal parameters in macro definitions.  A
required parameter may not be defaulted (though providing a default value is
accepted with a warning).  This improves GAS compatibility.

Partially addresses PR9248.

llvm-svn: 201630
2014-02-19 03:00:29 +00:00
Kevin Enderby
0a635e7acf Fix the arm assembler so that this malformed instruction:
ldrd r6, r7 [r2, #15]
simply gives an error and does not triggers an assertion.

As Jim points out, the diagnostic is really strange here,
but fixing that would be more complicated. The missing
comma results in the parser expecting a construct like r2[2],
which is the vector index thing the error message is talking
about. That's not what the user intended, though, and there's
nothing else in the instruction that looks at all like a vector.
Yet more fallout from not having a real parser here and trying
to do context-free generic matching for addressing modes.

rdar://15097243

llvm-svn: 201531
2014-02-17 21:45:27 +00:00
Anders Waldenborg
81a09cf058 Add support for assigning to . in AsmParser.
This is implemented by handling assignments to the '.' pseudo symbol
as ".org" directives.

Differential Revision: http://llvm-reviews.chandlerc.com/D2625

llvm-svn: 201530
2014-02-17 20:48:32 +00:00
Craig Topper
3e74ac0d93 Fix diassembler handling of rex.b when mod=00/01/10 and bbb=101. Mod=00 should ignore the base register entirely. Mod=01/10 should treat this as R13 plus displacment. Fixes PR18860.
llvm-svn: 201507
2014-02-17 10:03:43 +00:00
Saleem Abdulrasool
dc9bca333a MCAsmParser: add some mixed argument tests
Add some tests to explicitly validate handling of comma and non-comma separated
arguments.

llvm-svn: 201500
2014-02-17 00:40:22 +00:00
Saleem Abdulrasool
31abfcc09f MCAsmParser: better handling for named arguments
Until this point only macro definition with named parameters were parsed but the
names were ignored.  This adds support for using that information for named
parameter instantiation.

In order to support the full semantics of the keyword arguments, the arguments
are no longer lazily initialised since the keyword arguments can be specified
out of order and partially if they are defaulted.  Prepopulate the arguments
with the default value for any defaulted parameters, and then parse the
specified arguments.

This simplies some of the handling of the arguments in the inner loop since
empty arguments simply increment the parameter index and move on.

Note that keyword and positional arguments cannot be mixed.

llvm-svn: 201499
2014-02-17 00:40:17 +00:00
Nico Rieck
02b2fbee0d Fix broken CHECK lines
llvm-svn: 201479
2014-02-16 07:31:05 +00:00
Saleem Abdulrasool
1ab302ffd6 MCAsmParser: relax declaration parsing
The Linux kernel defines empty macros for compatibility with ARM UAL syntax.
The comma after the name is optional, and if present can be safely lexed.  This
improves compatibility with the GNU assembler.

llvm-svn: 201474
2014-02-16 04:56:31 +00:00
Saleem Abdulrasool
f0e7fa2121 ARM IAS: (partially) support .arch_extension directive
This adds a partial implementation of the .arch_extension directive to the
integrated ARM assembler.  There are a number of limitations to this
implementation arising from the target backend support rather than the
implementation itself.  Namely, iWMMXT (v1 and v2), Maverick, and XScale support
is not present in the ARM backend.  Currently, there is no check for A-class
only (needed for virt), and no ARMv6k detection (needed for os and sec).  The
remainder of the extensions are fully supported.

llvm-svn: 201471
2014-02-16 00:16:41 +00:00
Craig Topper
17b586d7c5 Add opcode extension forms of MOV8ri/MOV16ri/MOV32ri.
llvm-svn: 201463
2014-02-15 07:29:18 +00:00
Diego Novillo
eb4175295c Support DWARF discriminators in object streamer.
Summary:
This adds support for emitting DWARF path discriminator values in
the object streamer. It also changes the DWARF dumper to show
discriminator values in the line table output.

Reviewers: echristo

CC: llvm-commits

Differential Revision: http://llvm-reviews.chandlerc.com/D2794

llvm-svn: 201427
2014-02-14 19:27:53 +00:00
Diego Novillo
9f753a3e86 Simplify checks in MC/AsmParser/directive_loc.s
llvm-svn: 201361
2014-02-13 20:16:42 +00:00
Diego Novillo
26a166f74b Fix generation of 'isa' and 'discriminator' keywords.
Summary:
There should be a space before each of these two keywords to avoid
generating invalid assembly files.

NOTE: I could not find an obvious maintainers in CODE_OWNERS.TXT, but
      this seems related to debug info.

Reviewers: echristo

CC: llvm-commits

Differential Revision: http://llvm-reviews.chandlerc.com/D2791

llvm-svn: 201359
2014-02-13 20:05:03 +00:00
Jim Grosbach
de38e9caf1 Tidy up a bit. Formatting only.
llvm-svn: 201174
2014-02-11 20:48:41 +00:00
Jim Grosbach
c13fd8cf77 ARM: Thumb2 LDR(literal) can target SP.
Fix a slightly overzealous destination register restriction for the
'without .w' alias. Add some explicit testcases.

rdar://16033140

llvm-svn: 201173
2014-02-11 20:48:39 +00:00
Elena Demikhovsky
ac4dfca982 AVX-512: Optimized BUILD_VECTOR pattern;
fixed encoding of VEXTRACTPS instruction.

llvm-svn: 201134
2014-02-11 07:25:59 +00:00
Chad Rosier
a434e7ab2c [AArch64] Handle aliases of conditional branches without b.pred form.
llvm-svn: 201091
2014-02-10 15:43:11 +00:00
Matheus Almeida
a37a49cc06 [mips][msa] Add DLSA instruction.
llvm-svn: 201081
2014-02-10 12:05:17 +00:00
Craig Topper
5f3cd9c3a9 Recommit r201059 and r201060 with hopefully a fix for its original failure.
Original commits messages:

Add MRMXr/MRMXm form to X86 for use by instructions which treat the 'reg' field of modrm byte as a don't care value. Will allow for simplification of disassembler code.

Simplify a bunch of code by removing the need for the x86 disassembler table builder to know about extended opcodes. The modrm forms are sufficient to convey the information.

llvm-svn: 201065
2014-02-10 06:55:41 +00:00
Benjamin Kramer
dd9c671cdc AsmParser: Parse (and ignore) nested .macro definitions.
This enables a slightly odd feature of gas. The macro is defined when
the outermost macro is instantiated.

PR18599

llvm-svn: 201045
2014-02-09 16:22:00 +00:00
Saleem Abdulrasool
832f6bfd62 ARM: change attribute tests to use parsed form
This makes the tests more readable by using the -arm-attributes decoding support
in llvm-readobj since that is now available.  Change the invocation commands to
be similar to other test and use a more precise triple (the tests only require
ARM EABI support).

llvm-svn: 201029
2014-02-08 23:17:02 +00:00
Renato Golin
9fd4f091dc Remove -arm-disable-ehabi option
llvm-svn: 200988
2014-02-07 20:12:49 +00:00
Sasa Stankovic
deee198fc2 Changed comment.
llvm-svn: 200969
2014-02-07 11:16:02 +00:00
Venkatraman Govindaraju
b3d477bcf8 [Sparc] Add support for parsing synthetic instruction 'mov'.
llvm-svn: 200965
2014-02-07 09:06:52 +00:00
Venkatraman Govindaraju
772dbc91ad [Sparc] Emit correct encoding for atomic instructions. Also, add support for parsing CAS instructions to test the CAS encoding.
llvm-svn: 200963
2014-02-07 07:34:49 +00:00
Kevin Enderby
de9b7be909 Update the X86 assembler for .intel_syntax to accept
the << and >> bitwise operators.

rdar://15975725

llvm-svn: 200896
2014-02-06 01:21:15 +00:00
Logan Chien
0d1789c768 ARM: Resolve thumb_bl fixup in same MCFragment.
In Thumb1 mode, bl instruction might be selected for branches between
basic blocks in the function if the offset is greater than 2KB.
However, this might cause SEGV because the destination symbol
is not marked as thumb function and the execution mode will be reset
to ARM mode.

Since we are sure that these symbols are in the same data fragment, we
can simply resolve these local symbols, and don't emit any relocation
information for this bl instruction.

llvm-svn: 200842
2014-02-05 14:15:16 +00:00
Elena Demikhovsky
20652531de AVX-512: fixed a bug in EVEX encoding (the bug appeared after r200624)
llvm-svn: 200837
2014-02-05 13:03:01 +00:00
Petar Jovanovic
615b3679ca [mips] Implement %hi(sym1 - sym2) and %lo(sym1 - sym2) expressions
Patch implements %hi(sym1 - sym2) and %lo(sym1 - sym2) expressions for MIPS
by creating target expression class MipsMCExpr.

Patch by Sasa Stankovic.

Differential Revision: http://llvm-reviews.chandlerc.com/D2592

llvm-svn: 200783
2014-02-04 18:41:57 +00:00
David Woodhouse
29e7c4248c MC: Fix .octa output for APInts with BitWidth > 128
llvm-svn: 200615
2014-02-01 16:52:33 +00:00
David Woodhouse
03ba7e20e4 MC: Add support for .octa
This is a minimal implementation which accepts only constants rather than
full expressions, but that should be perfectly sufficient for all known
users for now.

Patch from PaX Team <pageexec@freemail.hu>

llvm-svn: 200614
2014-02-01 16:20:59 +00:00
David Majnemer
7af1524404 Update a .fill test to use the updated semantics.
Something funny happened, this should've been part of r200606.

llvm-svn: 200607
2014-02-01 07:36:52 +00:00
David Majnemer
9b4ef71ec8 MC: Improve the .fill directive's compatibility with GAS
Per the GAS documentation, .fill should permit pattern widths that
aren't a power of two. While I was in the neighborhood, I added some
sanity checking. This change was motivated by a use of this construct
in the Linux Kernel.

llvm-svn: 200606
2014-02-01 07:19:38 +00:00
Rafael Espindola
7ed26bece7 Remove another hasRawTextSupport.
To remove this one simply move the end of file logic from the asm printer to
the target mc streamer.

This removes the last call to hasRawTextSupport from lib/Target.

llvm-svn: 200590
2014-01-31 23:10:26 +00:00
Matheus Almeida
489791e923 [mips][msa] Add insert.d instruction.
This instruction is only available on Mips64 cores that implement the MSA ASE.

llvm-svn: 200543
2014-01-31 13:31:20 +00:00