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177 Commits

Author SHA1 Message Date
Joerg Sonnenberger
839f6c1a88 Remove exception handling usage from tblgen. 
Most places can use PrintFatalError as the unwinding mechanism was not
used for anything other than printing the error. The single exception
was CodeGenDAGPatterns.cpp, where intermediate errors during type
resolution were ignored to simplify incremental platform development.
This use is replaced by an error flag in TreePattern and bailout earlier
in various places if it is set. 

llvm-svn: 166712
 2012-10-25 20:33:17 +00:00
Sean Silva
cbe79850e7 tblgen: Use semantically correct RTTI functions. 
Also, some minor cleanup.

llvm-svn: 165647
 2012-10-10 20:24:47 +00:00
Sean Silva
a6a1c05042 tblgen: Mechanically move dynamic_cast<> to dyn_cast<>. 
Some of these dyn_cast<>'s would be better phrased as isa<> or cast<>.
That will happen in a future patch.

There are also two dyn_cast_or_null<>'s slipped in instead of
dyn_cast<>'s, since they were causing crashes with just dyn_cast<>.

llvm-svn: 165646
 2012-10-10 20:24:43 +00:00
Craig Topper
7989d0ccdc Revert r163878 as it breaks on targets with alternate register names. Such targets do not exist in the main tree so this was not noticed. 
llvm-svn: 163959
 2012-09-15 01:22:42 +00:00
Craig Topper
0320f5eded Allow the second opcode info table to be 8, 16, or 32-bits as needed to represent additional fragments. This recovers some space on ATT X86 syntax and PowerPC which only need 40-bits instead of 48-bits. This also increases ARM to 64-bits to fully encode all of its operands. 
llvm-svn: 163880
 2012-09-14 08:33:11 +00:00
Craig Topper
5cd6b912e7 Reduce size of register name index tables by using uint16_t for all in tree targets. If more than 16-bits are needed for any out of tree targets, code will detect and use uint32_t instead. 
llvm-svn: 163878
 2012-09-14 06:37:49 +00:00
Manman Ren
782be257ee AsmWriterEmitter: OpInfo2 should be unsigned 16-bit. 
Fix an issue in r163814.

llvm-svn: 163837
 2012-09-13 20:47:48 +00:00
Manman Ren
4b62c95592 AsmWriterEmitter: increase the number of bits for OpcodeInfo from 32-bit to 
48-bit if necessary, in order to reduce the generated code size.

We have 900 cases not covered by OpcodeInfo in ATT AsmWriter and more in Intel
AsmWriter and ARM AsmWriter.

This patch reduced the clang Release build size by 50k, running on a Mac Pro.

llvm-svn: 163814
 2012-09-13 17:43:46 +00:00
Craig Topper
043e2ac679 Clean up includes. 
llvm-svn: 160852
 2012-07-27 06:44:02 +00:00
Jakob Stoklund Olesen
2e87ef0470 Write llvm-tblgen backends as functions instead of sub-classes. 
The TableGenBackend base class doesn't do much, and will be removed
completely soon.

Patch by Sean Silva!

llvm-svn: 158311
 2012-06-11 15:37:55 +00:00
Jim Grosbach
f77ed6f9c3 Revert "Replace some uses of std:map<std::string,...> with StringMap." 
StringMap iterators are not deterministic, and that's more important
here than speed or memory.

llvm-svn: 155039
 2012-04-18 20:24:49 +00:00
Jim Grosbach
050ec9bce7 Replace some uses of std:map<std::string,...> with StringMap. 
llvm-svn: 155037
 2012-04-18 19:13:59 +00:00
Jim Grosbach
e29486798c Use SmallVector for the requirements on an InstAlias. 
llvm-svn: 155034
 2012-04-18 19:02:43 +00:00
Jim Grosbach
ae2ac1f597 Tidy up. Formatting. 
llvm-svn: 155032
 2012-04-18 18:56:33 +00:00
Craig Topper
2a4fe8b344 Convert assert(false) followed by a return to llvm_unreachable 
llvm-svn: 153997
 2012-04-04 04:55:46 +00:00
Craig Topper
b4929c0302 Tidy up spacing in some tablegen outputs. 
llvm-svn: 153937
 2012-04-03 06:52:47 +00:00
Benjamin Kramer
d960cf6265 Emit the asm writer's mnemonic table with SequenceToOffsetTable. 
This way we can get AVX v-prefixed instructions tail merged with the normal insns.

llvm-svn: 153869
 2012-04-02 09:13:46 +00:00
Craig Topper
fe02cb5e8b Remove getInstructionName from MCInstPrinter implementations in favor of using the instruction name table from MCInstrInfo. Reduces static data in the InstPrinter implementations. 
llvm-svn: 153863
 2012-04-02 07:01:04 +00:00
Craig Topper
949f3bef7a Use SequenceToOffsetTable to generate instruction name table for AsmWriter. 
llvm-svn: 153857
 2012-04-02 00:47:39 +00:00
Benjamin Kramer
dbd6a33c45 Rip out emission of the regIsInRegClass function for the asm printer. 
It's slow, bloated and completely redundant with MCRegisterClass::contains.

llvm-svn: 153782
 2012-03-30 23:13:40 +00:00
Jakob Stoklund Olesen
a29c0a3bac Use SequenceToOffsetTable in emitRegisterNameString. 
This allows suffix sharing in register names. (AX is a suffix of EAX).

llvm-svn: 153777
 2012-03-30 21:12:52 +00:00
Jakob Stoklund Olesen
16a890c018 Revert r152202: "Use uint16_t to store InstrNameIndices in MCInstrInfo." 
We cannot limit the concatenated instruction names to 64K.  ARM is
already at 32K, and it is easy to imagine a target with more
instructions.

llvm-svn: 152817
 2012-03-15 18:05:57 +00:00
Jakob Stoklund Olesen
00f5108289 Revert r152105: "Use uint16_t to store indices into string table" 
This patch limited the concatenated register names to 64K which meant
that the total number of registers was many times less than 64K.

If any compilers actually enforce the 64K limit on string literals, and
it turns out to be a problem, we should fix that problem by not using
long string literals.

llvm-svn: 152816
 2012-03-15 18:05:54 +00:00
Craig Topper
b41a7a21e6 Re-commit r152202 hopefully fixing the MSVC linker error. 
Original commit message:
Use uint16_t to store InstrNameIndices in MCInstrInfo. Add asserts to protect all 16-bit string table offsets. Also make sure the string to offset table string is not larger than 65536 characters since larger string literals aren't portable.

llvm-svn: 152296
 2012-03-08 06:55:27 +00:00
Chad Rosier
42837769dc Revert r152202 as it's causing internal buildbot failures. 
Original commit message:
Use uint16_t to store InstrNameIndices in MCInstrInfo. Add asserts to protect 
all 16-bit string table offsets. Also make sure the string to offset table 
string is not larger than 65536 characters since larger string literals aren't 
portable.

llvm-svn: 152233
 2012-03-07 17:06:40 +00:00
Craig Topper
42ddd0840a Use uint16_t to store InstrNameIndices in MCInstrInfo. Add asserts to protect all 16-bit string table offsets. Also make sure the string to offset table string is not larger than 65536 characters since larger string literals aren't portable. 
llvm-svn: 152202
 2012-03-07 05:17:23 +00:00
Craig Topper
86f61a903c Use uint16_t to store indices into string table since C++ only allows 64K string literals so the index into the big string can never be larger than that. 
llvm-svn: 152105
 2012-03-06 06:04:39 +00:00
Craig Topper
dfa8617ab9 Convert assert(0) to llvm_unreachable 
llvm-svn: 149814
 2012-02-05 07:21:30 +00:00
David Blaikie
8d47bb30e3 Remove unnecessary default cases in switches that cover all enum values. 
llvm-svn: 147855
 2012-01-10 16:47:17 +00:00
Jim Grosbach
2ac98a24aa ARM parsing datatype suffix variants for fixed-writeback VLD1/VST1 instructions. 
rdar://10435076

llvm-svn: 144606
 2011-11-15 01:46:57 +00:00
Jakob Stoklund Olesen
c36b745e2e TableGen: Privatize CodeGenRegisterClass::TheDef and Name. 
When TableGen starts creating its own register classes, the synthesized
classes won't have a Record reference.  All register classes must have a
name, though.

llvm-svn: 141081
 2011-10-04 15:28:08 +00:00
Peter Collingbourne
01246536d9 Move TableGen's parser and entry point into a library 
This is the first step towards splitting LLVM and Clang's tblgen executables.

llvm-svn: 140951
 2011-10-01 16:41:13 +00:00
Jakob Stoklund Olesen
d7b6708541 Switch to ArrayRef<CodeGenRegisterClass*>. 
This makes it possible to allocate CodeGenRegisterClass instances
dynamically and reorder them.

llvm-svn: 140816
 2011-09-29 22:28:37 +00:00
Evan Cheng
1112260be0 Remove the AsmWriterEmitter (unused) feature that rely on TargetSubtargetInfo. 
llvm-svn: 134457
 2011-07-06 02:02:33 +00:00
Francois Pichet
f9f38d8d73 Change AsmName's type from StringRef to std::string. AsmName was pointing to a temporary string object that was destroyed. This is undefined behavior and MSVC didn't like it. 
This fixes over 300+ failing tests on MSVC.
Credit for this fix goes to chapuni.

llvm-svn: 134064
 2011-06-29 11:25:34 +00:00
Owen Anderson
c1dcf312d1 Add support for alternative register names, useful for instructions whose operands are logically equivalent to existing registers, but happen to be printed specially. For example, an instruciton that prints d0[0] instead of s0. 
Patch by Jim Grosbach.

llvm-svn: 133940
 2011-06-27 21:06:21 +00:00
Jim Grosbach
cfcba2d22b Consolidate some TableGen diagnostic helper functions. 
TableGen had diagnostic printers sprinkled about in a few places. Pull them
together into a single location in Error.cpp.

llvm-svn: 133568
 2011-06-21 22:55:50 +00:00
Jakob Stoklund Olesen
f190283688 Store CodeGenRegisters as pointers so they won't be reallocated. 
Reuse the CodeGenRegBank DenseMap in a few places that would build their
own or use linear search.

llvm-svn: 133333
 2011-06-18 04:26:06 +00:00
Jakob Stoklund Olesen
4d17793443 Give CodeGenRegisterClass a real sorted member set. 
Make the Elements vector private and expose an ArrayRef through
getOrder() instead. getOrder will eventually provide multiple
user-specified allocation orders.

Use the sorted member set for member and subclass tests. Clean up a lot
of ad hoc searches.

llvm-svn: 133040
 2011-06-15 04:50:36 +00:00
Bill Wendling
5ae6b0c972 Improve the heuristic to emit the alias if the number of hard-coded registers 
are also greater than the alias.

llvm-svn: 133038
 2011-06-15 04:31:19 +00:00
Bill Wendling
77d4d62693 Heuristic: If the number of operands in the alias are more than the number of 
operands in the aliasee, don't print the alias.

llvm-svn: 132963
 2011-06-14 03:17:20 +00:00
Bill Wendling
6f30676150 Use a more efficient data structure for the "operand map". The number of 
operands to an instruction aren't great, so an iterative search is fairly quick
and doesn't have the overhead of std::map.

llvm-svn: 131886
 2011-05-23 00:18:33 +00:00
Eric Christopher
bd8bbe5934 Invert the meaning of printAliasInstr's return value. It now returns 
true on success and false on failure. Update callers.

llvm-svn: 129722
 2011-04-18 21:28:11 +00:00
Bill Wendling
500b41a7a5 Add an option to not print the alias of an instruction. It defaults to "print 
the alias".

llvm-svn: 129485
 2011-04-13 23:36:21 +00:00
Bill Wendling
fafa0c2509 Only emit the AvailableFeatures variable if it's used. 
llvm-svn: 129124
 2011-04-08 04:08:57 +00:00
Bill Wendling
342ba5c4b6 Replace the old algorithm that emitted the "print the alias for an instruction" 
with the newer, cleaner model. It uses the IAPrinter class to hold the
information that is needed to match an instruction with its alias. This also
takes into account the available features of the platform.

There is one bit of ugliness. The way the logic determines if a pattern is
unique is O(N**2), which is gross. But in reality, the number of items it's
checking against isn't large. So while it's N**2, it shouldn't be a massive time
sink.

llvm-svn: 129110
 2011-04-07 21:20:06 +00:00
Bill Wendling
52c4596a0f Call static functions so that they aren't left unused. 
llvm-svn: 128020
 2011-03-21 21:08:27 +00:00
Bill Wendling
9adf1c9edd A WIP commit of the InstAlias printing cleanup. This code will soon replace the 
code below it. Even though it looks very similar, it will match more precisely
and geneate better functions in the long run.

llvm-svn: 127991
 2011-03-21 08:59:17 +00:00
Bill Wendling
4cdb29548b Add the IAPrinter class. 
This is a helper class that will make it easier to say which InstAliases can be
printed and which cannot (because of ambiguity).

llvm-svn: 127990
 2011-03-21 08:40:31 +00:00
Bill Wendling
e3b0820ad4 * Add classes that support the "feature" information. 
* Move the code that emits the reg in reg class matching into its own function.

llvm-svn: 127988
 2011-03-21 08:31:53 +00:00