Igor Breger
1ab3a1be2f
AVX-512: Use correct extract vector length.
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Bug https://llvm.org/bugs/show_bug.cgi?id=25318
Differential Revision: http://reviews.llvm.org/D14062
llvm-svn: 251285
2015-10-26 12:26:34 +00:00
Asaf Badouh
99f2354837
[X86][AVX512] extend vcvtph2ps to support xmm/ymm and sae versions
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Differential Revision: http://reviews.llvm.org/D13945
llvm-svn: 251018
2015-10-22 14:01:16 +00:00
Igor Breger
c385abd09d
AVX512: Implemented encoding and intrinsics for VPBROADCASTB/W/D/Q instructions.
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Differential Revision: http://reviews.llvm.org/D13884
llvm-svn: 250819
2015-10-20 11:56:42 +00:00
Asaf Badouh
381b11d5f2
[X86][AVX512DQ] add scalar fpclass
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Differential Revision: http://reviews.llvm.org/D13769
llvm-svn: 250650
2015-10-18 11:04:38 +00:00
Igor Breger
c4af5733a0
AVX512: Lowering i8/i16 vector CTLZ using the dword LZCNT vector instruction
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Differential Revision: http://reviews.llvm.org/D13632
llvm-svn: 250649
2015-10-18 09:56:39 +00:00
Igor Breger
6e29702ee8
AVX512: Implemented encoding and intrinsics for vpternlogd/q.
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Differential Revision: http://reviews.llvm.org/D13768
llvm-svn: 250396
2015-10-15 12:33:24 +00:00
Igor Breger
63cd1bda1b
AVX512: vpextrb/w/d/q and vpinsrb/w/d/q implementation.
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This instructions doesn't have intrincis.
Added tests for lowering and encoding.
Differential Revision: http://reviews.llvm.org/D12317
llvm-svn: 249688
2015-10-08 12:55:01 +00:00
Igor Breger
495e2a8625
AVX512: Change encoding of vpshuflw and vpshufhw instructions. Implement WIG as W0 and not W1, like all other instruction have been implemented.
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Add encoding tests.
Differential Revision: http://reviews.llvm.org/D13471
llvm-svn: 249521
2015-10-07 06:31:18 +00:00
Igor Breger
38dd6d8710
AVX512: Implemented encoding and intrinsics for VPERMILPS/PD instructions.
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Added tests for intrinsics and encoding.
Differential Revision: http://reviews.llvm.org/D12690
llvm-svn: 249261
2015-10-04 07:20:41 +00:00
Asaf Badouh
8011b4b495
[X86][AVX512] add masked version for RSQRT14 & RCP14 Scalar FP
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Differential Revision: http://reviews.llvm.org/D12524
llvm-svn: 248147
2015-09-21 10:23:53 +00:00
Igor Breger
a833017e0d
AVX512: Implemented encoding and intrinsics for vcmpss/sd.
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Added tests for intrinsics and encoding.
Differential Revision: http://reviews.llvm.org/D12593
llvm-svn: 248121
2015-09-20 15:15:10 +00:00
Asaf Badouh
4ce11a0a36
[X86][AVX512] extend support in Scalar conversion
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add scalar FP to Int conversion with truncation intrinsics
add scalar conversion FP32 from/to FP64 intrinsics
add rounding mode and SAE mode encoding for these intrinsics
Differential Revision: http://reviews.llvm.org/D12665
llvm-svn: 248117
2015-09-20 14:31:19 +00:00
Igor Breger
6c78cd17ac
AVX512: vsqrtss/sd encoding and intrinsics implementation.
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Added tests for intrinsics and encoding.
Differential Revision: http://reviews.llvm.org/D12102
llvm-svn: 248116
2015-09-20 09:13:41 +00:00
Asaf Badouh
981ab82bef
[X86][AVX512DQ] Add fpclass instruction
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Differential Revision: http://reviews.llvm.org/D12931
llvm-svn: 248115
2015-09-20 08:46:07 +00:00
Igor Breger
43e0d98a01
AVX512: Implement instructions encoding, lowering and intrinsics
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vinserti64x4, vinserti64x2, vinserti32x8, vinserti32x4, vinsertf64x4, vinsertf64x2, vinsertf32x8, vinsertf32x4
Added tests for encoding, lowering and intrinsics.
Differential Revision: http://reviews.llvm.org/D11893
llvm-svn: 248111
2015-09-20 06:52:42 +00:00
Igor Breger
eeecfc6724
AVX512: Implemented encoding and intrinsics for
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vextracti64x4 ,vextracti64x2, vextracti32x8, vextracti32x4, vextractf64x4, vextractf64x2, vextractf32x8, vextractf32x4
Added tests for intrinsics and encoding.
Differential Revision: http://reviews.llvm.org/D11802
llvm-svn: 247276
2015-09-10 12:54:54 +00:00
Renato Golin
32a92f6d16
Revert "AVX512: Implemented encoding and intrinsics for vextracti64x4 ,vextracti64x2, vextracti32x8, vextracti32x4, vextractf64x4, vextractf64x2, vextractf32x8, vextractf32x4 Added tests for intrinsics and encoding."
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This reverts commit r247149, as it was breaking numerous buildbots of varied architectures.
llvm-svn: 247177
2015-09-09 19:44:40 +00:00
Igor Breger
1a3ef530c1
AVX512: Implemented encoding and intrinsics for
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vextracti64x4 ,vextracti64x2, vextracti32x8, vextracti32x4, vextractf64x4, vextractf64x2, vextractf32x8, vextractf32x4
Added tests for intrinsics and encoding.
Differential Revision: http://reviews.llvm.org/D11802
llvm-svn: 247149
2015-09-09 14:35:09 +00:00
Igor Breger
2caf00654a
AVX512: kunpck encoding implementation
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Added tests for encoding.
Differential Revision: http://reviews.llvm.org/D12061
llvm-svn: 247010
2015-09-08 13:10:00 +00:00
Igor Breger
63fab329a2
AVX512: Implemented encoding and intrinsics for vplzcntq, vplzcntd, vpconflictq, vpconflictd
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Added tests for intrinsics and encoding.
Differential Revision: http://reviews.llvm.org/D11931
llvm-svn: 246750
2015-09-03 09:05:31 +00:00
Asaf Badouh
70ff5c87a7
[X86][AVX512VLBW] add support in byte shift and SAD
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add byte shift left/right
add SAD - compute sum of absolute differences
Differential Revision: http://reviews.llvm.org/D12479
llvm-svn: 246654
2015-09-02 14:21:54 +00:00
Igor Breger
8e7d569bab
AVX512: Implemented encoding and intrinsics for VGETMANTPD/S , VGETMANTSD/S instructions
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Added tests for intrinsics and encoding.
Differential Revision: http://reviews.llvm.org/D11593
llvm-svn: 246642
2015-09-02 11:18:55 +00:00
Igor Breger
dc46fb3351
AVX512: Implemented encoding and intrinsics for vshufps/d.
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Added tests for intrinsics and encoding.
Differential Revision: http://reviews.llvm.org/D11709
llvm-svn: 246640
2015-09-02 10:50:58 +00:00
Elena Demikhovsky
c3d9501be6
AVX-512: store <4 x i1> and <2 x i1> values in memory
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Enabled DAG pattern lowering for SKX with DQI predicate.
Differential Revision: http://reviews.llvm.org/D12550
llvm-svn: 246625
2015-09-02 09:20:58 +00:00
Igor Breger
e7da3698f2
AVX512: ktest implemantation
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Added tests for encoding.
Differential Revision: http://reviews.llvm.org/D11979
llvm-svn: 246439
2015-08-31 13:30:19 +00:00
Igor Breger
2ff3c16585
AVX512: Implemented encoding and intrinsics for vdbpsadbw
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Added tests for intrinsics and encoding.
Differential Revision: http://reviews.llvm.org/D12491
llvm-svn: 246436
2015-08-31 13:09:30 +00:00
Igor Breger
d931ce02d4
AVX512: kadd implementation
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Added tests for encoding.
Differential Revision: http://reviews.llvm.org/D11973
llvm-svn: 246432
2015-08-31 11:50:23 +00:00
Igor Breger
c6e71f91ab
AVX512: Implemented encoding and intrinsics for vpalignr
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Added tests for intrinsics and encoding.
Differential Revision: http://reviews.llvm.org/D12270
llvm-svn: 246428
2015-08-31 11:14:02 +00:00
Marina Yatsina
668150fc2f
[X86] Fix bug in COMISD and COMISS definition in td files
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COMISD should receive QWORD because it is defined as
(V)COMISD xmm1, xmm2/m64
COMISS should receive DWORD because it is defined as
(V)COMISS xmm1, xmm2/m32
Differential Revision: http://reviews.llvm.org/D11712
llvm-svn: 245551
2015-08-20 11:21:36 +00:00
Michael Liao
5abd44bd1a
Removing tailing whitespaces
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llvm-svn: 244203
2015-08-06 09:06:20 +00:00
Igor Breger
28223d1ba3
AVX512: Implemented encoding and intrinsics for VGETEXPSS/D instructions
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Added tests for intrinsics and encoding.
Differential Revision: http://reviews.llvm.org/D11528
llvm-svn: 243390
2015-07-28 06:53:28 +00:00
Igor Breger
255a11f9b8
Implemented encoding and intrinsics of the following instructions
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vunpckhps/pd, vunpcklps/pd,
vpunpcklbw, vpunpckhbw, vpunpcklwd, vpunpckhwd, vpunpckldq, vpunpckhdq, vpunpcklqdq, vpunpckhqdq
Added tests for intrinsics and encoding.
Differential Revision: http://reviews.llvm.org/D11509
llvm-svn: 243246
2015-07-26 14:41:44 +00:00
Igor Breger
7ea6c4cce1
AVX-512: Implemented encoding , DAG lowering and intrinsics for Integer Truncate with/without saturation
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Added tests for DAG lowering ,encoding and intrinsic
Differential Revision: http://reviews.llvm.org/D11218
llvm-svn: 243122
2015-07-24 17:24:15 +00:00
Chandler Carruth
3b9bc26920
Revert r242990: "AVX-512: Implemented encoding , DAG lowering and ..."
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This commit broke the build. Numerous build bots broken, and it was
blocking my progress so reverting.
It should be trivial to reproduce -- enable the BPF backend and it
should fail when running llvm-tblgen.
llvm-svn: 242992
2015-07-23 08:03:44 +00:00
Igor Breger
8ded9931fe
AVX-512: Implemented encoding , DAG lowering and intrinsics for Integer Truncate with/without saturation
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Added tests for DAG lowering ,encoding and intrinsic
Differential Revision: http://reviews.llvm.org/D11218
llvm-svn: 242990
2015-07-23 07:39:21 +00:00
Asaf Badouh
7feb9eaba0
[X86][AVX512] add reduce/range/scalef/rndScale
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include encoding and intrinsics
Differential Revision: http://reviews.llvm.org/D11222
llvm-svn: 242896
2015-07-22 12:00:43 +00:00
Igor Breger
5441f451cc
AVX512 : Implemented VPMADDUBSW and VPMADDWD instruction ,
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Added tests for intrinsics and encoding.
Differential Revision: http://reviews.llvm.org/D11351
llvm-svn: 242761
2015-07-21 07:11:28 +00:00
Elena Demikhovsky
618bae6f38
AVX-512: Added all AVX-512 forms of Vector Convert for Float/Double/Int/Long types.
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In this patch I have only encoding. Intrinsics and DAG lowering will be in the next patch.
I temporary removed the old intrinsics test (just to split this patch).
Half types are not covered here.
Differential Revision: http://reviews.llvm.org/D11134
llvm-svn: 242023
2015-07-13 13:26:20 +00:00
Simon Pilgrim
af8901c21c
[X86][SSE] Use the general SMAX/SMIN/UMAX/UMIN opcodes and remove the X86 implementation
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With the completion of D9746 there is now a common implementation of integer signed/unsigned min/max nodes, removing the need for the equivalent X86 specific implementations.
This patch removes the old X86ISD nodes, legalizes the relevant SSE2/SSE41/AVX2/AVX512 instructions for the ISD versions and converts the small amount of existing X86 code.
Differential Revision: http://reviews.llvm.org/D10947
llvm-svn: 241506
2015-07-06 20:30:47 +00:00
Asaf Badouh
a51b8d0d5b
[X86][AVX512] Multiply Packed Unsigned Integers with Round and Scale
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pmulhrsw
review:
http://reviews.llvm.org/D10948
llvm-svn: 241443
2015-07-06 14:03:40 +00:00
Asaf Badouh
7e53a288e3
[x86][AVX512] add Multiply High Op
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include encoding and intrinsics tests.
review
http://reviews.llvm.org/D10896
llvm-svn: 241406
2015-07-05 12:23:20 +00:00
Igor Breger
cdff3524c0
AVX-512: Implemented missing encoding for FMA scalar instructions
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Added tests for encoding
Differential Revision: http://reviews.llvm.org/D10865
llvm-svn: 241159
2015-07-01 13:24:28 +00:00
Elena Demikhovsky
12bde41e5a
AVX-512: all forms of SCATTER instruction on SKX,
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encoding, intrinsics and tests.
llvm-svn: 240936
2015-06-29 12:14:24 +00:00
Igor Breger
7ca2ee2eb1
AVX-512: Implemented missing encoding and intrinsics for FMA instructions
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Added tests for DAG lowering ,encoding and intrinsics
Differential Revision: http://reviews.llvm.org/D10796
llvm-svn: 240926
2015-06-29 09:10:00 +00:00
Asaf Badouh
732e3b5425
[x86][AVX512]
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Add vscalef support
include encoding and intrinsics
review:
http://reviews.llvm.org/D10730
llvm-svn: 240906
2015-06-28 14:30:39 +00:00
Elena Demikhovsky
02169f53d0
AVX-512: Added all SKX forms of GATHER instructions.
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Added intrinsics.
Added encoding and tests.
llvm-svn: 240905
2015-06-28 10:53:29 +00:00
Elena Demikhovsky
1df83908be
AVX-512: Added all forms of VPABS instruction
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Added all intrinsics, tests for encoding, tests for intrinsics.
llvm-svn: 240386
2015-06-23 08:19:46 +00:00
Elena Demikhovsky
0d6489273b
AVX-512: added VPSHUFB instruction - all SKX forms
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Added intrinsics and encoding tests.
llvm-svn: 240277
2015-06-22 13:00:42 +00:00
Elena Demikhovsky
833648a31f
AVX-512: All forms of VCOPMRESS VEXPAND instructions,
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encoding tests.
llvm-svn: 240272
2015-06-22 11:16:30 +00:00
Asaf Badouh
6e78caf9ff
[AVX512]
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add instructions: VPAVGB and VPAVGW
review
http://reviews.llvm.org/D10504
llvm-svn: 240012
2015-06-18 12:30:53 +00:00