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Commit Graph

62147 Commits

Author SHA1 Message Date
Michael Gottesman
1b9f5c3f5a [APFloat] Removed APFloat constructor which initialized to either zero/NaN but allowed you to arbitrarily set the category of the float.
The category which an APFloat belongs to should be dependent on the
actual value that the APFloat has, not be arbitrarily passed in by the
user. This will prevent inconsistency bugs where the category and the
actual value in APFloat differ.

I also fixed up all of the references to this constructor (which were
only in LLVM).

llvm-svn: 185095
2013-06-27 19:50:52 +00:00
Nadav Rotem
edc63580c8 Get rid of the unused class member.
llvm-svn: 185086
2013-06-27 17:54:10 +00:00
Nadav Rotem
311bda941c CostModel: improve the cost model for load/store of non power-of-two types such as <3 x float>, which are popular in graphics.
llvm-svn: 185085
2013-06-27 17:52:04 +00:00
Arnold Schwaighofer
ccd78deec7 LoopVectorize: Use vectorized loop invariant gep index anchored in loop
Use vectorized instruction instead of original instruction anchored in the
original loop.

Fixes PR16452 and t2075.c of PR16455.

llvm-svn: 185081
2013-06-27 15:11:55 +00:00
Serge Pavlov
252358c083 Use MCFillFragment for zero-initialized data.
It fixes PR16338 (ICE when compiling very large two-dimensional array).

Differential Revision: http://llvm-reviews.chandlerc.com/D1043

llvm-svn: 185080
2013-06-27 14:35:03 +00:00
Joey Gouly
42f1898415 Add a Subtarget feature 'v8fp' to the ARM backend.
llvm-svn: 185073
2013-06-27 11:49:26 +00:00
Benjamin Kramer
c8a5213f3b Remove unused variable.
llvm-svn: 185072
2013-06-27 11:26:41 +00:00
Benjamin Kramer
a42cac6f28 Don't cast away constness.
llvm-svn: 185071
2013-06-27 11:07:42 +00:00
Richard Sandiford
609a7eb0a1 [SystemZ] Allow LA and LARL to be rematerialized
llvm-svn: 185069
2013-06-27 09:42:10 +00:00
Richard Sandiford
a2d164d53e [SystemZ] Allow immediate moves to be rematerialized
llvm-svn: 185068
2013-06-27 09:38:48 +00:00
Richard Sandiford
964ffa104f [SystemZ] Add conditional store patterns
Add pseudo conditional store instructions, so that we use:

    branch foo:
    store
foo:

instead of:

    load
    branch foo:
    move
foo:
    store

z196 has real 32-bit and 64-bit conditional stores, but we don't use
any z196 instructions yet.

llvm-svn: 185065
2013-06-27 09:27:40 +00:00
Rafael Espindola
ac62522b9b Add a convenience createUniqueDirectory function.
There are a few valid situation where we care about the structure inside a
directory, but not about the directory itself. A simple example is for unit
testing directory traversal.

PathV1 had a function like this, add one to V2 and port existing users of the
created temp file and delete it hack to using it.

llvm-svn: 185059
2013-06-27 03:45:31 +00:00
Arnold Schwaighofer
18efca433e LoopVectorize: Don't store a reversed value in the vectorized value map
When we store values for reversed induction stores we must not store the
reversed value in the vectorized value map. Another instruction might use this
value.

This fixes 3 test cases of PR16455.

llvm-svn: 185051
2013-06-27 00:45:41 +00:00
Michael Gottesman
fe055b3806 Added support for the Builtin attribute.
The Builtin attribute is an attribute that can be placed on function call site that signal that even though a function is declared as being a builtin,

rdar://problem/13727199

llvm-svn: 185049
2013-06-27 00:25:01 +00:00
Nadav Rotem
195bbbe54b No need to use a Set when a vector would do.
llvm-svn: 185047
2013-06-27 00:14:13 +00:00
Nadav Rotem
897ca82595 SLP: When searching for vectorization opportunities scan the blocks in post-order because we grow chains upwards.
llvm-svn: 185041
2013-06-26 23:44:45 +00:00
Nadav Rotem
962b32446e SLP: Dont erase instructions during vectorization because it prevents the outerloops from iterating over the instructions.
llvm-svn: 185040
2013-06-26 23:43:23 +00:00
Michael Gottesman
98d0fadcd5 In InstCombine{AddSub,MulDivRem} convert APFloat.isFiniteNonZero() && !APFloat.isDenormal => APFloat.isNormal.
llvm-svn: 185037
2013-06-26 23:17:31 +00:00
Michael Gottesman
4852d1e28a [APFloat] Convert all references to fcNormal to references to isFiniteNonZero().
Currently inside APFloat fcNormal still implies the old definition of Normal
(i.e. isFiniteNonZero) instead of the proper IEEE-754R definition that the
external method isNormal() uses.

This patch prepares for the internal switch inside APFloat by converting all
references that check if a category is fcNormal directly with an indirect call
via isFiniteNonZero().

llvm-svn: 185036
2013-06-26 23:17:28 +00:00
Eric Christopher
2004fbdda9 Revert "Debug Info: clean up usage of Verify." as it's breaking bots.
This reverts commit r185020

llvm-svn: 185032
2013-06-26 22:44:57 +00:00
Reid Kleckner
780d4ccf9e Fix a crash bug in dumping options with groups
Option groups don't have prefixes.  Option dumping is basically dead
code unless there is something wrong with the option table, so this
isn't an important crasher.

llvm-svn: 185031
2013-06-26 22:43:37 +00:00
Stephen Lin
d1d52203d6 Clarify and doxygen-ify comments
llvm-svn: 185030
2013-06-26 22:27:50 +00:00
Chad Rosier
2b164134e8 [Mips Disassembler] Have the DecodeCCRRegisterClass function use the getReg
function to lookup the proper tablegen'ed register enumeration.  Previously,
it was using the encoded value directly.

llvm-svn: 185026
2013-06-26 22:23:32 +00:00
Stephen Lin
25c0cb5ba9 ARM: Proactively ensure that the LowerCallResult hack for 'this'-returns is not used for incompatible calling conventions.
(Currently, ARM 'this'-returns are handled in the standard calling convention case by treating R0 as preserved and doing some extra magic in LowerCallResult; this may not apply to calling conventions added in the future so this patch provides and documents an interface for indicating such)

llvm-svn: 185024
2013-06-26 21:42:14 +00:00
Manman Ren
868703ebb8 Debug Info: clean up usage of Verify.
No functionality change.
It should suffice to check the type of a debug info metadata, instead of
calling Verify.

llvm-svn: 185020
2013-06-26 21:26:10 +00:00
Stephen Lin
98ccb9d1ce Minor formatting fix to ARMBaseRegisterInfo::getCalleeSavedRegs
llvm-svn: 185016
2013-06-26 20:19:06 +00:00
Rafael Espindola
9edd4f6c46 Rename PathV2 to just Path now that it is the only one.
llvm-svn: 185015
2013-06-26 19:33:03 +00:00
Akira Hatanaka
677f305c97 [mips] Do not emit ".option pic0" if target is mips64.
llvm-svn: 185012
2013-06-26 19:08:49 +00:00
Akira Hatanaka
1f2c22ad07 [mips] Improve code generation for constant multiplication using shifts, adds and
subs.

llvm-svn: 185011
2013-06-26 18:48:17 +00:00
Rafael Espindola
86155d2520 Use enums instead of raw octal values.
Patch by 罗勇刚(Yonggang Luo).

llvm-svn: 184971
2013-06-26 17:28:04 +00:00
Nadav Rotem
860aebf69a Erase all of the instructions that we RAUWed
llvm-svn: 184969
2013-06-26 17:16:09 +00:00
Joey Gouly
f4bea6681b Add a subtarget feature 'v8' to the ARM backend.
This allows for targeting the ARMv8 AArch32 variant.

llvm-svn: 184967
2013-06-26 16:58:26 +00:00
Nadav Rotem
e0a5a586b8 Do not add cse-ed instructions into the visited map because we dont want to consider them as a candidate for replacement of instructions to be visited.
llvm-svn: 184966
2013-06-26 16:54:53 +00:00
Tim Northover
2bf8ffa196 ARM: fix more cases where predication may or may not be allowed
Unfortunately this addresses two issues (by the time I'd disentangled the logic
it wasn't worth putting it back to half-broken):

+ Coprocessor instructions should all be predicable in Thumb mode.
+ BKPT should never be predicable.

llvm-svn: 184965
2013-06-26 16:52:40 +00:00
Tim Northover
817190b1e4 ARM: allow predicated barriers in Thumb mode
The barrier instructions are only "always-execute" in ARM mode, they can quite
happily sit inside an IT block in Thumb.

llvm-svn: 184964
2013-06-26 16:52:32 +00:00
Joey Gouly
a82562fd5b Remove the 'generic' CPU from the ARM eabi attributes printer.
Make v4 the default ARM architecture attribute, to match CodeGen.

llvm-svn: 184962
2013-06-26 16:39:06 +00:00
Rafael Espindola
dc28d9e2d2 PathV1 is deprecated since the 18th of Dec 2010. Remove it.
llvm-svn: 184960
2013-06-26 16:24:35 +00:00
Ulrich Weigand
c2c8aeb508 [PowerPC] Accept 17-bit signed immediates for addis
The assembler currently strictly verifies that immediates for
s16imm operands are in range (-32768 ... 32767).  This matches
the behaviour of the GNU assembler, with one exception: gas
allows, as a special case, operands in an extended range
(-65536 .. 65535) for the addis instruction only (and its
extended mnemonic lis).

The main reason for this seems to be to allow using unsigned
16-bit operands for lis, e.g. like lis %r1, 0xfedc.

Since this has been supported by gas for a long time, and
assembler source code seen "in the wild" actually exploits
this feature, this patch adds equivalent support to LLVM
for compatibility reasons.

llvm-svn: 184946
2013-06-26 13:49:53 +00:00
Ulrich Weigand
66a94dc7aa [PowerPC] Support symbolic u16imm operands
Currently, all instructions taking s16imm operands support symbolic
operands.  However, for u16imm operands, we only support actual
immediate integers.  This causes the assembler to reject code like

  ori %r5, %r5, symbol@l

This patch changes the u16imm operand definition to likewise
accept symbolic operands.  In fact, s16imm and u16imm can
share the same encoding routine, now renamed to getImm16Encoding.

llvm-svn: 184944
2013-06-26 13:49:15 +00:00
Amaury de la Vieuville
8a7e3e2195 ARM: operands should be explicit when disassembled
llvm-svn: 184943
2013-06-26 13:39:07 +00:00
Venkatraman Govindaraju
9841400828 [Sparc]: Add memory operands for the frame references in the storeRegToStackSlot
and loadRegFromStackSlot.

llvm-svn: 184935
2013-06-26 12:40:16 +00:00
Elena Demikhovsky
eec89cbdd6 Fixed a comment.
llvm-svn: 184933
2013-06-26 12:15:53 +00:00
Elena Demikhovsky
ea4d3808e5 Optimized integer vector multiplication operation by replacing it with shift/xor/sub when it is possible. Fixed a bug in SDIV, where the const operand is not a splat constant vector.
llvm-svn: 184931
2013-06-26 10:55:03 +00:00
Kostya Serebryany
16c49ed479 [asan] workaround for PR16277: don't instrument AllocaInstr with alignment more than the redzone size
llvm-svn: 184928
2013-06-26 09:49:52 +00:00
Kostya Serebryany
07a94c6709 [asan] add option -asan-keep-uninstrumented-functions
llvm-svn: 184927
2013-06-26 09:18:17 +00:00
Rafael Espindola
5c2b78684b Remove calls to Path in #ifdefs that don't seem to be used in any of the bots :-(
llvm-svn: 184920
2013-06-26 06:10:32 +00:00
Rafael Espindola
cfa225ba98 Fix the build when __APPLE__ is defined.
llvm-svn: 184917
2013-06-26 05:25:44 +00:00
Rafael Espindola
1c94419f89 Remove sys::GetMainExecutable.
llvm-svn: 184916
2013-06-26 05:05:37 +00:00
Rafael Espindola
07ffa7d08b Port GetMainExecutable over to PathV2.
I will remove the V1 version as soon as I change clang in the next commit.

llvm-svn: 184914
2013-06-26 05:01:35 +00:00
Rafael Espindola
2d8fd3934d Remove PathWithStatus.
llvm-svn: 184910
2013-06-26 04:15:55 +00:00