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Author SHA1 Message Date
Jakub Staszak
bb1d5dc7e7 Use MachineBranchProbabilityInfo instead of MachineLoopInfo in IfConversion. 
llvm-svn: 135724
 2011-07-21 23:48:55 +00:00
Owen Anderson
e34471d064 Get rid of the extraneous GPR operand on so_reg_imm operands, which in turn necessitates a lot of changes to related bits. 
llvm-svn: 135722
 2011-07-21 23:38:37 +00:00
Dan Gohman
b320950f65 Fix MergeInVectorType to check for vector types with the same alloc 
size but different element types, so that it filters out the cases
that CreateShuffleVectorCast doesn't handle. This fixes rdar://9786827.

llvm-svn: 135721
 2011-07-21 23:30:09 +00:00
Jim Grosbach
e56f945492 ARM Asm parser range checking for [0,31] immediates. 
llvm-svn: 135719
 2011-07-21 23:26:25 +00:00
Jim Grosbach
54b0cbc6ae ARM parsing and encoding tests for SBC instruction. 
llvm-svn: 135718
 2011-07-21 23:03:59 +00:00
Benjamin Kramer
6ab8d85f64 Initialize DenseSets lazily. 
llvm-svn: 135717
 2011-07-21 23:03:59 +00:00
Jim Grosbach
901aeb1ffa ARM testcases for SADD/SASX parsing and encoding. 
llvm-svn: 135715
 2011-07-21 23:00:49 +00:00
Jakub Staszak
e01d74a920 Add missing getAnalysisUsage in MachineBlockFrequency. 
llvm-svn: 135714
 2011-07-21 22:59:09 +00:00
Jim Grosbach
8d031eeb23 ARM assembly parsing support for RSC instruction. 
Add two-operand instruction aliases. Add parsing and encoding tests for
variants of the instruction.

llvm-svn: 135713
 2011-07-21 22:56:30 +00:00
Jim Grosbach
e96857fd4f ARM assembly parsing support for RSB instruction. 
Add two-operand instruction aliases. Add parsing and encoding tests for
variants of the instruction.

llvm-svn: 135712
 2011-07-21 22:37:43 +00:00
Jim Grosbach
6947bcc2b0 ARM parsing and encoding tests for RBIT, REV, REV16 and REVSH. 
llvm-svn: 135710
 2011-07-21 22:29:23 +00:00
Jim Grosbach
95ce5e9b8e ARM parsing and encodings tests for saturating arithmetic insns. 
llvm-svn: 135709
 2011-07-21 22:18:28 +00:00
Jim Grosbach
724e527a7a Tidy up. 
llvm-svn: 135706
 2011-07-21 21:26:05 +00:00
Nicolas Geoffray
5cea57ec31 Update generated CPP code with the new API on CallInst::Create and ConstantExpr::getGetElementPtr. 
llvm-svn: 135704
 2011-07-21 20:59:21 +00:00
Jim Grosbach
a860ba338f ARM assembly parsing POP/PUSH mnemonics. 
Aliases for LDM/STM. The single-register versions should encode to LDR/STR
with writeback, but we don't (yet) get that correct. Neither does Darwin's
system assembler, though, so that's not a deal-breaker of a limitation.

llvm-svn: 135702
 2011-07-21 19:57:11 +00:00
Oscar Fuentes
c951cb1ef4 Fix CMake build 
llvm-svn: 135698
 2011-07-21 19:10:57 +00:00
Jim Grosbach
ef5c63cafe Add tests for ARM PKH assembly parsing. 
llvm-svn: 135696
 2011-07-21 19:02:03 +00:00
Owen Anderson
2e26de13d2 Split up the ARM so_reg ComplexPattern into so_reg_reg and so_reg_imm, allowing us to distinguish the encodings that use shifted registers from those that use shifted immediates. This is necessary to allow the fixed-length decoder to distinguish things like BICS vs LDRH. 
llvm-svn: 135693
 2011-07-21 18:54:16 +00:00
Andrew Trick
66db1adfe1 Cleanup: make std::pair usage slightly less indecipherable without actually naming variables! 
llvm-svn: 135684
 2011-07-21 17:37:39 +00:00
Benjamin Kramer
727a49e530 Sink parts of TargetRegisterClass into MCRegisterClass. 
llvm-svn: 135683
 2011-07-21 17:26:50 +00:00
Jim Grosbach
5a0277bab7 ARM assembly parsing and encoding for PKHBT and PKHTB instructions. 
llvm-svn: 135682
 2011-07-21 17:23:04 +00:00
Bruno Cardoso Lopes
6934331f4c Added the infrastructute necessary for MIPS JIT support. Patch by Vladimir 
Stefanovic. I removed the part that actually emits the instructions cause
I want that to get in better shape first and in incremental steps. This
also makes it easier to review the upcoming parts.

llvm-svn: 135678
 2011-07-21 16:28:51 +00:00
Jay Foad
42eb18b051 Make better use of ConstantExpr::getGetElementPtr's InBounds parameter. 
llvm-svn: 135676
 2011-07-21 15:15:37 +00:00
Jay Foad
0d9ce71ae1 Sort case-insensitively. 
llvm-svn: 135674
 2011-07-21 14:42:51 +00:00
Jay Foad
d4458dd707 Convert ConstantExpr::getGetElementPtr and 
ConstantExpr::getInBoundsGetElementPtr to use ArrayRef.

llvm-svn: 135673
 2011-07-21 14:31:17 +00:00
Jay Foad
5d70c8e85d Update llvm-gcc-4.2 and dragonegg after converting ConstantFolder APIs 
to use ArrayRef.

llvm-svn: 135672
 2011-07-21 09:19:11 +00:00
Jay Foad
483a783217 Convert ConstantFolder APIs to use ArrayRef. 
llvm-svn: 135671
 2011-07-21 07:52:17 +00:00
Chris Lattner
c4ab50bd33 move tier out of an anonymous namespace, it doesn't make sense 
to for it to be an an anon namespace and be in a header.

Eliminate some extraenous uses of tie.

llvm-svn: 135669
 2011-07-21 06:21:31 +00:00
Bruno Cardoso Lopes
3691063149 - Register v16i16 as valid VR256 register class 
- Add more bitcasts for v16i16
- Since 135661 and 135662 already added the splat logic,
just add one more splat test for v16i16

llvm-svn: 135663
 2011-07-21 02:24:08 +00:00
Bruno Cardoso Lopes
ba1a2a9135 Add support for 256-bit versions of VPERMIL instruction. This is a new 
instruction introduced in AVX, which can operate on 128 and 256-bit vectors.
It considers a 256-bit vector as two independent 128-bit lanes. It can permute
any 32 or 64 elements inside a lane, and restricts the second lane to
have the same permutation of the first one. With the improved splat support
introduced early today, adding codegen for this instruction enable more
efficient 256-bit code:

Instead of:
  vextractf128  $0, %ymm0, %xmm0
  punpcklbw %xmm0, %xmm0
  punpckhbw %xmm0, %xmm0
  vinsertf128 $0, %xmm0, %ymm0, %ymm1
  vinsertf128 $1, %xmm0, %ymm1, %ymm0
  vextractf128  $1, %ymm0, %xmm1
  shufps  $1, %xmm1, %xmm1
  movss %xmm1, 28(%rsp)
  movss %xmm1, 24(%rsp)
  movss %xmm1, 20(%rsp)
  movss %xmm1, 16(%rsp)
  vextractf128  $0, %ymm0, %xmm0
  shufps  $1, %xmm0, %xmm0
  movss %xmm0, 12(%rsp)
  movss %xmm0, 8(%rsp)
  movss %xmm0, 4(%rsp)
  movss %xmm0, (%rsp)
  vmovaps (%rsp), %ymm0
We get:
  vextractf128  $0, %ymm0, %xmm0
  punpcklbw %xmm0, %xmm0
  punpckhbw %xmm0, %xmm0
  vinsertf128 $0, %xmm0, %ymm0, %ymm1
  vinsertf128 $1, %xmm0, %ymm1, %ymm0
  vpermilps $85, %ymm0, %ymm0

llvm-svn: 135662
 2011-07-21 01:55:47 +00:00
Bruno Cardoso Lopes
b16371a45e Improve splat promotion to handle AVX types: v32i8 and v16i16. Also 
refactor the code and add a bunch of comments. The final shuffle
emitted by handling 256-bit types is suitable for the VPERM shuffle
instruction which is going to be introduced in a next commit (with
a testcase which cover this commit)

llvm-svn: 135661
 2011-07-21 01:55:42 +00:00
Bruno Cardoso Lopes
194507cc77 Add aditional patterns for vextractf128 instruction 
llvm-svn: 135660
 2011-07-21 01:55:39 +00:00
Bruno Cardoso Lopes
14c800c1e3 Add aditional patterns for vinsertf128 instruction 
llvm-svn: 135659
 2011-07-21 01:55:36 +00:00
Bruno Cardoso Lopes
a8244d4444 Add v16i16 type to VR256 class 
llvm-svn: 135658
 2011-07-21 01:55:33 +00:00
Bruno Cardoso Lopes
e0d5bd467f Move code around. No functionality changes 
llvm-svn: 135657
 2011-07-21 01:55:30 +00:00
Bruno Cardoso Lopes
60093b6104 Tidy up code 
llvm-svn: 135656
 2011-07-21 01:55:27 +00:00
Andrew Trick
1f9b4f8617 LSR, correct fix for rdar://9786536. Silly casting bug. 
llvm-svn: 135654
 2011-07-21 01:45:54 +00:00
Andrew Trick
ebf9ee5200 LSR must sometimes sign-extend before generating double constants. 
rdar://9786536

llvm-svn: 135650
 2011-07-21 01:05:01 +00:00
Bill Wendling
1f46862df8 Mark instructions which are part of the frame setup with the MachineInstr::FrameSetup flag. 
llvm-svn: 135645
 2011-07-21 00:44:56 +00:00
Andrew Trick
4b641bba84 LSR crashes on an empty IVUsers list. 
rdar://9786536

llvm-svn: 135644
 2011-07-21 00:40:04 +00:00
Evan Cheng
882618fe7d X86 is the only target that uses coff format. This should fixes test failures running on Windows, Cygwin, or MingW hosts. 
llvm-svn: 135639
 2011-07-20 23:53:54 +00:00
NAKAMURA Takumi
83acc80027 docs/GettingStarted.html: Tweak style. 
llvm-svn: 135637
 2011-07-20 23:37:51 +00:00
Evan Cheng
bff5f78cb5 Sink ARMMCExpr and ARMAddressingModes into MC layer. First step to separate ARM MC code from target. 
llvm-svn: 135636
 2011-07-20 23:34:39 +00:00
Bill Wendling
4958d250c9 Remove unused function. 
llvm-svn: 135635
 2011-07-20 23:07:42 +00:00
Bill Wendling
55eb4a26d9 Remove the now defunct getCompactUnwindEncoding method from the frame lowering code. 
llvm-svn: 135634
 2011-07-20 23:04:09 +00:00
Devang Patel
bf27de8340 Refactor. 
llvm-svn: 135633
 2011-07-20 23:00:27 +00:00
NAKAMURA Takumi
4634322bf4 docs/GettingStarted.html: Fix a typo and tweak a command line. 
llvm-svn: 135632
 2011-07-20 22:58:28 +00:00
Devang Patel
284b502be9 There are two ways to map a variable to its lexical scope. Lexical scope information is embedded in MDNode describing the variable. It is also available as a part of DebugLoc attached with DBG_VALUE instruction. DebugLoc attached with an instruction is less reliable in optimized code so use information embedded in the MDNode. 
llvm-svn: 135629
 2011-07-20 22:18:50 +00:00
Eli Friedman
c18314afef Clean up includes of llvm/Analysis/ConstantFolding.h so it's included where it's used and not included where it isn't. 
llvm-svn: 135628
 2011-07-20 21:57:23 +00:00
Devang Patel
9914fe1aca While emitting constant value, look through derived type and use underlying basic type to determine size and signness of the constant value. 
llvm-svn: 135627
 2011-07-20 21:57:04 +00:00