Chris Lattner
1f1d6eb6a9
Fix branches on FP compares
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llvm-svn: 25249
2006-01-12 17:05:32 +00:00
Chris Lattner
03fcd99728
fix a bug in my previous checkin
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llvm-svn: 25244
2006-01-12 07:38:04 +00:00
Chris Lattner
07bdb6319b
Give V8ISD nodes symbolic names in dumps
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llvm-svn: 25243
2006-01-12 07:31:15 +00:00
Chris Lattner
7592fe2d86
invert the sense of this switch and its name
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llvm-svn: 25234
2006-01-12 01:28:56 +00:00
Nate Begeman
cff96008ac
Add bswap, rotl, and rotr nodes
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Add dag combiner code to recognize rotl, rotr
Add ppc code to match rotl
Targets should add rotl/rotr patterns if they have them
llvm-svn: 25222
2006-01-11 21:21:00 +00:00
Chris Lattner
8dd97ae338
This is no longer needed
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llvm-svn: 25219
2006-01-11 19:52:46 +00:00
Chris Lattner
1ffbbc9ebc
Use Evan's outflag stuff to implement V8cmpicc. This allows us to write a
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pattern for SUBCCrr, and makes it trivial to add support for SUBCCri, eliminating
an instruction in the common "setcc X, imm" case.
llvm-svn: 25212
2006-01-11 07:49:38 +00:00
Chris Lattner
c2bd047226
Fix a bug in i32->f64 conversion lowering
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llvm-svn: 25211
2006-01-11 07:27:40 +00:00
Chris Lattner
34c4cddb14
Unbreak ret void :-/
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llvm-svn: 25210
2006-01-11 07:15:43 +00:00
Chris Lattner
d9b3f6a3df
Write this pattern in canonical form, allowing more patterns to match.
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This implements Regression/CodeGen/SparcV8/xnor.ll
llvm-svn: 25209
2006-01-11 07:14:01 +00:00
Evan Cheng
e720cfd690
New DAG node properties SNDPInFlag, SNDPOutFlag, and SNDPOptInFlag to replace
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hasInFlag, hasOutFlag.
llvm-svn: 25155
2006-01-09 18:28:21 +00:00
Chris Lattner
88239024ca
silence a bogus gcc warning
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llvm-svn: 25129
2006-01-06 17:56:38 +00:00
Jim Laskey
41b3ee3c4f
Had expand logic backward.
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llvm-svn: 25105
2006-01-05 01:47:43 +00:00
Jim Laskey
5eddaee9f3
Added initial support for DEBUG_LABEL allowing debug specific labels to be
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inserted in the code.
llvm-svn: 25104
2006-01-05 01:25:28 +00:00
Evan Cheng
0d39dd2664
Remove some dead code.
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llvm-svn: 25102
2006-01-05 00:26:14 +00:00
Evan Cheng
231b11ba87
Added field noResults to Instruction.
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Currently tblgen cannot tell which operands in the operand list are results so
it assumes the first one is a result. This is bad. Ideally we would fix this
by separating results from inputs, e.g. (res R32:$dst),
(ops R32:$src1, R32:$src2). But that's a more distruptive change. Adding
'let noResults = 1' is the workaround to tell tblgen that the instruction does
not produces a result. It works for now since tblgen does not support
instructions which produce multiple results.
llvm-svn: 25017
2005-12-26 09:11:45 +00:00
Evan Cheng
d87688fe72
* Removed the use of FLAG. Now use hasFlagIn and hasFlagOut instead.
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* Added a pseudo instruction (for each target) that represent "return void".
This is a workaround for lack of optional flag operand (return void is not
lowered so it does not have a flag operand.)
llvm-svn: 24997
2005-12-23 22:14:32 +00:00
Chris Lattner
738cec7a6e
not a good idea
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llvm-svn: 24991
2005-12-23 07:37:47 +00:00
Chris Lattner
2e386f9d46
fix something-o
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llvm-svn: 24987
2005-12-23 07:08:39 +00:00
Chris Lattner
a4a2d4c3fe
implement vaarg. Varargs now should work.
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llvm-svn: 24986
2005-12-23 06:37:38 +00:00
Chris Lattner
4e8124bd9b
implement vastart. The dag isel compiles this:
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void test3(va_list Y);
void test2(int F, ...) {
va_list X;
va_start(X, F);
test3(X);
}
into this:
test2:
save -104, %o6, %o6
st %i5, [%i6+88]
st %i4, [%i6+84]
st %i3, [%i6+80]
st %i2, [%i6+76]
st %i1, [%i6+72]
add %i6, 72, %o0
st %o0, [%i6+-4]
call test3
nop
restore %g0, %g0, %g0
retl
nop
The simple isel emits:
test2:
save -96, %o6, %o6
st %i0, [%i6+68]
st %i1, [%i6+72]
st %i2, [%i6+76]
st %i3, [%i6+80]
st %i4, [%i6+84]
st %i5, [%i6+88]
or %g0, 1, %l0
or %g0, 4, %l1
umul %l0, %l1, %l0
add %l0, 7, %l0
and %l0, -8, %l0
sub %o6, %l0, %o6
add %o6, 96, %l0
add %i6, 72, %l1
st %l1, [%l0]
ld [%l0], %o0
call test3
nop
restore %g0, %g0, %g0
retl
nop
llvm-svn: 24985
2005-12-23 06:24:04 +00:00
Chris Lattner
73db2dc9fc
remove benchmark list, remove issues addressed by the dag-dag isel
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llvm-svn: 24984
2005-12-23 06:09:30 +00:00
Chris Lattner
8b2bd265f4
make sure bit_converts are expanded
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llvm-svn: 24978
2005-12-23 05:13:35 +00:00
Chris Lattner
e47f28d044
fix the int<->fp instructions, which apparently take a single float register
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to represent the int part (because it's always 32-bits)
llvm-svn: 24976
2005-12-23 05:00:16 +00:00
Chris Lattner
aaeb6774c7
Use BIT_CONVERT to simplify this code
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llvm-svn: 24975
2005-12-23 02:31:39 +00:00
Chris Lattner
1cbff1f3cd
clean up .td file by using evan's new FLAG thing
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llvm-svn: 24967
2005-12-22 21:18:39 +00:00
Jim Laskey
d82881490c
Disengage DEBUG_LOC from non-PPC targets.
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llvm-svn: 24919
2005-12-21 20:51:37 +00:00
Chris Lattner
39b72c3525
remove dead code
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llvm-svn: 24896
2005-12-21 05:27:51 +00:00
Chris Lattner
338c0b2011
Run lower-switch after lower-invoke.
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Only run lower-allocations and lower-select for the simple isel
llvm-svn: 24881
2005-12-20 08:00:11 +00:00
Chris Lattner
ec177e242d
Reserve G1 for frame offset stuff and use it to handle large stack frames.
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For example, instead of emitting this:
test:
save -40112, %o6, %o6 ;; imm too large
add %i6, -40016, %o0 ;; imm too large
call caller
nop
restore %g0, %g0, %g0
retl
nop
emit this:
test:
sethi 4194264, %g1
or %g1, 848, %g1
save %o6, %g1, %o6
sethi 4194264, %g1
add %g1, %i6, %g1
add %i1, 944, %o0
call caller
nop
restore %g0, %g0, %g0
retl
nop
which doesn't cause the assembler to barf.
llvm-svn: 24880
2005-12-20 07:56:31 +00:00
Chris Lattner
7a430ddf61
Fix pifft by correcting the case when a i64/f64 straddles O5 and memory:
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we were storing into [FP+88] instead of [FP+92].
Improve codegen by emitting [FP+92], instead of emitting a copy of FP into
another GPR which wouldn't be coallesced because FP isn't register allocated.
llvm-svn: 24859
2005-12-19 07:57:53 +00:00
Chris Lattner
3d1946c765
don't emit 'add %o6, 0, %o6' instructions
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llvm-svn: 24857
2005-12-19 02:51:12 +00:00
Chris Lattner
2aeb7fcbb3
Fix calls to functions returning i64
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llvm-svn: 24856
2005-12-19 02:15:51 +00:00
Chris Lattner
63761db672
Correct bool truncstore operand order
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llvm-svn: 24855
2005-12-19 02:06:50 +00:00
Chris Lattner
4fef952e4d
add the other bool zextload as well
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llvm-svn: 24854
2005-12-19 01:44:58 +00:00
Chris Lattner
91caf35bf5
implement zextload bool
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llvm-svn: 24853
2005-12-19 01:43:04 +00:00
Chris Lattner
59f1a92c77
mark some unsupported ops as unsupported
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llvm-svn: 24852
2005-12-19 01:39:40 +00:00
Chris Lattner
480e2f7945
Fix syntax for indirect calls. This fixes Olden/mst
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llvm-svn: 24850
2005-12-19 01:22:53 +00:00
Chris Lattner
bd8b911c46
Keep stack frames 8-byte aligned. This fixes olden/voronoi
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llvm-svn: 24849
2005-12-19 01:15:13 +00:00
Chris Lattner
b10b543e85
apparently rdy isn't actually a psuedo instruction. Use rd %y
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llvm-svn: 24848
2005-12-19 00:53:02 +00:00
Chris Lattner
9e50ecd0d2
add fneg/fabs support for doubles
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llvm-svn: 24847
2005-12-19 00:50:12 +00:00
Chris Lattner
0a579fb2ac
Various cleanups to this pass, no functionality change
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llvm-svn: 24846
2005-12-19 00:46:20 +00:00
Chris Lattner
be1adf763b
add bool truncstores
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llvm-svn: 24845
2005-12-19 00:19:21 +00:00
Chris Lattner
be3df4a199
Elimiante SP and FP, which weren't members of the IntRegs register class
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llvm-svn: 24844
2005-12-19 00:06:52 +00:00
Chris Lattner
fdc05d74a6
The sun assembler only supports .xword in V9 mode.
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llvm-svn: 24842
2005-12-18 23:36:45 +00:00
Chris Lattner
d0e25175d3
Configure the asmwriter to allow constant pools to be printed correctly
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llvm-svn: 24841
2005-12-18 23:35:05 +00:00
Chris Lattner
84a2caf581
add support for integer extloads
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llvm-svn: 24840
2005-12-18 23:18:37 +00:00
Chris Lattner
061cfe15c9
Add support for undef
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llvm-svn: 24839
2005-12-18 23:10:57 +00:00
Chris Lattner
e8dad0dcb9
Add support for calls to external symbols
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llvm-svn: 24838
2005-12-18 23:07:11 +00:00
Chris Lattner
745c88ba10
we have no memcpy
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llvm-svn: 24837
2005-12-18 23:00:27 +00:00