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Commit Graph

93225 Commits

Author SHA1 Message Date
Sean Silva
e1eda4088d [yaml2obj][ELF] Don't do disassembly in this test.
This was causing buildbot failures when build without X86 support.

Is there a way to conditionalize the test on the X86 target being
present?

llvm-svn: 184597
2013-06-21 21:51:15 +00:00
Michael Gottesman
5eaa423430 [objc-arc-opts] Make IsTrackingImpreciseReleases a const method.
Thanks to Bill Wendling for pointing this out!

llvm-svn: 184593
2013-06-21 20:52:49 +00:00
Kevin Enderby
b7f5c9fc9b Improve the time it takes to generating dwarf for assembly source files
that have been run through the 'C' pre-processor.

The implementation of SrcMgr.FindLineNumber() is slow but OK if
it uses its cache when called multiple times with an SMLoc that is
forward of the previous call.

In the case of generating dwarf for assembly source files that have
been run through the 'C' pre-processor we need to calculate the
logical line number based on the last parsed cpp hash file line
comment.  And the current code calls SrcMgr.FindLineNumber()
twice to do this causing its cache not to work and results in very
slow compile times:

% time /Volumes/SandBox/build-llvm/Debug+Asserts/bin/llvm-mc -triple thumbv7-apple-ios -filetype=obj -o /tmp/x.o mscorlib.dll.E -g
672.542u 0.299s 11:13.15 99.9%	0+0k 0+2io 2106pf+0w

So we save the info from the last parsed cpp hash file line comment
to avoid making the second call to SrcMgr.FindLineNumber() most times
and end up with compile times like:

% time /Volumes/SandBox/build-llvm/Debug+Asserts/bin/llvm-mc -triple thumbv7-apple-ios -filetype=obj -o /tmp/x.o mscorlib.dll.E -g
3.404u 0.104s 0:03.80 92.1%	0+0k 0+3io 2105pf+0w

rdar://14156934

llvm-svn: 184592
2013-06-21 20:51:39 +00:00
Michael Liao
d5d892d21f Add '-mcpu=' to prevent breaking on ATOM due to different code schedule
llvm-svn: 184591
2013-06-21 20:22:45 +00:00
Benjamin Kramer
30c35d5305 Revert "BlockFrequency: Saturate at 1 instead of 0 when multiplying a frequency with a branch probability."
This reverts commit r184584. Breaks PPC selfhost.

llvm-svn: 184590
2013-06-21 20:20:27 +00:00
Michael Gottesman
f707efd55b [objc-arc-opts] Now that PtrState.RRI is encapsulated in PtrState, make PtrState.RRI private and delete the TODO.
llvm-svn: 184587
2013-06-21 19:44:30 +00:00
Michael Gottesman
e242fb40f9 [objc-arc-opts] Encapsulated PtrState.RRI.{Calls,ReverseInsertPts} into several methods on PtrState.
llvm-svn: 184586
2013-06-21 19:44:27 +00:00
Benjamin Kramer
3315e168ee BlockFrequency: Saturate at 1 instead of 0 when multiplying a frequency with a branch probability.
Zero is used by BlockFrequencyInfo as a special "don't know" value. It also
causes a sink for frequencies as you can't ever get off a zero frequency with
more multiplies.

This recovers a 10% regression on MultiSource/Benchmarks/7zip. A zero frequency
was propagated into an inner loop causing excessive spilling.

PR16402.

llvm-svn: 184584
2013-06-21 19:30:05 +00:00
Michael Gottesman
8f3eacc90e [objcarcopts] Encapsulated PtrState.RRI.IsTrackingImpreciseRelease() => PtrState.IsTrackingImpreciseRelease().
llvm-svn: 184583
2013-06-21 19:12:38 +00:00
Michael Gottesman
930488133d [objcarcopts] Encapsulate PtrState.RRI.CFGHazardAfflicted via methods PtrState.{IsCFGHazardAfflicted,SetCFGHazardAfflicted}.
llvm-svn: 184582
2013-06-21 19:12:36 +00:00
Justin Holewinski
26b66eafe7 [NVPTX] Add support for selecting CUDA vs OCL mode based on triple
IR for CUDA should use "nvptx[64]-nvidia-cuda", and IR for NV OpenCL should use "nvptx[64]-nvidia-nvcl"

llvm-svn: 184579
2013-06-21 18:51:49 +00:00
Andrew Trick
eb3065a917 Add missing REQUIRES: asserts in crash.ll.
llvm-svn: 184576
2013-06-21 18:47:08 +00:00
Michael Liao
cc3b61f064 Fix PR16360
When (srl (anyextend x), c) is folded into (anyextend (srl x, c)), the
high bits are not cleared. Add 'and' to clear off them.

llvm-svn: 184575
2013-06-21 18:45:27 +00:00
Andrew Trick
777b242083 Update physreg live intervals during remat.
llvm-svn: 184574
2013-06-21 18:33:26 +00:00
Andrew Trick
5d17d8d8d7 Added -precompute-phys-liveness for testing LiveIntervals updates.
llvm-svn: 184573
2013-06-21 18:33:23 +00:00
Andrew Trick
54670161c3 Handle more cases in LiveRangeEdit::eliminateDeadDefs.
Live intervals for dead physregs may be created during coalescing. We
need to update these in the event that their instruction goes away.

crash.ll is the unit test that catches it when MI sched is enabled on
X86.

llvm-svn: 184572
2013-06-21 18:33:20 +00:00
Andrew Trick
fdd89e475c Refactor LiveRangeEdit::eliminateDeadDefs.
I want to add logic to handle more cases.

llvm-svn: 184571
2013-06-21 18:33:17 +00:00
Andrew Trick
8720e81dc3 whitespace
llvm-svn: 184570
2013-06-21 18:33:14 +00:00
Andrew Trick
a02d09e36a Fix a -join-globalcopies bug; handle undef operands.
llvm-svn: 184569
2013-06-21 18:33:11 +00:00
Andrew Trick
b7588112b7 Modify the -join-globalcopies option (off by default).
Always coalesce in forward order to propagate rematerialization.
I'm fixing this option so I can enable it by default soon.

llvm-svn: 184568
2013-06-21 18:33:09 +00:00
Andrew Trick
508cfe81ac Make rematerialization in the coalescer less sensitive to LRG order.
llvm-svn: 184567
2013-06-21 18:33:06 +00:00
Andrew Trick
3586872214 Fix IMULX machine model. Multiple def operands require multiple SchedWrites.
llvm-svn: 184566
2013-06-21 18:33:04 +00:00
Andrew Trick
f74a47a450 MI-Sched: cleanup DEBUG output.
llvm-svn: 184565
2013-06-21 18:33:01 +00:00
Andrew Trick
2436517fbd MI-Sched: Adjust regpressure limits for reserved regs.
llvm-svn: 184564
2013-06-21 18:32:58 +00:00
Ulrich Weigand
3720d45002 [PowerPC] Support R_PPC_REL16 family of relocations
The GNU assembler supports (as extension to the ABI) use of PC-relative
relocations in half16 fields, which allows writing code like:

  li 1, base-.

This patch adds support for those relocation types in the assembler.

llvm-svn: 184552
2013-06-21 14:44:37 +00:00
Ulrich Weigand
d5bb2945ff [PowerPC] Support various tls-related modifiers
The current code base only supports the minimum set of tls-related
relocations and @modifiers that are necessary to support compiler-
generated code.  This patch extends this to the full set defined
in the ABI (and supported by the GNU assembler) for the benefit
of the assembler parser.

llvm-svn: 184551
2013-06-21 14:44:15 +00:00
Ulrich Weigand
325653d5a4 [PowerPC] Support @higher et.al. modifiers
This adds support for the @higher, @highera, @highest, and @highesta
modifers, including some missing relocation types.

llvm-svn: 184550
2013-06-21 14:43:42 +00:00
Ulrich Weigand
283132010a [PowerPC] Support @toc@h modifier
This adds the relocation type and other necessary infrastructure
to use the @toc@h modifier in the assembler.

llvm-svn: 184549
2013-06-21 14:43:10 +00:00
Ulrich Weigand
02d460319a [PowerPC] Support @h modifier
This adds necessary infrastructure to support the @h modifier.
Note that all required relocation types were already present
(and unused).

This patch provides support for using @h in the assembler;
it would also be possible to now use this feature in code
generated by the compiler, but this is not done yet.

llvm-svn: 184548
2013-06-21 14:42:49 +00:00
Ulrich Weigand
1b20b9f662 [PowerPC] Rename some more VK_PPC_ enums
This renames more VK_PPC_ enums, to make them more closely reflect
the @modifier string they represent.  This also prepares for adding
a bunch of new VK_PPC_ enums in upcoming patches.

For consistency, some MO_ flags related to VK_PPC_ enums are
likewise renamed.

No change in behaviour.

llvm-svn: 184547
2013-06-21 14:42:20 +00:00
Kostya Serebryany
874b298dbc add Function::removeFnAttr()
llvm-svn: 184536
2013-06-21 07:38:09 +00:00
Manuel Klimek
02e80d4ff5 Fix an ordering problem in the test.
The output can be in different orders, which breaks the test in some
situations. I have not yet found out what the root cause of the order
difference is. This fixes our internal build. If it is not the right
solution, feel free to roll back.

llvm-svn: 184535
2013-06-21 07:23:14 +00:00
Michael Gottesman
d573fa16a3 [objcarcopts] Encapsulate PtrState.RRI.ReleaseMetadata into the methods PtrState.GetReleaseMetadata() and PtrState.SetReleaseMetadata().
llvm-svn: 184534
2013-06-21 07:03:07 +00:00
Michael Gottesman
8bedb3533f [objcarcopts] Encapsulate PtrState.RRI.IsTailCallRelease into the method PtrState.IsTailCallRelease() and PtrState.SetTailCallRelease().
llvm-svn: 184533
2013-06-21 07:00:44 +00:00
Michael Gottesman
393a22f47e [obcjarcopts] Encapsulate PtrState.RRI.KnownSafe in the methods PtrState.IsKnownSafe and PtrState.SetKnownSafe.
This is apart of a series of patches to encapsulate PtrState.RRI and
make PtrState.RRI a private field of PtrState.

*NOTE* This is actually the second commit in the patch stream. I should
have put this note on the first such commit r184528.

llvm-svn: 184532
2013-06-21 06:59:02 +00:00
Michael Gottesman
bf06a36902 [objcarcopts] Some more minor code cleanups/comment additions.
llvm-svn: 184531
2013-06-21 06:54:31 +00:00
Michael Gottesman
ac9f36ba1c [objcarcopts] Refactor out the RRInfo merging code from PtrState into RRInfo::Merge.
I also added some comments and performed minor code cleanups.

llvm-svn: 184528
2013-06-21 05:42:08 +00:00
Nadav Rotem
232096ea37 SLP Vectorizer: do not search for store-chains that are wider than the vector-register size.
llvm-svn: 184527
2013-06-21 04:18:13 +00:00
Michael Gottesman
fcbaa2ff04 [APFloat] Added missing doxygen module closing statement.
llvm-svn: 184526
2013-06-21 04:14:17 +00:00
David Blaikie
1761f49491 DebugInfo: When asm printing include a '[def]' tag for tag decls that are definitions (& rename the 'fwd' tag to 'decl' for clarity)
This change is version locked with a change in Clang, so expect some
transient buildbot fallout.

llvm-svn: 184525
2013-06-21 03:41:54 +00:00
Meador Inge
864cf3e669 Add a release note for removing the simplify-libcalls pass.
llvm-svn: 184522
2013-06-21 03:08:23 +00:00
Sean Silva
8e27158b1a [docs] Fix broken link.
llvm-svn: 184514
2013-06-21 01:11:52 +00:00
Sean Silva
13fa254a61 [yaml2obj][ELF] Allow expressing undefined symbols.
Previously we unconditionally enforced that section references in
symbols in the YAML had a name that was a section name present in the
object, and linked the references to that section. Now, permit empty
section names (already the default, if the `Section` key is not
provided) to indicate SHN_UNDEF.

llvm-svn: 184513
2013-06-21 01:11:48 +00:00
Sean Silva
c04d8ed7be Unbreak bots. Didn't realize this was a C++11 feature.
llvm-svn: 184508
2013-06-21 00:33:01 +00:00
Sean Silva
5ab882091c [docs] Fix formatting.
'\n' was displaying as 'n'

llvm-svn: 184507
2013-06-21 00:27:54 +00:00
Sean Silva
891dc92008 [yaml2obj][ELF] Don't explicitly set Binding with STB_*
Instead, just have 3 sub-lists, one for each of
{STB_LOCAL,STB_GLOBAL,STB_WEAK}.

This allows us to be a lot more explicit w.r.t. the symbol ordering in
the object file, because if we allowed explicitly setting the STB_*
`Binding` key for the symbol, then we might have ended up having to
shuffle STB_LOCAL symbols to the front of the list, which is likely to
cause confusion and potential for error.

Also, this new approach is simpler ;)

llvm-svn: 184506
2013-06-21 00:27:50 +00:00
Quentin Colombet
bdb6bfd975 ARM: Remove a (false) dependency on the memoryoperand's value as we do not use
it at the moment.
This allows to form more paired loads even when stack coloring pass destroys the
memoryoperand's value.

<rdar://problem/13978317>

llvm-svn: 184492
2013-06-20 22:51:44 +00:00
Ulrich Weigand
cd7cbdb152 [PowerPC] Clean up VK_PPC_TOC... names
This is another minor cleanup; to bring enum names in line
with the corresponding @modifier names, this renames:

  VK_PPC_TOC -> VK_PPC_TOCBASE
  VK_PPC_TOC_ENTRY -> VK_PPC_TOC16

No code change intended.

llvm-svn: 184491
2013-06-20 22:39:42 +00:00
Kevin Enderby
b71a2e2f2e Update the X86 disassembler to use xacquire and xrelease when appropriate.
This is a bit tricky as the xacquire and xrelease hints use the same bytes,
0xf2 and 0xf3, as the repne and rep prefixes.

Fortunately llvm has different llvm MCInst Opcode enums for rep/xrelease
and repne/xacquire. So to make this work a boolean was added the
InternalInstruction struct as part of the Prefix state which is set with the
added logic in readPrefixes() when decoding an instruction to determine
if these prefix bytes are to be disassembled as xacquire or xrelease.  Then
we let the matcher pick the normal prefix instructionID and we change the
Opcode after that when it is set into the MCInst being created.

rdar://11019859

llvm-svn: 184490
2013-06-20 22:32:18 +00:00
Rafael Espindola
ca881d57f8 Add another fixme.
llvm-svn: 184488
2013-06-20 22:07:53 +00:00