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Commit Graph

146879 Commits

Author SHA1 Message Date
Davide Italiano
847c19e1a7 [X86IselLowering] Remove extraneous semicolon. NFCI.
Unbreaks the build with GCC -Werror.

llvm-svn: 299030
2017-03-29 21:34:58 +00:00
Davide Italiano
7e02f90ef5 [DAGCombiner] Remove else after return. NFCI.
llvm-svn: 299022
2017-03-29 19:39:46 +00:00
Adrian McCarthy
272a3a6112 Re-land: "Make NativeExeSymbol a concrete subclass of NativeRawSymbol [PDB]"
This should work on all platforms now that r299006 has landed.  Tested locally
on Windows and Linux.

This moves exe symbol-specific method implementations out of NativeRawSymbol
into a concrete subclass. Also adds implementations for hasCTypes and
hasPrivateSymbols and a simple test to ensure the native reader can access the
summary information for the executable from the PDB.

Original Differential Revision: https://reviews.llvm.org/D31059

llvm-svn: 299019
2017-03-29 19:27:08 +00:00
Rafael Espindola
b8e5619a1d Add ifunc support to ModuleSymbolTable.
Do that by creating a global_values, which is similar to
global_objects, but also iterates over aliases and ifuncs.

llvm-svn: 299018
2017-03-29 19:26:26 +00:00
Matthew Simpson
1604421b6d [InstCombine] Correct the check for vector GEPs
Some of the GEP combines (e.g., descaling) can't handle vector GEPs. We have an
existing check that attempts to bail out if given a vector GEP. However, the
check only tests the GEP's pointer operand. A GEP results in a vector of
pointers if at least one of its operands is vector-typed (e.g., its pointer
operand could be a scalar, but its index could be a vector). We should just
check the type of the GEP itself. This should fix PR32414.

Reference: https://bugs.llvm.org/show_bug.cgi?id=32414
Differential Revision: https://reviews.llvm.org/D31470

llvm-svn: 299017
2017-03-29 18:23:08 +00:00
Sanjay Patel
09bfc97383 [DAGCombiner] unify type checks and add asserts; NFCI
We had a mix of type checks and usage that wasn't very clear.

llvm-svn: 299013
2017-03-29 18:08:01 +00:00
Adrian McCarthy
b68ad18537 llvm-pdbdump: If we don't change the color, don't reset the color.
The -output-color option was successful at suppressing color changes, but
was still allowing color resets.

Differential Revision: https://reviews.llvm.org/D31468

llvm-svn: 299006
2017-03-29 17:11:27 +00:00
Simon Pilgrim
dd2e64944e [X86] Tidied up comment - we don't custom lower add/sub i64 on i686 anymore. NFCI.
llvm-svn: 299004
2017-03-29 15:41:58 +00:00
Sanjay Patel
5e7742bd37 [DAGCombiner] reduce code duplication by rearranging checks; NFCI
llvm-svn: 299002
2017-03-29 15:37:33 +00:00
Daniel Sanders
b04b2a4073 [tablegen][globalisel] Convert the SelectionDAG importer to a tree walking approach. NFC
Summary:
But don't actually inspect the tree any deeper than we already do. This
change is NFC but the next one will enable full traversal of the
source/destination patterns.

Depends on D30535

Reviewers: t.p.northover, qcolombet, aditya_nandakumar, rovka, ab

Subscribers: igorb, dberris, llvm-commits, kristof.beyls

Differential Revision: https://reviews.llvm.org/D30536

llvm-svn: 299001
2017-03-29 15:37:18 +00:00
Simon Pilgrim
1ceebc6423 Spelling mistakes in comments. NFCI.
llvm-svn: 299000
2017-03-29 15:27:24 +00:00
Sven van Haastregt
2b4f5b1715 [MachineVerifier] Drop a spurious const
As of r298987 the argument is a value that we std::move, so it
shouldn't be const anymore.

llvm-svn: 298999
2017-03-29 15:25:06 +00:00
Filipe Cabecinhas
c74a7545e9 Cleanup in preparation for D30703. NFCI
Make the enumerators follow the coding convention and start with OW_...

llvm-svn: 298996
2017-03-29 14:42:27 +00:00
Rafael Espindola
1be3f21c7b Fix GettingStarted.rst statement.
Patch by Wei-Ren Chen!

llvm-svn: 298995
2017-03-29 14:27:38 +00:00
Rafael Espindola
21bf5a962f Remove unused argument.
llvm-svn: 298994
2017-03-29 14:20:38 +00:00
Simon Pilgrim
68651f86d5 [X86][AVX2] Prevent unary interleaving patterns from calling lowerVectorShuffleAsSplitOrBlend (PR32453)
llvm-svn: 298993
2017-03-29 13:00:00 +00:00
Simon Pilgrim
f862ab88d3 [AMDGPU] Tidy up computeKnownBitsForTargetNode/ComputeNumSignBitsForTargetNode arguments. NFCI.
Based on comment in D31249.

llvm-svn: 298991
2017-03-29 12:09:25 +00:00
Simon Pilgrim
40121470b3 [X86][MMX] Added generic sitofp test to compare against existing cvtdq2ps test.
llvm-svn: 298989
2017-03-29 10:47:18 +00:00
Simon Pilgrim
a350d043db [X86] Removed old comment. NFCI.
No longer makes sense as the previous opcode mnemonic it was referring to is long gone.

llvm-svn: 298988
2017-03-29 10:44:51 +00:00
Sven van Haastregt
e9a9d299ab [MachineVerifier] Avoid reference to nullptr
Instantiation of the MachineVerifierPass through
PassInfo::getNormalCtor would yield a segfault since the default
constructor of the MachineVerifierPass takes a reference to nullptr.

Patch by Simone Pellegrini.

Differential Revision: https://reviews.llvm.org/D31387

llvm-svn: 298987
2017-03-29 09:08:25 +00:00
Eric Christopher
24af11b88f Move the x86 cpu feature rtm from Haswell to Skylake matching clang commit r298956.
llvm-svn: 298986
2017-03-29 07:40:44 +00:00
Craig Topper
2eb92d18e0 [AVX-512] Remove explicit KMOVWrk from isel patterns. COPY_TO_REGCLASS to GR32 is enough.
llvm-svn: 298985
2017-03-29 07:31:56 +00:00
Craig Topper
6b818e650d [AVX-512] Remove explicit KMOVWrk/KMOVWKr instructions from patterns where we can just use COPY_TO_REGCLASS instead.
This will result in a KMOVW or KMOVD being emitted during register allocation. And in at least some cases this might allow the register coalescer to remove the copy all together.

llvm-svn: 298984
2017-03-29 06:55:28 +00:00
Dean Michael Berris
37f9897224 [XRay] Update FDR log reader to be aware of buffer sizes per thread.
Summary:
It is problematic for this reader that it expects to read data from
several threads, but the header or message format does not define
framing. Since the buffers are reused, we can't rely on skipping
zeroed out data as a synchronization method either.

There is an argument that this is not version compatible with the format
the reader expected previously. I argue that since the writer wrote garbage
past the end of buffer record, there is no currently working reader to
compromise.

The corresponding writer change is posted to D31384.

Reviewers: dberris, pelikan

Reviewed By: dberris

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D31385

llvm-svn: 298983
2017-03-29 06:10:12 +00:00
Dean Michael Berris
18d768e3bc [XRay][tools] Handle "no subcommand" case for llvm-xray
Summary:
Currently the llvm-xray commandline tool fails to handle the case for
when no subcommand is provided in a graceful manner. This fixes that to
print the help message explaining the subcommands and the available
options.

Reviewers: pcc, pelikan

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D31409

llvm-svn: 298975
2017-03-29 04:55:45 +00:00
Adam Nemet
1431025be1 [SDAG] Remove -enable-fmf-dag
This is no longer needed as spotted by Sanjay in
https://reviews.llvm.org/D31165.

llvm-svn: 298963
2017-03-28 23:46:14 +00:00
Adam Nemet
218d1f1430 [SDAG] Handle VectorReduction in SDNodeFlags::intersectWith
Spotted by Sanjay in https://reviews.llvm.org/D31165

llvm-svn: 298962
2017-03-28 23:46:12 +00:00
Adam Nemet
93f1bd29f8 [SDAG] Add AllowContract to SNodeFlags
Properly propagate the FMF from the LLVM IR to this flag.

This is toward moving fp-contraction=fast from an LLVM TargetOption to a
FastMathFlag in order to fix PR25721.

Differential Revision: https://reviews.llvm.org/D31165

llvm-svn: 298961
2017-03-28 23:46:08 +00:00
Peter Collingbourne
3b3c09c504 More accurate header inclusions. NFC.
llvm-svn: 298960
2017-03-28 23:35:34 +00:00
Craig Topper
bdef90a5b9 [AVX-512] Add test case that was supposed to go with r298957.
llvm-svn: 298959
2017-03-28 23:29:35 +00:00
Craig Topper
c62d4ea689 [AVX-512] Punt on fast-isel of truncates to i1 when AVX512 is enabled.
We should be masking the value and emitting a register copy like we do in non-fast isel. Instead we were just updating the value map and emitting nothing.

After r298928 we started seeing cases where we would create a copy from GR8 to GR32 because the source register in a VK1 to GR32 copy was replaced by the GR8 going into a truncate.

This fixes PR32451.

llvm-svn: 298957
2017-03-28 23:20:37 +00:00
Guozhi Wei
299bb34210 [PPC] In PPCBoolRetToInt change the bool value to i64 if the target is ppc64
In PPCBoolRetToInt bool value is changed to i32 type. On ppc64 it may introduce an extra zero extension for the return value. This patch changes the integer type to i64 to avoid the zero extension on ppc64.

This patch fixed PR32442.

Differential Revision: https://reviews.llvm.org/D31407

llvm-svn: 298955
2017-03-28 22:55:01 +00:00
Sanjay Patel
8716f699b8 [DAGCombiner] reduce code duplication with local variables; NFCI
llvm-svn: 298954
2017-03-28 22:45:53 +00:00
Eric Christopher
39248afe5c Add a similar test for tailcall optimization as in r270287 for aarch64.
llvm-svn: 298952
2017-03-28 22:37:43 +00:00
Peter Collingbourne
e742756dfd LTO: Replace InputFile::Symbol::getFlags() with predicate accessors. NFC.
This makes the predicates independent of the flag representation
and makes the code a little easier to read.

llvm-svn: 298951
2017-03-28 22:31:35 +00:00
Sanjay Patel
9a091cc4ac [DAG] fix formatting; NFC
llvm-svn: 298950
2017-03-28 22:25:25 +00:00
Sanjay Patel
ba68d70bc6 [DAGCombiner] remove redundant conditions and duplicated code; NFCI
llvm-svn: 298949
2017-03-28 22:22:50 +00:00
Stanislav Mekhanoshin
71df23e631 [AMDGPU] Boost unroll threshold for loops reading local memory
This is less important than increase threshold for private memory,
but still brings performance improvements in a wide range of tests.
Unrolling more for local memory serves three purposes: it allows
to combine ds operations if offset becomes static, saves registers
used for offsets in case of static offsets, and allows better lds
latency hiding.

Differential Revision: https://reviews.llvm.org/D31412

llvm-svn: 298948
2017-03-28 22:13:51 +00:00
Stanislav Mekhanoshin
d8025487f6 [AMDGPU] Fix recorded region boundaries in max-occupancy scheduler
This is incorrect to record region boundaries before scheduling,
it may change after scheduling. As a result second pass may see less
instructions to schedule than it should.

Differential Revision: https://reviews.llvm.org/D31434

llvm-svn: 298945
2017-03-28 21:48:54 +00:00
Sanjay Patel
db6be6c8c8 [DAGCombiner] rename variables in foldAndOfSetCCs for easier reading; NFCI
llvm-svn: 298944
2017-03-28 21:40:41 +00:00
Simon Pilgrim
bbb304742b [X86][MMX] Match MMX fp_to_sint conversions from XMM registers
We currently perform the various fp_to_sint XMM conversion and then transfer to the MMX register (on 32-bit via the stack).

This patch improves support for MOVDQ2Q XMM to MMX transfers and adds the XMM->MMX fp_to_sint direct conversion patterns. The SSE2 specifications are the same as for XMM->XMM and XMM->MMX rounding/exceptions/etc.

Differential Revision: https://reviews.llvm.org/D30868

llvm-svn: 298943
2017-03-28 21:32:11 +00:00
Matt Arsenault
a3fa896b52 Fix crashing on TargetCustom PseudoSourceValues
Default to something more reasonable if printCustom isn't implemented.

llvm-svn: 298941
2017-03-28 20:33:12 +00:00
Sanjay Patel
a9ea65ebd8 [DAGCombiner] clean up foldAndOfSetCCs; NFCI
1. Fix bogus comment.
2. Early exit to reduce indent.
3. Change node pointer param to what it really is: an SDLoc.

llvm-svn: 298940
2017-03-28 20:28:16 +00:00
Adam Nemet
2cc291ac33 [IR] Add AllowContract to FastMathFlags
-ffp-contract=fast does not currently work with LTO because it's passed as a
TargetOption to the backend rather than in the IR. This adds it to
FastMathFlags.

This is toward fixing PR25721

Differential Revision: https://reviews.llvm.org/D31164

llvm-svn: 298939
2017-03-28 20:11:52 +00:00
Sanjay Patel
dc461ee7d6 [DAGCombiner] add helper function for and-of-setcc folds; NFC
This is just a cut and paste followed by clang-format. Clean up to follow.

llvm-svn: 298938
2017-03-28 19:58:46 +00:00
Mehdi Amini
041bfe8535 Add support for -fno-builtin to LTO and ThinLTO to libLTO
Reviewers: tejohnson, pcc

Subscribers: Prazek, dexonsmith, llvm-commits

Differential Revision: https://reviews.llvm.org/D30791

llvm-svn: 298936
2017-03-28 18:55:44 +00:00
Stanislav Mekhanoshin
cd4bc62dff [AMDGPU] Split -amdgpu-early-inline-all option
Previously it was covered by the internalization. It turns out we cannot
run internalizer in FE, it break separate compilation tests. Thus early
inliner gets its own option.

Differential Revision: https://reviews.llvm.org/D31429

llvm-svn: 298935
2017-03-28 18:23:24 +00:00
Sanjay Patel
f3276fa38d [x86] use VPMOVMSK to replace memcmp libcalls for 32-byte equality
Follow-up to:
https://reviews.llvm.org/rL298775

llvm-svn: 298933
2017-03-28 17:23:49 +00:00
Weiming Zhao
c101ae18cb Revert "Dont emit Mapping symbols for sections that contain only data."
It breaks some lld tests.

This reverts commit 3a50eea6d9732ab40e9a7aebe6be777b53a8b35c.

llvm-svn: 298932
2017-03-28 17:15:11 +00:00
Nirav Dave
c22fdf2f6a [SDAG] Deal with deleted node in PromoteIntShiftOp
Deal with case that initial node is deleted during dag-combine leading
to an assertional failure in promoteIntShiftOp.

Fixes PR32420.

Reviewers: spatel, RKSimon

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D31403

llvm-svn: 298931
2017-03-28 17:09:49 +00:00