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90 Commits

Author SHA1 Message Date
Elena Demikhovsky
b3422ddc5e AVX-512: optimized a shuffle pattern to VINSERTI64x4. 
Added intrinsics for VPERMT2PS/PD/D/Q instructions.

llvm-svn: 207513
 2014-04-29 09:09:15 +00:00
Elena Demikhovsky
0038f7ae47 AVX-512: store and truncstore for i1 values 
llvm-svn: 206897
 2014-04-22 14:13:10 +00:00
Robert Khasanov
5fa2a3546f [AVX512] Implemented integer conversions up/down with masking. 
Added encoding tests.

llvm-svn: 206884
 2014-04-22 11:36:19 +00:00
Filipe Cabecinhas
1ca83b7941 Rename X86insrtps to the proper instruction name. 
Summary:
The INSERTPS pattern fragment was called insrtps (mising 'e'), which
would make it harder to grep for the patterns related to this instruction.
Renaming it to use the proper instruction name.

Reviewers: nadav

CC: llvm-commits

Differential Revision: http://reviews.llvm.org/D3443

llvm-svn: 206779
 2014-04-21 20:07:29 +00:00
Elena Demikhovsky
56ab81fd87 AVX-512: insert element to mask vector; store i1 data 
Implemented INSERT_VECTOR_ELT operation for v16i1 and v8i1 vectors;
Implemented "store" for i1 type

llvm-svn: 205850
 2014-04-09 12:37:50 +00:00
Elena Demikhovsky
73f5b6faba AVX-512: Added fp_to_uint and uint_to_fp patterns. 
llvm-svn: 205754
 2014-04-08 07:24:02 +00:00
Robert Khasanov
37729a0b8e Test commit. 
llvm-svn: 205214
 2014-03-31 16:01:38 +00:00
Elena Demikhovsky
624ece9d50 AVX-512: Implemented masking for integer arithmetic & logic instructions. 
By Robert Khasanov rob.khasanov@gmail.com

llvm-svn: 204906
 2014-03-27 09:45:08 +00:00
Cameron McInally
8872097c93 Fix AVX512 Gather and Scatter execution domains. 
llvm-svn: 204804
 2014-03-26 13:50:50 +00:00
Elena Demikhovsky
d3e6f6628c AVX-512: masked load/store + intrinsics for them. 
llvm-svn: 203790
 2014-03-13 12:05:52 +00:00
Elena Demikhovsky
71d04d27da AVX-512: Added rrk, rrkz, rmk, rmkz, rmbk, rmbkz versions of AVX512 FP packed instructions, added encoding tests for them. 
By Robert Khazanov.

llvm-svn: 203098
 2014-03-06 08:45:30 +00:00
Elena Demikhovsky
838b163a58 AVX-512: Fixed extract_vector_elt for v8i1 vector 
llvm-svn: 202624
 2014-03-02 09:19:44 +00:00
Elena Demikhovsky
ade0be1dbb AVX-512: Fixed encoding of VPCMPEQ and VPCMPGT 
llvm-svn: 202015
 2014-02-24 10:08:30 +00:00
Elena Demikhovsky
1804845947 AVX-512: Fixed encoding of VPTESTMQ 
llvm-svn: 201980
 2014-02-23 14:28:35 +00:00
Elena Demikhovsky
af8e1ef280 AVX-512: Assembly parsing of broadcast semantic in AVX-512; imlemented by Nis Zinovy (zinovy.y.nis@intel.com) 
Fixed truncate i32 to i1; a test will be provided in the next commit.

llvm-svn: 201757
 2014-02-20 06:34:39 +00:00
Cameron McInally
7173a45caf Fix AVX512 vector sqrt assembly strings. 
llvm-svn: 201681
 2014-02-19 15:16:09 +00:00
Craig Topper
de78f4304d Add an x86 prefix encoding for instructions that would decode to a different instruction with 0xf2/f3/66 were in front of them, but don't themselves have a prefix. For now this doesn't change any bbehavior, but plan to use it to fix some bugs in the disassembler. 
llvm-svn: 201538
 2014-02-18 00:21:49 +00:00
Elena Demikhovsky
0e85630ee2 AVX-512: implemented zext fron i1 to i16 
llvm-svn: 201502
 2014-02-17 07:29:33 +00:00
Elena Demikhovsky
2cdad2b3d4 AVX-512: simpyfied BUILD_VECTOR for masks; fixed cmp/test sequence 
llvm-svn: 201487
 2014-02-16 11:34:23 +00:00
Elena Demikhovsky
ac4dfca982 AVX-512: Optimized BUILD_VECTOR pattern; 
fixed encoding of VEXTRACTPS instruction.

llvm-svn: 201134
 2014-02-11 07:25:59 +00:00
Elena Demikhovsky
110d93ce93 AVX-512: Fixed extract_vector_elt for v16i1 and v8i1 vectors. 
llvm-svn: 201066
 2014-02-10 07:02:39 +00:00
Elena Demikhovsky
2e0202b75e AVX-512: Added intrinsic for cvtph2ps. 
Added VPTESTNM instruction.
Added a pattern to vselect (lit tests will follow).

llvm-svn: 200823
 2014-02-05 07:05:03 +00:00
Craig Topper
f97f309449 Simplify some x86 format classes and remove some ambiguities in their application. 
llvm-svn: 200608
 2014-02-01 08:17:56 +00:00
Craig Topper
7940cc70b4 Remove duplicate pattern and add predicate checks on other patterns. 
llvm-svn: 200455
 2014-01-30 06:03:19 +00:00
Elena Demikhovsky
6f951ffaa0 AVX-512: added VPERM2D VPERM2Q VPERM2PS VPERM2PD instructions, 
they give better sequences than VPERMI

llvm-svn: 199893
 2014-01-23 14:27:26 +00:00
Elena Demikhovsky
4e0fae8031 AVX-512: optimized scalar compare patterns 
removed AVX512SI format, since it is similar to AVX512BI.

llvm-svn: 199217
 2014-01-14 15:10:08 +00:00
Craig Topper
1c1ecbff81 Separate the concept of 16-bit/32-bit operand size controlled by 0x66 prefix and the current mode from the concept of SSE instructions using 0x66 prefix as part of their encoding without being affected by the mode. 
This should allow SSE instructions to be encoded correctly in 16-bit mode which r198586 probably broke.

llvm-svn: 199193
 2014-01-14 07:41:20 +00:00
Elena Demikhovsky
e635ade802 AVX-512: Embedded Rounding Control - encoding and printing 
Changed intrinsics for vrcp14/vrcp28 vrsqrt14/vrsqrt28 - aligned with GCC.

llvm-svn: 199102
 2014-01-13 12:55:03 +00:00
Elena Demikhovsky
1ecccf9364 AVX-512: Added more intrinsics for pmin/pmax, pabs, blend, pmuldq. 
llvm-svn: 198745
 2014-01-08 10:54:22 +00:00
Elena Demikhovsky
591c25725f AVX-512: added intrinsic vcvtpd2ps (with rounding mode and without) 
llvm-svn: 198593
 2014-01-06 08:45:54 +00:00
Elena Demikhovsky
935f81172d AVX-512: changed property name from "neverHasSideEffects=1" to "hasSideEffects=0", added this property to VMOVSS/VMOVSD; 
Optimized a truncate pattern.

llvm-svn: 198562
 2014-01-05 14:21:07 +00:00
Elena Demikhovsky
034a667c24 AVX-512: Added more intrinsics for convert and min/max. 
Removed vzeroupper from AVX-512 mode - our optimization gude does not recommend to insert vzeroupper at all.

llvm-svn: 198557
 2014-01-05 10:46:09 +00:00
Craig Topper
eea372cfa3 Mark x86 _alt instructions as AsmParserOnly so they will be omitted from disassembler without string matches. 
llvm-svn: 198545
 2014-01-05 04:55:55 +00:00
Craig Topper
4a48c26e38 Add a new x86 specific instruction flag to force some isCodeGenOnly instructions to go through to the disassembler tables without resorting to string matches. Apply flag to all _REV instructions. 
llvm-svn: 198543
 2014-01-05 04:17:28 +00:00
Craig Topper
57b949fa83 Mark all x86 Int_ and _Int patterns as isCodeGenOnly so the disassembler table builder doesn't need to string match them to exclude them. 
llvm-svn: 198323
 2014-01-02 17:28:14 +00:00
Elena Demikhovsky
7174584583 AVX-512: Added intrinsics for vcvt, vcvtt, vrndscale, vcmp 
Printing rounding control.
Enncoding for EVEX_RC (rounding control).

llvm-svn: 198277
 2014-01-01 15:12:34 +00:00
Elena Demikhovsky
ee5004d112 AVX-512: Result type of scalar SETCC is MVT::i1 for AVX-512. 
llvm-svn: 198008
 2013-12-25 10:06:40 +00:00
Elena Demikhovsky
2d23dc9650 AVX-512: fixed some patterns for MVT::i1 
llvm-svn: 197981
 2013-12-24 14:24:07 +00:00
Elena Demikhovsky
39275c48ca AVX512: SETCC returns i1 for AVX-512 and i8 for all others 
llvm-svn: 197876
 2013-12-22 10:13:18 +00:00
Elena Demikhovsky
241694a7bc AVX-512: Added implementation of CONCAT_VECTORS for v8i1 vectors (by Alexey Bader). 
Added implementation of "truncate" from integer type (i64/i32/i16/i8) to i1.

llvm-svn: 197482
 2013-12-17 08:33:15 +00:00
Elena Demikhovsky
b43ccbc3f7 AVX-512: Added legal type MVT::i1 and VK1 register for it. 
Added scalar compare VCMPSS, VCMPSD.
Implemented LowerSELECT for scalar FP operations.
I replaced FSETCCss, FSETCCsd with one node type FSETCCs.
Node extract_vector_elt(v16i1/v8i1, idx) returns an element of type i1.

llvm-svn: 197384
 2013-12-16 13:52:35 +00:00
Elena Demikhovsky
154413adc2 AVX-512: Removed "z" suffix from AVX-512 instructions, since it is incompatible with GCC. 
I moved a test from avx512-vbroadcast-crash.ll to avx512-vbroadcast.ll
I defined HasAVX512 predicate as AssemblerPredicate. It means that you should invoke llvm-mc with "-mcpu=knl" to get encoding for AVX-512 instructions. I need this to let AsmMatcher to set different encoding for AVX and AVX-512 instructions that have the same mnemonic and operands (all scalar instructions).

llvm-svn: 197041
 2013-12-11 14:31:04 +00:00
Elena Demikhovsky
57057960b0 AVX-512: changed intrinsics for mask operations 
llvm-svn: 196918
 2013-12-10 13:53:10 +00:00
Elena Demikhovsky
b3a0e7bbed AVX-512: Changed intrinsics of VPCONFLICT to match GCC builtin form 
llvm-svn: 196914
 2013-12-10 11:58:35 +00:00
Cameron McInally
ca9f2bc25b Update AVX512 vector blend intrinsic names. 
llvm-svn: 196581
 2013-12-06 13:35:35 +00:00
Cameron McInally
675f9245aa Add AVX512 patterns for v16i32 broadcast and v2i64 zero extend load. 
Patch by Aleksey Bader.

llvm-svn: 196435
 2013-12-05 00:11:25 +00:00
Cameron McInally
97a9fa294d Fix assembly syntax for AVX512 vector blend instructions. 
llvm-svn: 196393
 2013-12-04 18:05:36 +00:00
Elena Demikhovsky
bac904c06d AVX-512: Handled extractelement from mask vector; 
Added VMOSHDUP/VMOVSLDUP shuffle instructions.

llvm-svn: 194691
 2013-11-14 11:29:27 +00:00
Cameron McInally
02e4f56c18 Add support for AVX512 masked vector blend intrinsics. 
llvm-svn: 194006
 2013-11-04 19:14:56 +00:00
Elena Demikhovsky
841cd7d09e AVX-512: added VPCONFLICT instruction and intrinsics, 
added EVEX_KZ to tablegen

llvm-svn: 193959
 2013-11-03 13:46:31 +00:00