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2144db7a6c
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13228 Commits

Author SHA1 Message Date
Chris Lattner
2144db7a6c Allow SCALAR_TO_VECTOR to be custom lowered. 
llvm-svn: 26867
 2006-03-19 06:47:21 +00:00
Chris Lattner
6bb71c2ebd Add SCALAR_TO_VECTOR support 
llvm-svn: 26866
 2006-03-19 06:31:19 +00:00
Chris Lattner
80f9f7138a PPC doesn't have SCALAR_TO_VECTOR 
llvm-svn: 26865
 2006-03-19 06:17:19 +00:00
Chris Lattner
89bc332152 add support for vector undef 
llvm-svn: 26863
 2006-03-19 06:10:09 +00:00
Evan Cheng
9f00d55227 Remind us of exit value substitution 
llvm-svn: 26862
 2006-03-19 06:09:23 +00:00
Evan Cheng
99327f9351 Turning on LSR by default 
llvm-svn: 26861
 2006-03-19 06:08:49 +00:00
Evan Cheng
98b79bf7ec Remember which tests are hurt by LSR. 
llvm-svn: 26860
 2006-03-19 06:08:11 +00:00
Chris Lattner
6c7486ff4d Don't bother storing undef elements of BUILD_VECTOR's 
llvm-svn: 26858
 2006-03-19 05:46:04 +00:00
Chris Lattner
a9b4a2ab99 minor fixes 
llvm-svn: 26857
 2006-03-19 05:43:01 +00:00
Chris Lattner
d3910ca755 notes 
llvm-svn: 26856
 2006-03-19 05:33:30 +00:00
Chris Lattner
b46a4c28ad we don't use lmw/stmw. When we want them they are easy enough to add 
llvm-svn: 26853
 2006-03-19 04:33:37 +00:00
Chris Lattner
52a132ab18 Implement expand of BUILD_VECTOR containing variable elements. 
This implements CodeGen/Generic/vector.ll:test_variable_buildvector

llvm-svn: 26852
 2006-03-19 04:18:56 +00:00
Chris Lattner
c9c081fc40 fold insertelement(buildvector) -> buildvector if the inserted element # is 
a constant.  This implements test_constant_insert in CodeGen/Generic/vector.ll

llvm-svn: 26851
 2006-03-19 01:27:56 +00:00
Chris Lattner
bf4033f63a implement basic support for INSERT_VECTOR_ELT. 
llvm-svn: 26849
 2006-03-19 01:17:20 +00:00
Chris Lattner
1bd0aaf2b8 rename these nodes 
llvm-svn: 26848
 2006-03-19 01:13:28 +00:00
Chris Lattner
db243940bd Rename ConstantVec -> BUILD_VECTOR and VConstant -> VBUILD_VECTOR. Allow*BUILD_VECTOR to take variable inputs. 
llvm-svn: 26847
 2006-03-19 00:52:58 +00:00
Chris Lattner
855e3c878b implement vector.ll:test_undef 
llvm-svn: 26845
 2006-03-19 00:20:20 +00:00
Chris Lattner
367f9aef95 Fix the remaining bugs in the vector expansion rework I commited yesterday. 
This fixes CodeGen/Generic/vector.ll

llvm-svn: 26843
 2006-03-19 00:07:49 +00:00
Evan Cheng
7955a187b1 - Fixed a bogus if condition. 
- Added more debugging info.
- Allow reuse of IV of negative stride. e.g. -4 stride == 2 * iv of -2 stride.

llvm-svn: 26841
 2006-03-18 08:03:12 +00:00
Chris Lattner
35b6933508 Change the structure of lowering vector stuff. Note: This breaks some 
things.

llvm-svn: 26840
 2006-03-18 01:44:44 +00:00
Evan Cheng
8dd794ea70 Use the generic vector register classes VR64 / VR128 rather than V4F32, 
V8I16, etc.

llvm-svn: 26838
 2006-03-18 01:23:20 +00:00
Evan Cheng
afe1ee3496 Sort StrideOrder so we can process the smallest strides first. This allows 
for more IV reuses.

llvm-svn: 26837
 2006-03-18 00:44:49 +00:00
Nate Begeman
793c8136ae Fix subfic to match subc by default instead of sub so that it is correctly 
cost-modeled as producing a flag.  This fixes the test I just added for neg

llvm-svn: 26835
 2006-03-17 22:41:37 +00:00
Evan Cheng
f4774c9091 Darwin should use _setjmp/_longjmp instead of setjmp/longjmp. 
llvm-svn: 26833
 2006-03-17 20:31:41 +00:00
Evan Cheng
ee1a44d5d8 Move some pattern fragments to the right files. 
llvm-svn: 26831
 2006-03-17 19:55:52 +00:00
Chris Lattner
3358842eb5 add a couple enum values 
llvm-svn: 26830
 2006-03-17 19:53:59 +00:00
Evan Cheng
fa1b885135 Allow users of iv / stride to be rewritten with expression that is a multiply 
of a smaller stride even if they have a common loop invariant expression part.

llvm-svn: 26828
 2006-03-17 19:52:23 +00:00
Chris Lattner
647503bccc Disable x86 fastcc from passing args in registers 
llvm-svn: 26824
 2006-03-17 17:27:47 +00:00
Reid Spencer
5f06b17693 Fix use of LEVEL. 
llvm-svn: 26822
 2006-03-17 07:39:44 +00:00
Reid Spencer
86ed2295c0 Two fixes: 
1. Allow building of Intrinsics.gen to work for srcdir != objdir
2. Add a rule for installation of Intrinsics.gen.

llvm-svn: 26819
 2006-03-17 06:27:06 +00:00
Chris Lattner
a71bc63ced Parameterize the number of integer arguments to pass in registers 
llvm-svn: 26818
 2006-03-17 05:10:20 +00:00
Evan Cheng
1f5cb60f28 Also fold MOV8r0, MOV16r0, MOV32r0 + store to MOV8mi, MOV16mi, and MOV32mi. 
llvm-svn: 26817
 2006-03-17 02:36:22 +00:00
Evan Cheng
fc79bdafbe Add some missing entries to X86RegisterInfo::foldMemoryOperand(). e.g. 
ADD32ri8.

llvm-svn: 26816
 2006-03-17 02:25:01 +00:00
Evan Cheng
d16fa97974 - Nuke 16-bit SBB instructions. We'll never use them. 
- Nuke a bogus comment.

llvm-svn: 26815
 2006-03-17 02:24:04 +00:00
Nate Begeman
42736d46b2 Remove BRTWOWAY* 
Make the PPC backend not dependent on BRTWOWAY_CC and make the branch
selector smarter about the code it generates, fixing a case in the
readme.

llvm-svn: 26814
 2006-03-17 01:40:33 +00:00
Chris Lattner
87dbd49cbe remove dead variable 
llvm-svn: 26813
 2006-03-16 23:52:08 +00:00
Chris Lattner
7e80a5a16b Fix a problem fully scalarizing values. 
llvm-svn: 26811
 2006-03-16 23:05:19 +00:00
Evan Cheng
33055a8aba A new entry. 
llvm-svn: 26810
 2006-03-16 22:44:22 +00:00
Nate Begeman
63c4456867 Notes on how to kill the eeevil brtwoway, and make ppc branch selector 
more target independant, generate better code, and be less conservative.

llvm-svn: 26809
 2006-03-16 22:37:48 +00:00
Chris Lattner
f2008cb73b Strangely, calls clobber call-clobbered vector regs. Whodathoughtit? 
llvm-svn: 26808
 2006-03-16 22:35:59 +00:00
Chris Lattner
8a756c5171 add a note 
llvm-svn: 26807
 2006-03-16 22:25:55 +00:00
Chris Lattner
57773fdac1 teach the ppc backend how to spill/reload vector regs 
llvm-svn: 26806
 2006-03-16 22:24:02 +00:00
Chris Lattner
661ee5d3c1 add callee saved vector regs 
llvm-svn: 26805
 2006-03-16 22:07:06 +00:00
Evan Cheng
0e1abe6e19 Bug fix: condition inverted. 
llvm-svn: 26804
 2006-03-16 22:02:48 +00:00
Evan Cheng
db35180b27 For each loop, keep track of all the IV expressions inserted indexed by 
stride. For a set of uses of the IV of a stride which is a multiple
of another stride, do not insert a new IV expression. Rather, reuse the
previous IV and rewrite the uses as uses of IV expression multiplied by
the factor.

e.g.
x = 0 ...; x ++
y = 0 ...; y += 4
then use of y can be rewritten as use of 4*x for x86.

llvm-svn: 26803
 2006-03-16 21:53:05 +00:00
Evan Cheng
cad75d9f0c Added a way for TargetLowering to specify what values can be used as the 
scale component of the target addressing mode.

llvm-svn: 26802
 2006-03-16 21:47:42 +00:00
Chris Lattner
7f5361757b in functions that use a lot of callee saved regs, this can be more than 
5 instructions away.

llvm-svn: 26801
 2006-03-16 21:31:45 +00:00
Chris Lattner
bf153651b1 Add support for copying registers. still needed: spilling and reloading them 
llvm-svn: 26800
 2006-03-16 20:03:58 +00:00
Chris Lattner
413bb13b27 Add support for CopyFromReg from vector values. Note: this doesn't support 
illegal vector types yet!

llvm-svn: 26799
 2006-03-16 19:57:50 +00:00
Chris Lattner
34f2e70f60 Teach CreateRegForValue how to handle vector types. 
llvm-svn: 26798
 2006-03-16 19:51:18 +00:00