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Commit Graph

215897 Commits

Author SHA1 Message Date
Florian Hahn
ed4cb46d3b [Matrix] Fix some newpm check lines, which fail on some bots. 2021-05-16 13:47:46 +01:00
Florian Hahn
c5a35017b8 [Matrix] Extend test to also check new PM pipeline. 2021-05-16 13:08:51 +01:00
Florian Hahn
fb2b5fc8db [PhaseOrdering] Add test for insert/extract code for matrixes. 2021-05-16 12:52:20 +01:00
Florian Hahn
e3158361a1 [VectorCombine] Add tests with and & urem guaranteeing idx is valid. 2021-05-16 12:51:53 +01:00
Roman Lebedev
ecdf27a217 [NFC][X86][Costmodel] Add tests for load/store with i1 element type 2021-05-16 14:29:37 +03:00
Nikita Popov
35da6f5202 Revert "[CaptureTracking] Do not check domination"
This reverts commit 6b8b43e7af3074124e3c9e429e1fb08165799be4.

This causes clang test to fail (CodeGenObjC/synchronized.m).
Revert until I can figure out whether that's an expected change.
2021-05-16 11:04:45 +02:00
Nikita Popov
e9761e11f7 [CaptureTracking] Do not check domination
For the CapturesBefore tracker, it is sufficient to check that
I can not reach BeforeHere. This does not necessarily require
that BeforeHere dominates I, it can also occur if the capture
happens on an entirely disjoint path.

This change was previously accepted in D90688, but had to be
reverted due to large compile-time impact in some cases: It
increases the number of reachability queries that are performed.

After recent changes, the compile-time impact is largely mitigated,
so I'm reapplying this patch. The remaining compile-time impact
is largely proportional to changes in code-size.
2021-05-16 10:49:36 +02:00
Nikita Popov
d123c17f13 [MemCpyOpt] Add test for unreachable capture (NFC)
This is based on the test from D90688, without the argmemonly
attribute. The argmemonly attribute would guaranteed no modref
by itself and the question of captures would not arise in the
first place.
2021-05-16 10:48:52 +02:00
Jinsong Ji
5c2441043a [AIX][AsmPrinter] Print Global Variable in comments
The default AsmPrinter print GV in comments,
AIX should do so too.

This also fix LLVM :: CodeGen/Generic/inline-asm-mem-clobber.ll.

Reviewed By: hubert.reinterpretcast

Differential Revision: https://reviews.llvm.org/D102534
2021-05-16 03:04:46 +00:00
Tomasz Miąsko
5f48540e55 [Demangle][Rust] Parse trait definitions
Part of https://reviews.llvm.org/D102549
2021-05-15 23:52:25 +02:00
Tomasz Miąsko
0529498484 [Demangle][Rust] Parse trait implementations
Part of https://reviews.llvm.org/D102549
2021-05-15 23:52:25 +02:00
Tomasz Miąsko
160e922bf8 [Demangle][Rust] Parse inherent implementations
Part of https://reviews.llvm.org/D102549
2021-05-15 23:52:25 +02:00
Kuter Dinel
ee05e77f81 [Attributor] Call site specific AAValueSimplification and AAIsDead.
This patch makes it possible to do call site specific deductions
for AAValueSimplification and AAIsDead.

Reviewed By: jdoerfert

Differential Revision: https://reviews.llvm.org/D84722
2021-05-15 21:39:07 +00:00
Simon Pilgrim
a182c10403 [X86] Remove unused check-prefixes 2021-05-15 22:05:02 +01:00
Nikita Popov
0f909bf1fc [CaptureTracking] Only check reachability for capture candidates
Reachability queries are very expensive, and currently performed
for each instruction we look at, even though most of them will
not lead to a capture and are thus ultimately irrelevant. It is
more efficient to walk a few unnecessary instructions than to
perform unnecessary reachability queries.

Theoretically, this may produce worse results, because the additional
instructions considered may cause us to hit the use count limit
earlier. In practice, this does not appear to be a problem, e.g.
on test-suite O3 we report only one more captured-before with this
change, with no resulting codegen differences.

This makes PointerMayBeCapturedBefore() significantly cheaper in
practice, hopefully allowing it to be used in more places.
2021-05-15 22:57:56 +02:00
Simon Pilgrim
12eb3255f8 [X86][SSE] Add SSE3 coverage to PHADD/SUB generation tests
This would have caught the regression identified in rGc012a388a15b.
2021-05-15 21:25:46 +01:00
Alex Orlov
bd1969f7e2 NFC. Refactored DIPrinter for support embedded source.
This patch introduces source loading and pruning functions.
It will allow to use the DWARF embedded source and use the same code for JSON printout.
No functional changes.

Reviewed By: dblaikie

Differential Revision: https://reviews.llvm.org/D102539
2021-05-15 23:01:12 +04:00
Pengxuan Zheng
3d401a1bf6 Support GCC's -fstack-usage flag
This patch adds support for GCC's -fstack-usage flag. With this flag, a stack
usage file (i.e., .su file) is generated for each input source file. The format
of the stack usage file is also similar to what is used by GCC. For each
function defined in the source file, a line with the following information is
produced in the .su file.

<source_file>:<line_number>:<function_name> <size_in_byte> <static/dynamic>

"Static" means that the function's frame size is static and the size info is an
accurate reflection of the frame size. While "dynamic" means the function's
frame size can only be determined at run-time because the function manipulates
the stack dynamically (e.g., due to variable size objects). The size info only
reflects the size of the fixed size frame objects in this case and therefore is
not a reliable measure of the total frame size.

Reviewed By: MaskRay

Differential Revision: https://reviews.llvm.org/D100509
2021-05-15 10:22:49 -07:00
Nico Weber
342cc0a8e8 Revert "[X86][SSE] Pull out combineToHorizontalAddSub helper from inside (F)ADD/SUB combines. NFCI."
This reverts commit b95a103808acfd8f33290d3e80e28af434454b28.
Makes clang assert very early in a Chromium build. See
https://bugs.chromium.org/p/chromium/issues/detail?id=1209490#c1
for a standalone repro.
2021-05-15 12:20:02 -04:00
David Green
1a47831c3d [ARM] Add an extra memset test showing reverted WLSTP loops. NFC 2021-05-15 16:48:58 +01:00
Simon Pilgrim
67ff1bc63e [X86] X86OptimizeLEAPass::replaceDebugValue - take a copy of the DebugLoc not a reference as it may be deleted.
Fixes msan warning due to rG9ca2c50b3601
2021-05-15 16:28:20 +01:00
Simon Pilgrim
eae2fe148f [X86] X86CmovConverterPass::convertCmovInstsToBranches - take a copy of the DebugLoc not a reference as it may be deleted.
Fixes msan warning due to rG9ca2c50b3601
2021-05-15 16:13:34 +01:00
Simon Pilgrim
919f54daef Revert rG632668c1c0e7dcf97154d2e377491cdc8cb6963c : "[TableGen] TreePatternNode::isIsomorphicTo - early out for matching leafs. NFCI."
Revert premature (and very broken....) experimental commit.
2021-05-15 15:49:14 +01:00
Simon Pilgrim
7e5bfbbe69 [TableGen] TreePatternNode::isIsomorphicTo - early out for matching leafs. NFCI.
If the leafs are the same then no need to perform DefInit matching.
2021-05-15 15:34:43 +01:00
Simon Pilgrim
b3e6ab1f9d X86SpeculativeLoadHardeningPass::hardenValueInRegister - assert that we have a i8/i16/i32/i64 sized register. NFCI.
Silence static analyzer warning for out-of-range access to the SubRegImms[] array.
2021-05-15 15:13:28 +01:00
Simon Pilgrim
3ea7aceac7 SampleProfileLoader::inlineHotFunctionsWithPriority - Fix uninitialized variable warning. NFCI.
findIndirectCallFunctionSamples will leave Sum uninitialized if it returns an empty vector, we don't really use Sum in this case (but we do make a copy that isn't used either) - so ensure we initialize the value to zero to at least silence the static analysis warning.
2021-05-15 15:02:52 +01:00
Simon Pilgrim
109645876c IfConverter::MeetIfcvtSizeLimit - Fix uninitialized variable warnings. NFCI.
Ensure the duplication instruction counts are initialized to zero (even though they aren't used) to silence static analysis warnings.
2021-05-15 14:51:54 +01:00
Nikita Popov
fffdcaf76a [CFG] Move reachable from entry checks into basic block variant
These checks are not specific to the instruction based variant of
isPotentiallyReachable(), they are equally valid for the basic
block based variant. Move them there, to make sure that switching
between the instruction and basic block variants cannot introduce
regressions.
2021-05-15 15:42:02 +02:00
Simon Pilgrim
a6e815c9bd [X86][Atom] Fix vector integer multiplication resource/throughputs
Match whats documented in the Intel AOM (and Agner/instlatx64 agree) - vector integer multiplies are pipelined - all Port0, throughput = 2 @ 128bits, 1 @ 64bits.

Noticed while checking reduction costs - now that we can use in-order models in llvm-mca, the atom model is the "worst case scenario" we have in x86.
2021-05-15 14:25:48 +01:00
Simon Pilgrim
e7f42a41cc [Local] collectBitParts - bail out if we find more than one root input value.
All the uses that we have for collectBitParts revolve around us matching down to an operation with a single root value - I don't think we're intending to change that (and a lot of collectBitParts assumes it).

The binops cases (OR/FSHL/FSHR) already check if the providers are the same, but that would still mean we waste time collecting through unaryops before getting to them.
2021-05-15 13:58:42 +01:00
Simon Pilgrim
378972dc3a [InstCombine] InstCombinerImpl::visitOr - enable bitreverse matching
Currently we only match bswap intrinsics from or(shl(),lshr()) style patterns when we could often match bitreverse intrinsics almost as cheaply.

Differential Revision: https://reviews.llvm.org/D90170
2021-05-15 13:39:09 +01:00
Simon Pilgrim
fc9fc79384 [X86] Try to pass DebugLoc by const-ref to avoid costly TrackingMDNodeRef copies (REAPPLIED). NFCI.
Reapply rG5ed56a821c06 (after reverted by rG7aa89c4a22fd) - don't take reference from struct that will be erased in X86FrameLowering::eliminateCallFramePseudoInstr
2021-05-15 13:23:28 +01:00
Simon Pilgrim
d540f9cce2 [Local] collectBitParts - early-out from binops. NFCI.
Minor speedup by not bothering to attempt to collect the second operand's bit parts if we already know its failed in the first operand.
2021-05-15 13:04:10 +01:00
Sanjay Patel
56e1a086b0 [GlobalOpt] add tests for store alignment (PR50253); NFC 2021-05-15 07:31:45 -04:00
Sanjay Patel
0055d514bf [GlobalOpt] add test checks; NFC
I'm also adding an explicit data layout, so we can
confirm that alignment requirements/prefs are met.

I tried to use complete/scripted CHECK lines here,
but that fails with 1 of the globals, and not sure why.
2021-05-15 07:27:17 -04:00
Nikita Popov
d8b6f240a9 [IR] Add BasicBlock::isEntryBlock() (NFC)
This is a recurring and somewhat awkward pattern. Add a helper
method for it.
2021-05-15 12:41:58 +02:00
Nikita Popov
4c98aa53c1 [CFG] Use comesBefore() (NFC)
Use comesBefore() instead of performing an instruction walk. In
line with the previous implementation, instructions are considered
to reach themselves.
2021-05-15 12:14:30 +02:00
Nikita Popov
79924c0c4d [CaptureTracking] Clean up same instruction check (NFC)
Check the BeforeHere == I case once in shouldExplore, instead of
handling it in four different places.
2021-05-15 11:58:55 +02:00
Tomasz Miąsko
99a2b24bf7 [Demangle][Rust] Parse char constants
Reviewed By: dblaikie

Differential Revision: https://reviews.llvm.org/D102524
2021-05-15 10:48:27 +02:00
Tomasz Miąsko
903e2e109e [Demangle][Rust] Parse bool constants
Reviewed By: dblaikie

Differential Revision: https://reviews.llvm.org/D102518
2021-05-15 09:47:17 +02:00
Tim Northover
d5b7e80f68 Verifier: second attempt to fix what I broke with swiftasync.
During a rebase I messed up this array, so trying to put it back to as it was
before with just one SwiftAsync entry.
2021-05-15 08:04:57 +01:00
Vitaly Buka
21b9a5e444 Fix "is not used" warning 2021-05-14 20:58:58 -07:00
Lang Hames
894fb2a5d3 [llvm-jitlink] Link libnetwork on Haiku in llvm-jitlink
The system's network API is in libnetwork.so, so we explicitly need to link to
them on Haiku. This patch is similar to https://reviews.llvm.org/D97633.

Patch by Niels Reedijk. Thanks Niels!

Reviewed By: lhames

Differential Revision: https://reviews.llvm.org/D98405
2021-05-14 20:49:03 -07:00
Nico Weber
88b9a40487 [gn build] (manually) port ad7e12226f6b 2021-05-14 22:24:39 -04:00
Philip Reames
b1ad8985e3 Extract a helper routine to simplify D91481 [NFC] 2021-05-14 18:40:23 -07:00
Hendrik Greving
72e8d61b27 [MC] Add the ability to pass MCRegisterInfo to dump_pretty.
Adds the ability to pass MCRegisterInfo to dump_pretty and to the print functions,
so that if present, target specific enums names are printed instead of enum values.
2021-05-14 18:21:57 -07:00
Amara Emerson
7c35883ebc [GlobalISel][CallLowering] Fix crash when handling a v3s32 type that's being passed as v2s64. 2021-05-14 16:30:51 -07:00
Benjamin Kramer
ecfab87534 Reinstate gtest fix from 4f0b0bf5c6731e3d370558be08c9261801263b09
I missed this when merging gtest 1.10.0, breaking all asan tests :|
2021-05-15 00:35:53 +02:00
Nick Desaulniers
54644a49ca [LowerConstantIntrinsics] reuse isManifestLogic from ConstantFolding
GlobalVariables are Constants, yet should not unconditionally be
considered true for __builtin_constant_p.

Via the LangRef
https://llvm.org/docs/LangRef.html#llvm-is-constant-intrinsic:

    This intrinsic generates no code. If its argument is known to be a
    manifest compile-time constant value, then the intrinsic will be
    converted to a constant true value. Otherwise, it will be converted
    to a constant false value.

    In particular, note that if the argument is a constant expression
    which refers to a global (the address of which _is_ a constant, but
    not manifest during the compile), then the intrinsic evaluates to
    false.

Move isManifestConstant from ConstantFolding to be a method of
Constant so that we can reuse the same logic in
LowerConstantIntrinsics.

pr/41459

Reviewed By: rsmith, george.burgess.iv

Differential Revision: https://reviews.llvm.org/D102367
2021-05-14 15:35:21 -07:00
Brendon Cahoon
d300f6cd3b [AMDGPU] Update SCC defs to VCC when uses are changed to VCC
The FixSGPRCopies pass converts instructions to VALU when
removing illegal VGPR to SGPR copies. Instructions that use SCC
are changed to use VCC instead. When that happens, the pass must
also change instructions that define SCC to define VCC.

The pass was not changing the SCC definition when an ADDC is
converted due to a input that is a VGPR to SGPR copy. But, the
initial ADD insruction, which define SCC, is not converted.
This causes a compilation failure due to a use of an undefined
physical register.

This patch adds code that inserts the SCC definition in the
MoveToVALU worklist when a SCC use is converted to a VCC use.

Differential Revision: https://reviews.llvm.org/D102111
2021-05-14 18:05:05 -04:00