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Commit Graph

765 Commits

Author SHA1 Message Date
Rafael Espindola
b98e92cb78 Declare the callee saved regs
Remove the hard coded store and load of the link register
Implement ARMFrameInfo

llvm-svn: 29727
2006-08-16 14:43:33 +00:00
Evan Cheng
34a49551f5 CALLSEQ_* produces chain even if that's not needed.
llvm-svn: 29603
2006-08-11 09:03:33 +00:00
Rafael Espindola
ae2d1c53c7 change the addressing mode of the str instruction to reg+imm
llvm-svn: 29571
2006-08-08 20:35:03 +00:00
Rafael Espindola
fa94338687 add and use ARMISD::RET_FLAG
llvm-svn: 29499
2006-08-03 17:02:20 +00:00
Rafael Espindola
719336441f start comments with #
move the constant pool to .text
correctly print loads of labels
mark R0, R1, R2 and R3 as caller save

llvm-svn: 29451
2006-08-01 18:53:10 +00:00
Rafael Espindola
9ea0bc742c implemented sub
correctly update the stack pointer in the prologue and epilogue

llvm-svn: 29244
2006-07-21 12:26:16 +00:00
Rafael Espindola
ad256854c0 initial prologue and epilogue implementation. Need to define add and sub before finishing it :-)
llvm-svn: 29175
2006-07-18 17:00:30 +00:00
Rafael Espindola
40073f5767 skeleton of a lowerCall implementation for ARM
llvm-svn: 29159
2006-07-16 01:02:57 +00:00
Rafael Espindola
fdfaee67f5 add the memri memory operand
this makes it possible for ldr instructions with non-zero immediate

llvm-svn: 29103
2006-07-11 11:36:48 +00:00
Rafael Espindola
071c83dff0 create the raddr addressing mode that matches any register and the frame index
use raddr for the ldr instruction. This removes a dummy mov from the assembly output
remove SelectFrameIndex
remove isLoadFromStackSlot
remove isStoreToStackSlot

llvm-svn: 29079
2006-07-10 01:41:35 +00:00
Rafael Espindola
14a59f5b6e initial implementation of ARMRegisterInfo::eliminateFrameIndex
fixes test/Regression/CodeGen/ARM/ret_arg5.ll

llvm-svn: 28854
2006-06-18 00:08:07 +00:00
Rafael Espindola
1bf57da16e Expand ret into "CopyToReg;BRIND"
llvm-svn: 28559
2006-05-30 17:33:19 +00:00
Rafael Espindola
f7c5af4863 On ARM, alignment is in bits
Add lr as a hard coded operand of bx

llvm-svn: 28494
2006-05-26 10:56:17 +00:00
Rafael Espindola
a0e82ff9be implement movri
add a stub LowerFORMAL_ARGUMENTS

llvm-svn: 28388
2006-05-18 21:45:49 +00:00
Rafael Espindola
dd49dfc0df added a skeleton of the ARM backend
llvm-svn: 28301
2006-05-14 22:18:28 +00:00