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Commit Graph

194 Commits

Author SHA1 Message Date
Evan Cheng
241d2c434e Implement @llvm.returnaddress. rdar://8015977.
llvm-svn: 104421
2010-05-22 01:47:14 +00:00
Bill Wendling
e346a38ed4 Rename "HasCalls" in MachineFrameInfo to "AdjustsStack" to better describe what
the variable actually tracks.

N.B., several back-ends are using "HasCalls" as being synonymous for something
that adjusts the stack. This isn't 100% correct and should be looked into.

llvm-svn: 103802
2010-05-14 21:14:32 +00:00
Evan Cheng
80f3051bb7 Add argument TargetRegisterInfo to loadRegFromStackSlot and storeRegToStackSlot.
llvm-svn: 103193
2010-05-06 19:06:44 +00:00
Eric Christopher
cbbb35694f Reword a comment slightly.
llvm-svn: 102966
2010-05-03 22:18:49 +00:00
Dale Johannesen
a4fd142987 Make naked functions work on PPC.
llvm-svn: 102657
2010-04-29 19:32:19 +00:00
Dan Gohman
80b52785a4 Rename MachineFrameInfo variables to MFI, for consistency with
the rest of CodeGen.

llvm-svn: 101146
2010-04-13 16:56:45 +00:00
Chris Lattner
cfca39ef59 remove the MMI pointer from MachineFrameInfo.
llvm-svn: 100415
2010-04-05 05:57:52 +00:00
Jim Grosbach
aa8617389c Clear up the last (famous last words) frame index value reuse issues for Thumb1.
llvm-svn: 98109
2010-03-10 00:13:42 +00:00
Jim Grosbach
f328c5334f Change the Value argument to eliminateFrameIndex to a type-tagged value. This
is preparatory to having PEI's scavenged frame index value reuse logic
properly distinguish types of frame values (e.g., whether the value is
stack-pointer relative or frame-pointer relative).

No functionality change.

llvm-svn: 98086
2010-03-09 21:45:49 +00:00
Jim Grosbach
c4ab116a90 Updated version of r96634 (which was reverted due to failing 176.gcc and
126.gcc nightly tests. These failures uncovered latent bugs that machine DCE
could remove one half of a stack adjust down/up pair, causing PEI to assert.
This update fixes that, and the tests now pass.

llvm-svn: 96822
2010-02-22 23:10:38 +00:00
Bob Wilson
df432a30b2 Revert 96634. It causes assertion failures for 126.gcc and 176.gcc in
the armv6 nightly tests.

llvm-svn: 96691
2010-02-19 18:59:53 +00:00
Jim Grosbach
53ef05fa82 Radar 7636153. In the presence of large call frames, it's not sufficient
for ARM to just check if a function has a FP to determine if it's safe
to simplify the stack adjustment pseudo ops prior to eliminating frame
indices. Allow targets to override the default behavior and does so for ARM
and Thumb2.

llvm-svn: 96634
2010-02-19 00:16:24 +00:00
Evan Cheng
6eb7ff5bbf Teach MachineFrameInfo to track maximum alignment while stack objects are being
created. This ensures it's updated at all time. It means targets which perform
dynamic stack alignment would know whether it is required and whether frame
pointer register cannot be made available register allocation.
This is a fix for rdar://7625239. Sorry, I can't create a reasonably sized test
case.

llvm-svn: 96069
2010-02-13 01:56:41 +00:00
Chris Lattner
7acf9be6c4 move target-independent opcodes out of TargetInstrInfo
into TargetOpcodes.h.  #include the new TargetOpcodes.h
into MachineInstr.  Add new inline accessors (like isPHI())
to MachineInstr, and start using them throughout the 
codebase.

llvm-svn: 95687
2010-02-09 19:54:29 +00:00
Bill Wendling
6f5d4b9eb6 Remove dead store.
llvm-svn: 92187
2009-12-28 01:44:39 +00:00
Anton Korobeynikov
f8b2e2868e Honour setHasCalls() set from isel.
This is used in some weird cases like general dynamic TLS model.
This fixes PR5723

llvm-svn: 91144
2009-12-11 19:39:55 +00:00
Chris Lattner
9ce833945e improve portability to avoid conflicting with std::next in c++'0x.
Patch by Howard Hinnant!

llvm-svn: 90365
2009-12-03 00:50:42 +00:00
David Greene
58e7c6145b Add a bool flag to StackObjects telling whether they reference spill
slots.  The AsmPrinter will use this information to determine whether to
print a spill/reload comment.

Remove default argument values.  It's too easy to pass a wrong argument
value when multiple arguments have default values.  Make everything
explicit to trap bugs early.

Update all targets to adhere to the new interfaces..

llvm-svn: 87022
2009-11-12 20:49:22 +00:00
Jim Grosbach
220e39263c When the function is doing dynamic stack realignment, the spill slot will be
indexed via the stack pointer, even if a frame pointer is present. Update the
heuristic to place it nearest the stack pointer in that case, rather than
nearest the frame pointer.

llvm-svn: 85474
2009-10-29 02:33:47 +00:00
Jim Grosbach
8b0af4b521 Cleanup of frame index scavenging. Better code flow and more accurately
handles T2 and ARM use cases.

llvm-svn: 84761
2009-10-21 15:26:21 +00:00
Jim Grosbach
7800d00f20 Better handle instructions that re-def a scratch register
llvm-svn: 84657
2009-10-20 19:52:35 +00:00
Jim Grosbach
5ce30430a4 Register re-use for scavenged frame indices must check for re-deginition
of the register in the instruction which kills the scavenged value.

llvm-svn: 84641
2009-10-20 16:33:57 +00:00
Jim Grosbach
c4acd85bfd Enable post-pass frame index register scavenging for ARM and Thumb2
llvm-svn: 84585
2009-10-20 01:26:58 +00:00
Evan Cheng
5ab1ccfaee Distinquish stack slots from other stack objects. They (and fixed objects) get FixedStack PseudoSourceValues.
llvm-svn: 84326
2009-10-17 09:20:14 +00:00
Jim Grosbach
8da653b238 Make loop not recalc getNumOperands() each time around
llvm-svn: 84138
2009-10-14 21:22:39 +00:00
Jim Grosbach
9233bebc36 quiet compiler warning
llvm-svn: 84133
2009-10-14 21:07:11 +00:00
Jim Grosbach
809d1bfdd3 when previous scratch register is killed, flag the value as no longer tracking
llvm-svn: 83653
2009-10-09 17:33:33 +00:00
Jim Grosbach
a3e1149941 Re-enable register scavenging in Thumb1 by default.
llvm-svn: 83521
2009-10-08 01:46:59 +00:00
Jim Grosbach
a8e8c8a28f bugfix. The target may use virtual registers that aren't tracked for re-use but are allocated by the scavenger. The re-use algorithm needs to watch for that.
llvm-svn: 83519
2009-10-08 01:09:45 +00:00
Jim Grosbach
cb905d28a8 reverting thumb1 scavenging default due to test failure while I figure out what's up.
llvm-svn: 83501
2009-10-07 22:49:41 +00:00
Jim Grosbach
cc952b2ff8 Enable thumb1 register scavenging by default.
llvm-svn: 83496
2009-10-07 22:26:31 +00:00
Jim Grosbach
0609c91ec4 grammar
llvm-svn: 83483
2009-10-07 19:08:36 +00:00
Jim Grosbach
5db951c6a2 add initializers for clarity. Add missing assignment of PrevLastUseOp.
llvm-svn: 83481
2009-10-07 18:44:24 +00:00
Jim Grosbach
61c5ce1bde Add register-reuse to frame-index register scavenging. When a target uses
a virtual register to eliminate a frame index, it can return that register
and the constant stored there to PEI to track. When scavenging to allocate
for those registers, PEI then tracks the last-used register and value, and
if it is still available and matches the value for the next index, reuses
the existing value rather and removes the re-materialization instructions.
Fancier tracking and adjustment of scavenger allocations to keep more
values live for longer is possible, but not yet implemented and would likely
be better done via a different, less special-purpose, approach to the
problem.

eliminateFrameIndex() is modified so the target implementations can return
the registers they wish to be tracked for reuse.

ARM Thumb1 implements and utilizes the new mechanism. All other targets are
simply modified to adjust for the changed eliminateFrameIndex() prototype.

llvm-svn: 83467
2009-10-07 17:12:56 +00:00
Jim Grosbach
b4fdc9252d Add additional assert() to verify no extraneous use of a scavenged register.
llvm-svn: 83163
2009-09-30 20:35:36 +00:00
Jim Grosbach
d885068ad4 replace TRI->isVirtualRegister() with TargetRegisterInfo::isVirtualRegister()
per customary usage

llvm-svn: 83137
2009-09-30 01:47:59 +00:00
Jim Grosbach
5cc33f7dac fix compiler warning
llvm-svn: 83132
2009-09-30 00:37:40 +00:00
Jim Grosbach
0e6ac9047c Simplify the tracking of virtual frame index registers. Ranges cannot overlap,
so a simple "current register" will suffice. Also add some additional
sanity-checking assertions to make sure things are as we expect.

llvm-svn: 83081
2009-09-29 18:23:15 +00:00
Tilmann Scheller
a23802520a Use explicit structs instead of std::pair to map callee saved regs to spill slots.
llvm-svn: 82909
2009-09-27 17:58:47 +00:00
Bob Wilson
94e29af5ac pr4926: ARM requires the stack pointer to be aligned, even for leaf functions.
For the AAPCS ABI, SP must always be 4-byte aligned, and at any "public
interface" it must be 8-byte aligned.  For the older ARM APCS ABI, the stack
alignment is just always 4 bytes.  For X86, we currently align SP at
entry to a function (e.g., to 16 bytes for Darwin), but no stack alignment
is needed at other times, such as for a leaf function.

After discussing this with Dan, I decided to go with the approach of adding
a new "TransientStackAlignment" field to TargetFrameInfo.  This value
specifies the stack alignment that must be maintained even in between calls.
It defaults to 1 except for ARM, where it is 4.  (Some other targets may
also want to set this if they have similar stack requirements. It's not
currently required for PPC because it sets targetHandlesStackFrameRounding
and handles the alignment in target-specific code.) The existing StackAlignment
value specifies the alignment upon entry to a function, which is how we've
been using it anyway.

llvm-svn: 82767
2009-09-25 14:41:49 +00:00
Jim Grosbach
3d527ff081 Start of revamping the register scavenging in PEI. ARM Thumb1 is the driving
interest for this, as it currently reserves a register rather than using
the scavenger for matierializing constants as needed.

Instead of scavenging registers on the fly while eliminating frame indices,
new virtual registers are created, and then a scavenged collectively in a
post-pass over the function. This isolates the bits that need to interact
with the scavenger, and sets the stage for more intelligent use, and reuse,
of scavenged registers.

For the time being, this is disabled by default. Once the bugs are worked out,
the current scavenging calls in replaceFrameIndices() will be removed and
the post-pass scavenging will be the default. Until then,
-enable-frame-index-scavenging enables the new code. Currently, only the
Thumb1 back end is set up to use it.

llvm-svn: 82734
2009-09-24 23:52:18 +00:00
Bob Wilson
4a0decbe2e Fix a hypothetical problem for targets with StackGrowsUp and a non-zero
LocalAreaOffset.  (We don't have any of those right now.)
PEI::calculateFrameObjectOffsets includes the absolute value of the
LocalAreaOffset in the cumulative offset value used to calculate the
stack frame size.  It then adds the raw value of the LocalAreaOffset
to the stack size.  For a StackGrowsDown target, that raw value is negative
and has the effect of cancelling out the absolute value that was added
earlier, but that obviously won't work for a StackGrowsUp target.  Change
to subtract the absolute value of the LocalAreaOffset.

llvm-svn: 82693
2009-09-24 16:42:27 +00:00
Bob Wilson
e92f61e68b Edit a comment.
llvm-svn: 82641
2009-09-23 18:53:19 +00:00
Bob Wilson
0ad3a28b10 Fix a comment typo and some whitespace.
llvm-svn: 82285
2009-09-18 21:43:11 +00:00
Devang Patel
c071d6c1b4 Record variable debug info at ISel time directly.
llvm-svn: 79742
2009-08-22 17:12:53 +00:00
Jakob Stoklund Olesen
8f6660c417 Don't setCalleeSavedInfoValid() until spills are interted.
In a naked function, the flag is never set and getPristineRegs() returns an
empty list. That means naked functions are able to clobber callee saved
registers, but that is the whole point of naked functions.

This fixes PR4716.

llvm-svn: 79096
2009-08-15 13:10:46 +00:00
Jakob Stoklund Olesen
96890fb0cf Add MachineFrameInfo::getPristineRegisters(MBB) method.
llvm-svn: 78911
2009-08-13 16:19:33 +00:00
Dan Gohman
4529d71681 Use setPreservesAll and setPreservesCFG in CodeGen passes.
llvm-svn: 77754
2009-07-31 23:37:33 +00:00
Dan Gohman
f28b3bb262 Reapply r77654 with a fix: MachineFunctionPass's getAnalysisUsage
shouldn't do AU.setPreservesCFG(), because even though CodeGen passes
don't modify the LLVM IR CFG, they may modify the MachineFunction CFG,
and passes like MachineLoop are registered with isCFGOnly set to true.

llvm-svn: 77691
2009-07-31 18:16:33 +00:00
Daniel Dunbar
60d71a790c Revert r77654, it appears to be causing llvm-gcc bootstrap failures, and many
failures when building assorted projects with clang.

--- Reverse-merging r77654 into '.':
U    include/llvm/CodeGen/Passes.h
U    include/llvm/CodeGen/MachineFunctionPass.h
U    include/llvm/CodeGen/MachineFunction.h
U    include/llvm/CodeGen/LazyLiveness.h
U    include/llvm/CodeGen/SelectionDAGISel.h
D    include/llvm/CodeGen/MachineFunctionAnalysis.h
U    include/llvm/Function.h
U    lib/Target/CellSPU/SPUISelDAGToDAG.cpp
U    lib/Target/PowerPC/PPCISelDAGToDAG.cpp
U    lib/CodeGen/LLVMTargetMachine.cpp
U    lib/CodeGen/MachineVerifier.cpp
U    lib/CodeGen/MachineFunction.cpp
U    lib/CodeGen/PrologEpilogInserter.cpp
U    lib/CodeGen/MachineLoopInfo.cpp
U    lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
D    lib/CodeGen/MachineFunctionAnalysis.cpp
D    lib/CodeGen/MachineFunctionPass.cpp
U    lib/CodeGen/LiveVariables.cpp

llvm-svn: 77661
2009-07-31 03:02:41 +00:00