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Commit Graph

203834 Commits

Author SHA1 Message Date
Sam Parker
5953b93f6b [ARM] Add more validForTailPredication
Modify the unit test to inspect all MVE instructions and mark the
load/store/move of vpr/p0 as valid, as well as the remaining scalar
shifts.

Differential Revision: https://reviews.llvm.org/D87753
2020-09-16 11:51:50 +01:00
Simon Pilgrim
6d100e4f64 [DAG] Remover getOperand() call. NFCI. 2020-09-16 11:18:58 +01:00
Sam Tebbs
44c6b51e9c [ARM][LowOverheadLoops] Fix tests after ef0b9f3
ef0b9f3 didn't update the tests that it affected.
2020-09-16 11:01:21 +01:00
Georgii Rymar
32405053ae [llvm-readobj][test] - Improve section-symbols.test
`section-symbols.test` tests how we print section symbols in
different situations.

We might have 2 different cases:
1) A named STT_SECTION symbol.
2) An unnamed STT_SECTION symbol.

Usually section symbols have no name and then `--symbols` uses their
section names when prints them. If symbol has a name, then it is used.

For `--relocations` we also want to have this logic probably,
but currently we always ignore symbol names and always use section names.
It is not consistent with GNU readelf and with our logic for `--symbols`.

This patch refines testing to document the existent behavior and improve
coverage.

Differential revision: https://reviews.llvm.org/D87612
2020-09-16 12:36:09 +03:00
Andrew Ng
dc5cf0feeb [Support] Add GlobPattern::isTrivialMatchAll()
GlobPattern::isTrivialMatchAll() returns true for the GlobPattern "*"
which will match all inputs.

This can be used to avoid performing expensive preparation of the input
for match() when the result of the match will always be true.

Differential Revision: https://reviews.llvm.org/D87468
2020-09-16 10:26:11 +01:00
Georgii Rymar
314b01deec [llvm-readobj][test] - Address a forgotten review comment for D86923.
Seems I've forgot to address this bit and this looks like a reason
of a failture on mac (http://45.33.8.238/mac/20491/step_11.txt).
2020-09-16 11:51:26 +03:00
Alok Kumar Sharma
fa3e899034 [DebugInfo][flang] DISubrange support for fortran assumed size array
This is needed to support assumed size array of fortran which can have missing upperBound/count
, contrary to current DISubrange support.
Example:
subroutine sub (array1, array2)
  integer :: array1 (*)
  integer :: array2 (4:9, 10:*)

  array1(7:8) = 9
  array2(5, 10) = 10
end subroutine
Now the validation check is relaxed for fortran.

Reviewed By: aprantl

Differential Revision: https://reviews.llvm.org/D87500
2020-09-16 14:15:53 +05:30
Sjoerd Meijer
47d7efbc1f Follow up rG635b87511ec3: forgot to add/commit the new test file. NFC. 2020-09-16 09:38:37 +01:00
Sam Tebbs
d6e34a1a34 [ARM][LowOverheadLoops] Combine a VCMP and VPST into a VPT
This patch combines a VCMP followed by a VPST into a VPT, which has the
same semantics as the combination of the former two.
2020-09-16 09:27:10 +01:00
Yvan Roux
921c5ae39b [ARM][MachineOutliner] Add calls handling.
Handles calls inside outlined regions, by saving and restoring the link
register.

Differential Revision: https://reviews.llvm.org/D87136
2020-09-16 09:54:26 +02:00
Max Kazantsev
b8d7909de9 [Test] Add positive range checks tests in addition to negative 2020-09-16 14:24:42 +07:00
Max Kazantsev
2390eb6a63 [Test] Some more potential range check elimination opportunities 2020-09-16 14:00:19 +07:00
Alina Sbirlea
c911d0caf7 [MemorySSA] Report unoptimized as None, not MayAlias. 2020-09-15 23:58:53 -07:00
Xing GUO
db83a6f653 [obj2yaml] Add support for dumping the .debug_addr(v5) section.
This patch adds support for dumping the .debug_addr(v5) section to
obj2yaml.

Reviewed By: jhenderson

Differential Revision: https://reviews.llvm.org/D87601
2020-09-16 14:48:03 +08:00
Martin Storsjö
2b119dcf7e [llvm-rc] Lowercase the option definitions. NFC.
This matches how such options are most commonly defined in other tools.

This was pointed out in an earlier review a few months ago, that
the llvm-rc td entries felt shouty.

The INCLUDE option is renamed to includepath, to avoid clashing with
the tablegen include directive.
2020-09-16 09:34:26 +03:00
Martin Storsjö
7b4e9362ee [llvm-rc] Update a comment. NFC.
Fix a typo and mention one missing step.
2020-09-16 09:34:26 +03:00
Martin Storsjö
50a529e27d [llvm-rc] Allow omitting components from VERSIONINFO versions
MS rc.exe doesn't require specifying all 4 components.

Differential Revision: https://reviews.llvm.org/D87570
2020-09-16 09:34:26 +03:00
Alina Sbirlea
3b2eea568d [MemorySSA] Set MustDominate to true for PhiTranslation. 2020-09-15 23:29:57 -07:00
Craig Topper
acde6e65a0 [X86] Don't scalarize gather/scatters with non-power of 2 element counts. Widen instead.
We can pad the mask with zeros in order to widen. We already do
this for power 2 types that are smaller than a legal type.
2020-09-15 23:22:53 -07:00
Craig Topper
1eb43a5d55 [X86] Add test case for non-power of 2 scatter. NFC 2020-09-15 23:03:39 -07:00
Max Kazantsev
67567b8db5 [Test] Add signed version of a test 2020-09-16 11:30:21 +07:00
Serguei Katkov
4f6cfebd9e [InstCombine] Add tests for statepoint simplification
This tests increase coverage for change introduced in D85959

Reviewers: reames, reames
Reviewed By: reames
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D87224
2020-09-16 10:56:38 +07:00
Arthur Eubanks
8e54da3615 [NewPM] Fix opt-hot-cold-split.ll under NPM
Pin to legacy PM, there are already NPM RUN lines.
2020-09-15 20:29:20 -07:00
Arthur Eubanks
623ad434a7 [NewPM][SCEV] Fix constant-fold-gep.ll under NPM 2020-09-15 20:25:35 -07:00
Arthur Eubanks
dd08b528d1 [NewPM] Fix 2003-02-19-LoopInfoNestingBug.ll under NPM
Also move it to a more appropriate directory.
2020-09-15 20:21:45 -07:00
Craig Topper
16cd8d4cc5 [X86] Always use 16-bit displacement in 16-bit mode when there is no base or index register.
Previously we only did this if the immediate fit in 16 bits, but
the GNU assembler seems to just truncate.

Fixes PR46952
2020-09-15 19:31:48 -07:00
Alina Sbirlea
29208e15c0 Fix test after D86156. 2020-09-15 19:13:39 -07:00
Krzysztof Parzyszek
718a375cea [Hexagon] Replace incorrect pattern for vpackl HWI32 -> HVi8
V6_vdealb4w is not correct for pairs, use V6_vpackeh/V6_vpackeb instead.
2020-09-15 20:34:50 -05:00
Arthur Eubanks
5540a2de5d [NewPM] Port strip* passes to NPM
strip-nondebug and strip-debug-declare have no existing associated tests

Reviewed By: ychen

Differential Revision: https://reviews.llvm.org/D87639
2020-09-15 18:25:12 -07:00
Arthur Eubanks
f33d2689ad [LowerSwitch][NewPM] Port lowerswitch to NPM
Reviewed By: ychen

Differential Revision: https://reviews.llvm.org/D87726
2020-09-15 18:18:31 -07:00
Wenlei He
a2451f2478 SVML support for log10, sqrt
Although LLVM supports vectorization of loops containing log10/sqrt, it did not support using SVML implementation of it. Added support so that when clang is invoked with -fveclib=SVML now an appropriate SVML library log2 implementation will be invoked.

Follow up on: https://reviews.llvm.org/D77114

Tests:
Added unit tests to svml-calls.ll, svml-calls-finite.ll. Can be run with llvm-lint.
Created a simple c++ file that tests log10/sqrt, and used clang+ to build it, and output final assembly.

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D87169
2020-09-15 17:29:44 -07:00
Wenlei He
c7934c2798 [LICM] Make Loop ICM profile aware again
D65060 was reverted because it introduced non-determinism by using BFI counts from already freed blocks. The parent of this revision fixes that by using a VH callback on blocks to prevent this from happening and makes sure BFI data is passed correctly in LoopStandardAnalysisResults.

This re-introduces the previous optimization of using BFI data to prevent LICM from hoisting/sinking if the instruction will end up moving to a colder block.

Internally at Facebook this change results in a ~7% win in a CPU related metric in one of our big services by preventing hoisting cold code into a hot pre-header like the added test case demonstrates.

Testing:
ninja check

Reviewed By: asbirlea

Differential Revision: https://reviews.llvm.org/D87551
2020-09-15 17:21:58 -07:00
Jessica Paquette
5ffe1901d5 [AArch64][GlobalISel] Refactor + improve CMN, ADDS, and ADD emit functions
These functions were extremely similar:

- `emitADD`
- `emitADDS`
- `emitCMN`

Refactor them a little, introducing a more generic `emitInstr` function to
do most of the work.

Also add support for the immediate + shifted register addressing modes in each
of them.

Update select-uaddo.mir to show that selecing ADDS now supports folding
immediates + shifts. (I don't think this can impact CMN, because the CMN checks
require a G_SUB with a non-constant on the RHS.)

This is around a 0.02% code size improvement on CTMark at -O3.

Differential Revision: https://reviews.llvm.org/D87529
2020-09-15 17:18:05 -07:00
Arthur Eubanks
d8616d8c76 [CGSCC][NewPM] Fix adding mutually recursive new functions
When adding a new function via addNewFunctionIntoRefSCC(), it creates a
new node and immediately populates the edges. Since populateSlow() calls
G->get() on all referenced functions, it will create a node (but not
populate it) for functions that haven't yet been added. If we add two
mutually recursive functions, the assert that the node should never have
been created will fire when the second function is added. So here we
remove that assert since the node may have already been created (but not
yet populated).

createNode() is only called from addNewFunctionInto{,Ref}SCC().

https://bugs.llvm.org/show_bug.cgi?id=47502

Reviewed By: jdoerfert

Differential Revision: https://reviews.llvm.org/D87623
2020-09-15 16:44:08 -07:00
Volkan Keles
dfd3344cb4 GlobalISel: Fix a failing combiner test
test/CodeGen/AArch64/GlobalISel/combine-trunc.mir was failing
due to the different order for evaluating function arguments.
This patch updates the related code to fix the issue.
2020-09-15 16:40:38 -07:00
Alexandre Ganea
f0d611207d [llvm][cmake] Change LLVM_INTEGRATED_CRT_ALLOC to a path instead of a boolean
Differential Revision: https://reviews.llvm.org/D87609
2020-09-15 19:18:52 -04:00
Wenlei He
5c1dccafc2 [BFI] Make BFI information available through loop passes inside LoopStandardAnalysisResults
~~D65060 uncovered that trying to use BFI in loop passes can lead to non-deterministic behavior when blocks are re-used while retaining old BFI data.~~

~~To make sure BFI is preserved through loop passes a Value Handle (VH) callback is registered on blocks themselves. When a block is freed it now also wipes out the accompanying BFI entry such that stale BFI data can no longer persist resolving the determinism issue. ~~

~~An optimistic approach would be to incrementally update BFI information throughout the loop passes rather than only invalidating them on removed blocks. The issues with that are:~~
~~1. It is not clear how BFI information should be incrementally updated: If a block is duplicated does its BFI information come with? How about if it's split/modified/moved around? ~~
~~2. Assuming we can address these problems the implementation here will be a massive undertaking. ~~

~~There's a known need of BFI in LICM analysis which requires correct but not incrementally updated BFI data. A follow-up change can register BFI in all loop passes so this preserved but potentially lossy data is available to any loop pass that wants it.~~

See: D75341 for an identical implementation of preserving BFI via VH callbacks. The previous statements do still apply but this change no longer has to be in this diff because it's already upstream 😄 .

This diff also moves BFI to be a part of LoopStandardAnalysisResults since the previous method using getCachedResults now (correctly!) statically asserts (D72893) that this data isn't static through the loop passes.

Testing
Ninja check

Reviewed By: asbirlea, nikic

Differential Revision: https://reviews.llvm.org/D86156
2020-09-15 16:16:24 -07:00
Aditya Nandakumar
b83e257aa9 [GISel] Add new GISel combiners for G_MUL
https://reviews.llvm.org/D87668

Patch adds two new GICombinerRules, one for G_MUL(X, 1) and another for G_MUL(X, -1).
G_MUL(X, 1) is an identity combine, and G_MUL(X, -1) gets replaced with G_SUB(0, X).
Patch additionally adds new combiner tests for the AArch64 target to test these
new combiner rules, as well as updates AMDGPU GISel tests.

Patch by mkitzan
2020-09-15 16:08:47 -07:00
Mircea Trofin
2d0a6945c4 [ThinLTO] add post-thinlto-merge option to -lto-embed-bitcode
This will embed bitcode after (Thin)LTO merge, but before optimizations.
In the case the thinlto backend is called from clang, the .llvmcmd
section is also produced. Doing so in the case where the caller is the
linker doesn't yet have a motivation, and would require plumbing through
command line args.

Differential Revision: https://reviews.llvm.org/D87636
2020-09-15 15:56:11 -07:00
Volkan Keles
f54424411f GlobalISel: Add combines for G_TRUNC
https://reviews.llvm.org/D87050
2020-09-15 15:50:34 -07:00
Stanislav Mekhanoshin
7f0d01b1a0 [AMDGPU] Unify intrinsic ret/nortn interface
We have a single noret intrinsic an a lot of special handling
around it. Declare it just as any other but do not define rtn
instructions itself instead.

Differential Revision: https://reviews.llvm.org/D87719
2020-09-15 15:26:42 -07:00
Xun Li
7bfa6044db [TSAN] Handle musttail call properly in EscapeEnumerator (and TSAN)
Call instructions with musttail tag must be optimized as a tailcall, otherwise could lead to incorrect program behavior.
When TSAN is instrumenting functions, it broke the contract by adding a call to the tsan exit function inbetween the musttail call and return instruction, and also inserted exception handling code.
This happend throguh EscapeEnumerator, which adds exception handling code and returns ret instructions as the place to insert instrumentation calls.
This becomes especially problematic for coroutines, because coroutines rely on tail calls to do symmetric transfers properly.
To fix this, this patch moves the location to insert instrumentation calls prior to the musttail call for ret instructions that are following musttail calls, and also does not handle exception for musttail calls.

Differential Revision: https://reviews.llvm.org/D87620
2020-09-15 15:20:05 -07:00
Huihui Zhang
32cbc304b2 [SLPVectorizer][SVE] Skip scalable-vector instructions before vectorizeSimpleInstructions.
For scalable type, the aggregated size is unknown at compile-time.
Skip instructions with scalable type to ensure the list of instructions
for vectorizeSimpleInstructions does not contains any scalable-vector instructions.

Reviewed By: RKSimon

Differential Revision: https://reviews.llvm.org/D87550
2020-09-15 13:10:15 -07:00
Ta-Wei Tu
524ed02943 [TableGen] Fix invalid comparison function SizeOrder in getMatchingSubClassWithSubRegs
Building LLVM with -DEXPENSIVE_CHECKS fails with the following error
message with libstdc++ in debug mode:

Error: comparison doesn't meet irreflexive requirements,
assert(!(a < a)).

The patch fixes the comparison function SizeOrder by returning false
when comparing two equal items.
2020-09-15 15:48:43 -04:00
Matt Arsenault
7872d20b80 InferAddressSpaces: Fix assert with unreachable code
Invalid IR in unreachable code is technically valid IR. In this case,
the address space of the value was never inferred, and we tried to
rewrite it with an invalid address space value which would assert.
2020-09-15 15:48:43 -04:00
Muhammad Asif Manzoor
b757c8c8cd [AArch64][SVE] Add lowering for llvm fsqrt
Add the functionality to lower fsqrt for passthru variant

Reviewed By: paulwalker-arm

Differential Revision: https://reviews.llvm.org/D87707
2020-09-15 15:26:17 -04:00
Albion Fung
ef3cfcdc3b [PowerPC] Implement __int128 vector divide operations
This patch implements __int128 vector divide operations for ISA3.1.

Differential Revision: https://reviews.llvm.org/D85453
2020-09-15 15:19:35 -04:00
Arthur Eubanks
50c071e797 [Dominators][NewPM] Pin tests with -analyze to legacy PM
-analyze isn't supported in NPM. All affected tests have corresponding
NPM RUN line.
2020-09-15 11:59:00 -07:00
Arthur Eubanks
32327822f1 [DemandedBits][NewPM] Pin some tests to legacy PM
All tests have corresponding NPM RUN lines.
-analyze doesn't work under NPM.
2020-09-15 11:55:58 -07:00
LLVM GN Syncbot
6c32c3191f [gn build] Port 3d42d549554 2020-09-15 18:32:17 +00:00