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24f6d49962
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295 Commits

Author SHA1 Message Date
Michael J. Spencer
24f6d49962 Properly emit _fltused with FastISel. Refactor to share code with SDAG. 
Patch by Joe Groff!

llvm-svn: 151183
 2012-02-22 19:06:13 +00:00
Craig Topper
3ed929de0a Make all pointers to TargetRegisterClass const since they are all pointers to static data that should not be modified. 
llvm-svn: 151134
 2012-02-22 05:59:10 +00:00
Eric Christopher
325985565a Ignore the lifetime intrinsics in fast-isel. 
llvm-svn: 150848
 2012-02-17 23:03:39 +00:00
Chad Rosier
ec3053c33c [fast-isel] HandlePHINodesInSuccessorBlocks() can promite i8 and i16 types too. 
llvm-svn: 149730
 2012-02-04 00:39:19 +00:00
Bill Wendling
fadeb75339 Remove the now-dead llvm.eh.exception and llvm.eh.selector intrinsics. 
llvm-svn: 149331
 2012-01-31 01:58:48 +00:00
Chad Rosier
281f9442f3 [fast-isel] Remove SelectInsertValue() as fast-isel wasn't designed to handle 
instructions that define aggregate types.

llvm-svn: 146492
 2011-12-13 17:45:06 +00:00
Chad Rosier
2cf6a76fd4 [fast-isel] SelectInsertValue seems to be causing miscompiles for ARM. Disable while I investigate. 
llvm-svn: 146331
 2011-12-10 21:27:40 +00:00
Chad Rosier
fa991ed762 Typo. 
llvm-svn: 146327
 2011-12-10 19:48:51 +00:00
Chad Rosier
7e0dc23863 [fast-isel] Add support for selecting insertvalue. 
rdar://10530851

llvm-svn: 146276
 2011-12-09 20:09:54 +00:00
Chad Rosier
0ff2f46d12 If fast-isel fails, remove dead instructions generated during the failed 
attempt.  

llvm-svn: 145425
 2011-11-29 19:40:47 +00:00
Chad Rosier
a512a13c2c 80-column. 
llvm-svn: 145267
 2011-11-28 19:59:09 +00:00
Chad Rosier
2673f8862f When fast iseling a GEP, accumulate the offset rather than emitting a series of 
ADDs.  MaxOffs is used as a threshold to limit the size of the offset. Tradeoffs
being: (1) If we can't materialize the large constant then we'll cause fast-isel
to bail. (2) Too large of an offset can't be directly encoded in the ADD
resulting in a MOV+ADD.  Generally not a bad thing because otherwise we would
have had ADD+ADD, but on Thumb this turns into a MOVS+MOVT+ADD. Working on a fix
for that. (3) Conversely, too low of a threshold we'll miss opportunities to 
coalesce ADDs.
rdar://10412592

llvm-svn: 144886
 2011-11-17 07:15:58 +00:00
Chad Rosier
36cc01dbd3 Add fast-isel stats to determine who's doing all the work, the 
target-independent selector or the target-specific selector.

llvm-svn: 144833
 2011-11-16 21:05:28 +00:00
Chad Rosier
71f1bbe1e7 GEPs with all zero indices are trivially coalesced by fast-isel. For example, 
%arrayidx135 = getelementptr inbounds [4 x [4 x [4 x [4 x i32]]]]* %M0, i32 0, i64 0
%arrayidx136 = getelementptr inbounds [4 x [4 x [4 x i32]]]* %arrayidx135, i32 0, i64 %idxprom134

Prior to this commit, the GEP instruction that defines %arrayidx136 thought that 
%arrayidx135 was a trivial kill.  The GEP that defines %arrayidx135 doesn't 
generate any code and thus %M0 gets folded into the second GEP.  Thus, we need
to look through GEPs with all zero indices.
rdar://10443319

llvm-svn: 144730
 2011-11-15 23:34:05 +00:00
Dan Gohman
5acb47274d Fix a thinko that Nick noticed. The previous code actually worked as 
intended, but only by accident.

llvm-svn: 141779
 2011-10-12 15:56:56 +00:00
Devang Patel
ba2d56b1ef Directly point debug info to the stack slot of the arugment, instead of trying to keep track of vreg in which it the arugment is copied. The LiveDebugVariable can keep track of variable's ranges. 
llvm-svn: 139330
 2011-09-08 22:59:09 +00:00
Ivan Krasin
338df71d60 FastISel: avoid function calls between the materialization of the constant and its use. 
llvm-svn: 137993
 2011-08-18 22:06:10 +00:00
Devang Patel
72886ba8d8 Revert r135423. 
llvm-svn: 135454
 2011-07-19 00:28:24 +00:00
Jeffrey Yasskin
2e0f2a0985 Add APInt(numBits, ArrayRef<uint64_t> bigVal) constructor to prevent future ambiguity 
errors like the one corrected by r135261.  Migrate all LLVM callers of the old
constructor to the new one.

llvm-svn: 135431
 2011-07-18 21:45:40 +00:00
Devang Patel
389cb9d8c6 During bottom up fast-isel, instructions emitted to materalize registers are at top of basic block and do not have debug location. This may misguide debugger while entering the basic block and sometimes debugger provides semi useful view of current location to developer by picking up previous known location as current location. Assign a sensible location to the first instruction in a basic block, if it does not have one location derived from source file, so that debugger can provide meaningful user experience to developers in edge cases. 
[take 2]

llvm-svn: 135423
 2011-07-18 20:55:23 +00:00
Chris Lattner
e1fe7061ce land David Blaikie's patch to de-constify Type, with a few tweaks. 
llvm-svn: 135375
 2011-07-18 04:54:35 +00:00
Jay Foad
88fb4f4597 Convert InsertValueInst and ExtractValueInst APIs to use ArrayRef. 
llvm-svn: 135040
 2011-07-13 10:26:04 +00:00
Devang Patel
66c4bc1dda Revert r133953 for now. 
llvm-svn: 134116
 2011-06-29 23:50:13 +00:00
Evan Cheng
4a169be530 - Rename TargetInstrDesc, TargetOperandInfo to MCInstrDesc and MCOperandInfo and 
sink them into MC layer.
- Added MCInstrInfo, which captures the tablegen generated static data. Chang
TargetInstrInfo so it's based off MCInstrInfo.

llvm-svn: 134021
 2011-06-28 19:10:37 +00:00
Devang Patel
8fbd4b55ea During bottom up fast-isel, instructions emitted to materalize registers are at top of basic block and do not have debug location. This may misguide debugger while entering the basic block and sometimes debugger provides semi useful view of current location to developer by picking up previous known location as current location. Assign a sensible location to the first instruction in a basic block, if it does not have one location derived from source file, so that debugger can provide meaningful user experience to developers in edge cases. 
llvm-svn: 133953
 2011-06-27 22:32:04 +00:00
Devang Patel
91fee59b74 Handle debug info for i128 constants. 
llvm-svn: 133821
 2011-06-24 20:46:11 +00:00
Eli Friedman
69da49c53a PR10077: fix fast-isel of extractvalue of aggregate constants. 
llvm-svn: 132676
 2011-06-06 05:46:34 +00:00
Eli Friedman
93ffb875ad Rewrite fast-isel integer cast handling to handle more cases, and to be simpler and more consistent. 
The practical effects here are that x86-64 fast-isel can now handle trunc from i8 to i1, and ARM fast-isel can handle many more constructs involving integers narrower than 32 bits (including loads, stores, and many integer casts).

rdar://9437928 .

llvm-svn: 132099
 2011-05-25 23:49:02 +00:00
Eli Friedman
cb60e2293f Make fast-isel work correctly s/uadd.with.overflow intrinsics. 
llvm-svn: 131420
 2011-05-16 21:06:17 +00:00
Eli Friedman
bd237ec411 Fix silly typo. 
llvm-svn: 131419
 2011-05-16 20:34:53 +00:00
Eli Friedman
5f1b7e4153 Basic fast-isel of extractvalue. Not too helpful on its own, given the IR clang generates for cases like this, but it should become more useful soon. 
llvm-svn: 131417
 2011-05-16 20:27:46 +00:00
Eli Friedman
559f908ca7 Fix a FIXME by moving the fast-isel implementation of the objectsize intrinsic from the x86 code to the generic code. 
llvm-svn: 131332
 2011-05-14 00:47:51 +00:00
Owen Anderson
35f6bae989 Allow FastISel of three-register-operand instructions. 
llvm-svn: 130934
 2011-05-05 17:59:04 +00:00
Eli Friedman
919bf1ca71 Make FastEmit_ri_ try a bit harder to succeed for supported operations; FastEmit_i can fail for non-Thumb2 ARM. Makes ARMSimplifyAddress work correctly, and reduces the number of fast-isel bailouts on non-Thumb ARM. 
llvm-svn: 130560
 2011-04-29 23:34:52 +00:00
Eli Friedman
86181251f3 Fix a silly mistake in r130338. 
llvm-svn: 130360
 2011-04-28 00:42:03 +00:00
Eli Friedman
c5406cdb50 Make the fast-isel code for literal 0.0 a bit shorter/faster, since 0.0 is common. rdar://problem/9303592 . 
llvm-svn: 130338
 2011-04-27 22:41:55 +00:00
Eli Friedman
fc1152d772 Remove unused function. 
llvm-svn: 130337
 2011-04-27 22:21:02 +00:00
Dan Gohman
fbb7ade7ae Fast-isel support for simple inline asms. 
llvm-svn: 130205
 2011-04-26 17:18:34 +00:00
Owen Anderson
e1b33b92a3 Teach FastISel to deal with instructions that have two immediate operands. 
llvm-svn: 130033
 2011-04-22 23:38:06 +00:00
Chris Lattner
f15db6c86f Implement support for x86 fastisel of small fixed-sized memcpys, which are generated 
en-mass for C++ PODs.  On my c++ test file, this cuts the fast isel rejects by 10x 
and shrinks the generated .s file by 5%

llvm-svn: 129755
 2011-04-19 05:52:03 +00:00
Chris Lattner
f8f4d3c30a while we're at it, handle 'sdiv exact' of a power of 2 also, 
this fixes a few rejects on c++ iterator loops.

llvm-svn: 129694
 2011-04-18 07:00:40 +00:00
Chris Lattner
dd2f1ec77c fix rdar://9297011 - udiv by power of two causing fast-isel rejects 
llvm-svn: 129693
 2011-04-18 06:55:51 +00:00
Chris Lattner
28eaf6be7f 1. merge fast-isel-shift-imm.ll into fast-isel-x86-64.ll 
2. implement rdar://9289501 - fast isel should fold trivial multiplies to shifts
3. teach tblgen to handle shift immediates that are different sizes than the 
   shifted operands, eliminating some code from the X86 fast isel backend.
4. Have FastISel::SelectBinaryOp use (the poorly named) FastEmit_ri_ function
   instead of FastEmit_ri to simplify code.

llvm-svn: 129666
 2011-04-17 20:23:29 +00:00
Chris Lattner
cb194276e0 fix rdar://9289583 - fast isel should handle non-canonical commutative binops 
allowing us to fold the immediate into the 'and' in this case:

int test1(int i) {
  return 8&i;
}

llvm-svn: 129653
 2011-04-17 01:16:47 +00:00
Chris Lattner
0304b82f80 Fix a ton of comment typos found by codespell. Patch by 
Luis Felipe Strano Moraes!

llvm-svn: 129558
 2011-04-15 05:18:47 +00:00
Jay Foad
0d5ca4cf44 Don't include Operator.h from InstrTypes.h. 
llvm-svn: 129271
 2011-04-11 09:35:34 +00:00
Owen Anderson
78afadfa5d Teach FastISel to support register-immediate-immediate instructions. 
llvm-svn: 127496
 2011-03-11 21:33:55 +00:00
Devang Patel
6fe7fe8dd4 If dbg_declare() or dbg_value() is not lowered by isel then emit DEBUG message instead of creating DBG_VALUE for undefined value in reg0. 
llvm-svn: 121059
 2010-12-06 22:39:26 +00:00
Wesley Peck
d589353ad0 Renaming ISD::BIT_CONVERT to ISD::BITCAST to better reflect the LLVM IR concept. 
llvm-svn: 119990
 2010-11-23 03:31:01 +00:00
Devang Patel
632686ac96 Use frame index, if available for byval argument while lowering dbg_declare. Otherwise let getRegForValue() find register for this argument. 
llvm-svn: 113843
 2010-09-14 20:29:31 +00:00