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5 Commits

Author SHA1 Message Date
Justin Holewinski
84f0bca9c1 [NVPTX] Rename registers %fl -> %fd and %rl -> %rd 
This matches the internal behavior of NVIDIA tools like libnvvm.

llvm-svn: 213168
 2014-07-16 16:26:58 +00:00
Justin Holewinski
d925e36ab2 [NVPTX] Re-enable support for virtual registers in the final output 
Now that 3.3 is branched, we are re-enabling virtual registers to help
iron out bugs before the next release. Some of the post-RA passes do
not play well with virtual registers, so we disable them for now. The
needed functionality of the PrologEpilogInserter pass is copied to a
new backend-specific NVPTXPrologEpilog pass.

The test for this commit is not breaking the existing tests.

llvm-svn: 182998
 2013-05-31 12:14:49 +00:00
Justin Holewinski
2a53cbfbe1 [NVPTX] Add @llvm.nvvm.sqrt.f() intrinsic 
llvm-svn: 182394
 2013-05-21 16:51:30 +00:00
Justin Holewinski
21480942b2 [NVPTX] Remove support for SM < 2.0. This was never fully supported anyway. 
llvm-svn: 178417
 2013-03-30 14:29:30 +00:00
Peter Collingbourne
b5121f5f06 Add llvm.fabs intrinsic. 
llvm-svn: 157594
 2012-05-28 21:48:37 +00:00