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Author SHA1 Message Date
Jim Grosbach
75db252aee ARM NEON VLD2/VST2 lane indexed assembly parsing and encoding. 
llvm-svn: 146605
 2011-12-14 23:25:46 +00:00
Devang Patel
0db1ed1a48 Do not sink instruction, if it is not profitable. 
On ARM, peephole optimization for ABS creates a trivial cfg triangle which tempts machine sink to sink instructions in code which is really straight line code. Sometimes this sinking may alter register allocator input such that use and def of a reg is divided by a branch in between, which may result in extra spills. Now mahine sink avoids sinking if final sink destination is post dominator.

Radar 10266272.

llvm-svn: 146604
 2011-12-14 23:20:38 +00:00
Evan Cheng
638936d9cb Add a blurb about MachineInstr bundling support. 
llvm-svn: 146603
 2011-12-14 22:57:45 +00:00
Bill Wendling
7fca2377aa Reapply r146481 with a fix to create the Builder value in the correct place and 
with the correct iterator.
<rdar://problem/10530851>

llvm-svn: 146600
 2011-12-14 22:45:33 +00:00
Kevin Enderby
bc6d6388c2 Improve the implementation of .incbin directive by replacing a loop by using 
getStreamer().EmitBytes.  Suggestion by Benjamin Kramer!

llvm-svn: 146599
 2011-12-14 22:34:45 +00:00
Andrew Trick
9c88f32f94 LSR: Fold redundant bitcasts on-the-fly. 
llvm-svn: 146597
 2011-12-14 22:07:19 +00:00
Jim Grosbach
83520a5b70 ARM NEON fix alignment encoding for VST2 w/ writeback. 
Add tests for w/ writeback instruction parsing and encoding.

llvm-svn: 146594
 2011-12-14 21:49:24 +00:00
Kevin Enderby
b0b669eb26 Add the .incbin directive which takes the binary data from a file and emits 
it to the streamer.  rdar://10383898

llvm-svn: 146592
 2011-12-14 21:47:48 +00:00
Jim Grosbach
4c0d6081a1 Nuke old code. Missed in last commit. 
llvm-svn: 146590
 2011-12-14 21:41:32 +00:00
Evan Cheng
1dcc7d089e Add high level description of MachineInstr bundles. 
llvm-svn: 146589
 2011-12-14 21:32:14 +00:00
Jim Grosbach
2dac770227 ARM NEON refactor VST2 w/ writeback instructions. 
In addition to improving the representation, this adds support for assembly
parsing of these instructions.

llvm-svn: 146588
 2011-12-14 21:32:11 +00:00
Jim Grosbach
7fe9f4b949 ARM NEON improve factoring a bit. No functional change. 
llvm-svn: 146585
 2011-12-14 20:59:15 +00:00
Evan Cheng
8d5b09811a Model ARM predicated write as read-mod-write. e.g. 
r0 = mov #0
r0 = moveq #1

Then the second instruction has an implicit data dependency on the first
instruction. Sadly I have yet to come up with a small test case that
demonstrate the post-ra scheduler taking advantage of this.

llvm-svn: 146583
 2011-12-14 20:00:08 +00:00
Jim Grosbach
44829ab9d2 ARM NEON VST2 assembly parsing and encoding. 
Work in progress. Parsing for non-writeback, single spaced register lists
works now. The rest have the representations better factored, but still
need more to be able to parse properly.

llvm-svn: 146579
 2011-12-14 19:35:22 +00:00
Stepan Dyatkovskiy
14cb78c6fb Fix for bug #11429: Wrong behaviour for switches. Small improvement for code size heuristics. 
llvm-svn: 146578
 2011-12-14 19:19:17 +00:00
Dan Gohman
e9572aa680 It turns out that clang does use pointer-to-function types to 
point to ARC-managed pointers sometimes. This fixes rdar://10551239.

llvm-svn: 146577
 2011-12-14 19:10:53 +00:00
Jakob Stoklund Olesen
bc1bb8d763 Fix speling and 80-col. 
llvm-svn: 146575
 2011-12-14 18:49:13 +00:00
Akira Hatanaka
3fca32d88e Add support for local dynamic TLS model in LowerGlobalTLSAddress. Direct object 
emission is not supported yet, but a patch that adds the support should follow
soon.

llvm-svn: 146572
 2011-12-14 18:26:41 +00:00
Jim Grosbach
7f0853a3f9 Fix copy/pasto that skipped the 'modify' step. 
llvm-svn: 146571
 2011-12-14 18:12:37 +00:00
Jim Grosbach
87066950b3 ARM/Thumb2 mov vs. mvn alias goes both ways. 
llvm-svn: 146570
 2011-12-14 17:56:51 +00:00
Chad Rosier
879f983406 VFP2 is required for FP loads. Noticed by inspection. 
llvm-svn: 146569
 2011-12-14 17:55:03 +00:00
Chad Rosier
4cb75ebb48 Tidy up. 
llvm-svn: 146568
 2011-12-14 17:32:02 +00:00
Jim Grosbach
54372eef76 ARM/Thumb2 'cmp rn, #imm' alias to cmn. 
When 'cmp rn #imm' doesn't match due to the immediate not being representable,
but 'cmn rn, #-imm' does match, use the latter in place of the former, as
it's equivalent.

rdar://10552389

llvm-svn: 146567
 2011-12-14 17:30:24 +00:00
Chad Rosier
c642144c4e Fix 80-column violation and extraneous brackets. 
llvm-svn: 146566
 2011-12-14 17:26:05 +00:00
Duncan Sands
1de7ae0e43 Vectors are not aggregate types (see isAggregateType). 
llvm-svn: 146561
 2011-12-14 15:44:20 +00:00
NAKAMURA Takumi
f9188630a4 llvm/lib/CodeGen: Fix cmake build since r146542. 
llvm-svn: 146550
 2011-12-14 03:50:53 +00:00
Eli Friedman
760c0f359a Fix a stupid typo in MemDepPrinter. 
llvm-svn: 146549
 2011-12-14 02:54:39 +00:00
Eli Friedman
eb387f51bc Add missing cases to SDNode::getOperationName(). Patch by Micah Villmow. 
llvm-svn: 146548
 2011-12-14 02:28:54 +00:00
Evan Cheng
3257bff430 Allow target to specify register output dependency. Still default to one. 
llvm-svn: 146547
 2011-12-14 02:28:53 +00:00
Bill Wendling
66a97b48f3 Revert r146481 to review possible miscompilations. 
llvm-svn: 146546
 2011-12-14 02:18:26 +00:00
Bill Wendling
0ee400172b Disable to review some failures. 
llvm-svn: 146545
 2011-12-14 02:16:54 +00:00
Jim Grosbach
628ae663ef ARM assembler support for the target-specific .req directive. 
rdar://10549683

llvm-svn: 146543
 2011-12-14 02:16:11 +00:00
Evan Cheng
68ba5536f3 - Add MachineInstrBundle.h and MachineInstrBundle.cpp. This includes a function 
to finalize MI bundles (i.e. add BUNDLE instruction and computing register def
  and use lists of the BUNDLE instruction) and a pass to unpack bundles.
- Teach more of MachineBasic and MachineInstr methods to be bundle aware.
- Switch Thumb2 IT block to MI bundles and delete the hazard recognizer hack to
  prevent IT blocks from being broken apart.

llvm-svn: 146542
 2011-12-14 02:11:42 +00:00
Chad Rosier
33f40b2c25 Add newline at EOF. 
llvm-svn: 146538
 2011-12-14 01:34:39 +00:00
Nick Lewycky
b5bf0582aa DW_AT_virtuality is also defined to be constant, not flag. 
llvm-svn: 146534
 2011-12-14 00:56:07 +00:00
Chad Rosier
cddacd5cf6 Per discussion on the list, remove BitcodeVerify pass to reimplement as a free function. 
llvm-svn: 146531
 2011-12-14 00:29:31 +00:00
Kostya Serebryany
7d3cbe255e [asan] remove .preinit_array from the compiler module (it breaks .so builds). This should be done in the run-time. 
llvm-svn: 146527
 2011-12-14 00:01:51 +00:00
Michael J. Spencer
02c5e58b03 llvm-nm: refactor in order to support reading files from stdin. 
llvm-svn: 146524
 2011-12-13 23:17:29 +00:00
Michael J. Spencer
5cf93fd736 Support/FileSystem: Add file_magic and move a vew clients over to it. 
llvm-svn: 146523
 2011-12-13 23:17:12 +00:00
Michael J. Spencer
52d5a254bc Support/Program: Make Change<stream>ToBinary return error_code. 
llvm-svn: 146522
 2011-12-13 23:16:49 +00:00
Michael J. Spencer
8d2c45200a Cleanup whitespace. 
llvm-svn: 146521
 2011-12-13 23:16:15 +00:00
Jim Grosbach
089ad574d8 Thumb2 assembler aliases for "mov(shifted register)" 
rdar://10549767

llvm-svn: 146520
 2011-12-13 22:45:11 +00:00
Jim Grosbach
bd33fc6efd ARM LDM/STM system instruction variants. 
rdar://10550269

llvm-svn: 146519
 2011-12-13 21:48:29 +00:00
Jim Grosbach
11f15ddaab Thumb2 pre/post indexed stores can be from any non-PC GPR. 
rdar://10549786

llvm-svn: 146518
 2011-12-13 21:10:25 +00:00
Jim Grosbach
7db50010cc Test for 146516 
llvm-svn: 146517
 2011-12-13 21:06:59 +00:00
Jim Grosbach
b2547b424c Thumb2 tweak for ccout handling in RSB parsing. 
llvm-svn: 146516
 2011-12-13 21:06:41 +00:00
Jim Grosbach
13d3509445 ARM thumb2 parsing of "rsb rd, rn, #0". 
rdar://10549741

llvm-svn: 146515
 2011-12-13 20:50:38 +00:00
Jim Grosbach
dfec87fe2f ARM NEON two-operand aliases for VQDMULH. 
llvm-svn: 146514
 2011-12-13 20:40:37 +00:00
Jim Grosbach
0ba5ba4535 ARM pre-UAL NEG mnemonic for convenience when porting old code. 
llvm-svn: 146511
 2011-12-13 20:23:22 +00:00
Jim Grosbach
1738a66371 ARM add some more pre-UAL VFP mnemonics for convenience when porting old code. 
llvm-svn: 146508
 2011-12-13 20:13:48 +00:00